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Side by Side Diff: src/IceInstARM32.cpp

Issue 1439683002: Fix line spacing for push instructions in ARM assembly. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Merge with master. Created 5 years, 1 month ago
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1 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===// 1 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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1207 // TODO(jpp): Improve FP register save/restore. 1207 // TODO(jpp): Improve FP register save/restore.
1208 if (!BuildDefs::dump()) 1208 if (!BuildDefs::dump())
1209 return; 1209 return;
1210 SizeT IntegerCount = 0; 1210 SizeT IntegerCount = 0;
1211 for (SizeT i = 0; i < getSrcSize(); ++i) { 1211 for (SizeT i = 0; i < getSrcSize(); ++i) {
1212 if (isScalarIntegerType(getSrc(i)->getType())) { 1212 if (isScalarIntegerType(getSrc(i)->getType())) {
1213 ++IntegerCount; 1213 ++IntegerCount;
1214 } 1214 }
1215 } 1215 }
1216 Ostream &Str = Func->getContext()->getStrEmit(); 1216 Ostream &Str = Func->getContext()->getStrEmit();
1217 bool NeedNewline = false;
1217 for (SizeT i = getSrcSize(); i > 0; --i) { 1218 for (SizeT i = getSrcSize(); i > 0; --i) {
1218 Operand *Op = getSrc(i - 1); 1219 Operand *Op = getSrc(i - 1);
1219 if (isScalarIntegerType(Op->getType())) 1220 if (isScalarIntegerType(Op->getType()))
1220 continue; 1221 continue;
1221 Str << "\t" 1222 Str << "\t"
1222 << "vpush" 1223 << "vpush"
1223 << "\t{"; 1224 << "\t{";
1224 Op->emit(Func); 1225 Op->emit(Func);
1225 Str << "}\n"; 1226 Str << "}";
1227 NeedNewline = true;
1226 } 1228 }
1227 if (IntegerCount != 0) { 1229 if (IntegerCount != 0) {
1228 startNextInst(Func); 1230 startNextInst(Func);
1231 if (NeedNewline) {
1232 Str << "\n";
1233 NeedNewline = false;
1234 }
1229 Str << "\t" 1235 Str << "\t"
1230 << "push" 1236 << "push"
1231 << "\t{"; 1237 << "\t{";
1232 bool PrintComma = false; 1238 bool PrintComma = false;
1233 for (SizeT i = 0; i < getSrcSize(); ++i) { 1239 for (SizeT i = 0; i < getSrcSize(); ++i) {
1234 Operand *Op = getSrc(i); 1240 Operand *Op = getSrc(i);
1235 if (isScalarIntegerType(Op->getType())) { 1241 if (isScalarIntegerType(Op->getType())) {
1236 if (PrintComma) 1242 if (PrintComma)
1237 Str << ", "; 1243 Str << ", ";
1238 Op->emit(Func); 1244 Op->emit(Func);
1239 PrintComma = true; 1245 PrintComma = true;
1240 } 1246 }
1241 } 1247 }
1242 Str << "}\n"; 1248 Str << "}";
1249 NeedNewline = true;
1243 } 1250 }
1251 assert(NeedNewline); // caller will add the newline
1244 } 1252 }
1245 1253
1246 void InstARM32Push::emitIAS(const Cfg *Func) const { 1254 void InstARM32Push::emitIAS(const Cfg *Func) const {
1247 SizeT IntegerCount = 0; 1255 SizeT IntegerCount = 0;
1248 ARM32::IValueT GPRegisters = 0; 1256 ARM32::IValueT GPRegisters = 0;
1249 const Variable *LastSrc = nullptr; 1257 const Variable *LastSrc = nullptr;
1250 for (SizeT Index = 0; Index < getSrcSize(); ++Index) { 1258 for (SizeT Index = 0; Index < getSrcSize(); ++Index) {
1251 if (!isScalarIntegerType(getSrc(Index)->getType())) 1259 if (!isScalarIntegerType(getSrc(Index)->getType()))
1252 // TODO(kschimpf) Implement vpush. 1260 // TODO(kschimpf) Implement vpush.
1253 return emitUsingTextFixup(Func); 1261 return emitUsingTextFixup(Func);
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1746 template class InstARM32UnaryopGPR<InstARM32::Uxt, true>; 1754 template class InstARM32UnaryopGPR<InstARM32::Uxt, true>;
1747 template class InstARM32UnaryopFP<InstARM32::Vsqrt>; 1755 template class InstARM32UnaryopFP<InstARM32::Vsqrt>;
1748 1756
1749 template class InstARM32FourAddrGPR<InstARM32::Mla>; 1757 template class InstARM32FourAddrGPR<InstARM32::Mla>;
1750 template class InstARM32FourAddrGPR<InstARM32::Mls>; 1758 template class InstARM32FourAddrGPR<InstARM32::Mls>;
1751 1759
1752 template class InstARM32CmpLike<InstARM32::Cmp>; 1760 template class InstARM32CmpLike<InstARM32::Cmp>;
1753 template class InstARM32CmpLike<InstARM32::Tst>; 1761 template class InstARM32CmpLike<InstARM32::Tst>;
1754 1762
1755 } // end of namespace Ice 1763 } // end of namespace Ice
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