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1 //===- subzero/src/IceInstX86Base.h - Generic x86 instructions -*- C++ -*--===// | 1 //===- subzero/src/IceInstX86Base.h - Generic x86 instructions -*- C++ -*--===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 /// | 9 /// |
10 /// \file | 10 /// \file |
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28 | 28 |
29 template <class Machine> struct MachineTraits; | 29 template <class Machine> struct MachineTraits; |
30 | 30 |
31 template <class Machine> class InstX86Base : public InstTarget { | 31 template <class Machine> class InstX86Base : public InstTarget { |
32 InstX86Base<Machine>() = delete; | 32 InstX86Base<Machine>() = delete; |
33 InstX86Base<Machine>(const InstX86Base &) = delete; | 33 InstX86Base<Machine>(const InstX86Base &) = delete; |
34 InstX86Base &operator=(const InstX86Base &) = delete; | 34 InstX86Base &operator=(const InstX86Base &) = delete; |
35 | 35 |
36 public: | 36 public: |
37 using Traits = MachineTraits<Machine>; | 37 using Traits = MachineTraits<Machine>; |
| 38 using X86TargetLowering = typename Traits::TargetLowering; |
38 | 39 |
39 enum InstKindX86 { | 40 enum InstKindX86 { |
40 k__Start = Inst::Target, | 41 k__Start = Inst::Target, |
41 Adc, | 42 Adc, |
42 AdcRMW, | 43 AdcRMW, |
43 Add, | 44 Add, |
44 AddRMW, | 45 AddRMW, |
45 Addps, | 46 Addps, |
46 Addss, | 47 Addss, |
47 Adjuststack, | 48 Adjuststack, |
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149 | 150 |
150 // Shared emit routines for common forms of instructions. | 151 // Shared emit routines for common forms of instructions. |
151 static void emitTwoAddress(const char *Opcode, const Inst *Inst, | 152 static void emitTwoAddress(const char *Opcode, const Inst *Inst, |
152 const Cfg *Func); | 153 const Cfg *Func); |
153 | 154 |
154 static void | 155 static void |
155 emitIASGPRShift(const Cfg *Func, Type Ty, const Variable *Var, | 156 emitIASGPRShift(const Cfg *Func, Type Ty, const Variable *Var, |
156 const Operand *Src, | 157 const Operand *Src, |
157 const typename Traits::Assembler::GPREmitterShiftOp &Emitter); | 158 const typename Traits::Assembler::GPREmitterShiftOp &Emitter); |
158 | 159 |
| 160 static X86TargetLowering *getTarget(const Cfg* Func) { |
| 161 return static_cast<X86TargetLowering *>(Func->getTarget()); |
| 162 } |
| 163 |
159 protected: | 164 protected: |
160 InstX86Base<Machine>(Cfg *Func, InstKindX86 Kind, SizeT Maxsrcs, | 165 InstX86Base<Machine>(Cfg *Func, InstKindX86 Kind, SizeT Maxsrcs, |
161 Variable *Dest) | 166 Variable *Dest) |
162 : InstTarget(Func, static_cast<InstKind>(Kind), Maxsrcs, Dest) {} | 167 : InstTarget(Func, static_cast<InstKind>(Kind), Maxsrcs, Dest) {} |
163 | 168 |
164 static bool isClassof(const Inst *Inst, InstKindX86 MyKind) { | 169 static bool isClassof(const Inst *Inst, InstKindX86 MyKind) { |
165 return Inst->getKind() == static_cast<InstKind>(MyKind); | 170 return Inst->getKind() == static_cast<InstKind>(MyKind); |
166 } | 171 } |
167 // Most instructions that operate on vector arguments require vector memory | 172 // Most instructions that operate on vector arguments require vector memory |
168 // operands to be fully aligned (16-byte alignment for PNaCl vector types). | 173 // operands to be fully aligned (16-byte alignment for PNaCl vector types). |
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3237 &InstX86Base<Machine>::Traits::Assembler::psrl}; \ | 3242 &InstX86Base<Machine>::Traits::Assembler::psrl}; \ |
3238 } \ | 3243 } \ |
3239 } | 3244 } |
3240 | 3245 |
3241 } // end of namespace X86Internal | 3246 } // end of namespace X86Internal |
3242 } // end of namespace Ice | 3247 } // end of namespace Ice |
3243 | 3248 |
3244 #include "IceInstX86BaseImpl.h" | 3249 #include "IceInstX86BaseImpl.h" |
3245 | 3250 |
3246 #endif // SUBZERO_SRC_ICEINSTX86BASE_H | 3251 #endif // SUBZERO_SRC_ICEINSTX86BASE_H |
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