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Unified Diff: src/IceTargetLoweringARM32.h

Issue 1438773004: Subzero. ARM32. Improve constant lowering. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Fixes the lit tests. Double is too precise. Created 5 years, 1 month ago
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Index: src/IceTargetLoweringARM32.h
diff --git a/src/IceTargetLoweringARM32.h b/src/IceTargetLoweringARM32.h
index 969e17a6b49c9ac8cdfdfcbfa400a53a058b1551..743fdfb83f12fb6ad70d616abc50f6040949d020 100644
--- a/src/IceTargetLoweringARM32.h
+++ b/src/IceTargetLoweringARM32.h
@@ -142,6 +142,8 @@ protected:
void lowerAlloca(const InstAlloca *Inst) override;
SafeBoolChain lowerInt1Arithmetic(const InstArithmetic *Inst);
+ void lowerInt64Arithmetic(InstArithmetic::OpKind Op, Variable *Dest,
+ Operand *Src0, Operand *Src1);
void lowerArithmetic(const InstArithmetic *Inst) override;
void lowerAssign(const InstAssign *Inst) override;
void lowerBr(const InstBr *Inst) override;
@@ -180,6 +182,8 @@ protected:
CondWhenTrue lowerFcmpCond(const InstFcmp *Instr);
void lowerFcmp(const InstFcmp *Instr) override;
+ CondWhenTrue lowerInt64IcmpCond(InstIcmp::ICond Condition, Operand *Src0,
+ Operand *Src1);
CondWhenTrue lowerIcmpCond(const InstIcmp *Instr);
void lowerIcmp(const InstIcmp *Instr) override;
void lowerAtomicRMW(Variable *Dest, uint32_t Operation, Operand *Ptr,
@@ -320,6 +324,12 @@ protected:
CondARM32::Cond Pred = CondARM32::AL) {
Context.insert(InstARM32Lsl::create(Func, Dest, Src0, Src1, Pred));
}
+ void _lsls(Variable *Dest, Variable *Src0, Operand *Src1,
+ CondARM32::Cond Pred = CondARM32::AL) {
+ constexpr bool SetFlags = true;
+ Context.insert(
+ InstARM32Lsl::create(Func, Dest, Src0, Src1, Pred, SetFlags));
+ }
void _lsr(Variable *Dest, Variable *Src0, Operand *Src1,
CondARM32::Cond Pred = CondARM32::AL) {
Context.insert(InstARM32Lsr::create(Func, Dest, Src0, Src1, Pred));
@@ -642,6 +652,18 @@ protected:
void _ret(Variable *LR, Variable *Src0 = nullptr) {
Context.insert(InstARM32Ret::create(Func, LR, Src0));
}
+ void _rscs(Variable *Dest, Variable *Src0, Operand *Src1,
+ CondARM32::Cond Pred = CondARM32::AL) {
+ constexpr bool SetFlags = true;
+ Context.insert(
+ InstARM32Rsc::create(Func, Dest, Src0, Src1, Pred, SetFlags));
+ }
+ void _rsbs(Variable *Dest, Variable *Src0, Operand *Src1,
+ CondARM32::Cond Pred = CondARM32::AL) {
+ constexpr bool SetFlags = true;
+ Context.insert(
+ InstARM32Rsb::create(Func, Dest, Src0, Src1, Pred, SetFlags));
+ }
void _rsb(Variable *Dest, Variable *Src0, Operand *Src1,
CondARM32::Cond Pred = CondARM32::AL) {
Context.insert(InstARM32Rsb::create(Func, Dest, Src0, Src1, Pred));
@@ -733,6 +755,10 @@ protected:
CondARM32::Cond Pred = CondARM32::AL) {
Context.insert(InstARM32Vcmp::create(Func, Src0, Src1, Pred));
}
+ void _vcmp(Variable *Src0, OperandARM32FlexFpZero *FpZero,
+ CondARM32::Cond Pred = CondARM32::AL) {
+ Context.insert(InstARM32Vcmp::create(Func, Src0, FpZero, Pred));
+ }
void _vmrs(CondARM32::Cond Pred = CondARM32::AL) {
Context.insert(InstARM32Vmrs::create(Func, Pred));
}

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