Subzero. ARM32. Improve constant lowering.

tests_lit/llvm2ice_tests/arith.ll

 ; Assembly test for simple arithmetic operations.
 
 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
 ; RUN:   --target x8632 -i %s --args -O2 \
 ; RUN:   | %if --need=target_X8632 --command FileCheck %s
 
 ; TODO(jvoung): Stop skipping unimplemented parts (via --skip-unimplemented)
 ; once enough infrastructure is in. Also, switch to --filetype=obj
 ; when possible.
 ; RUN: %if --need=target_ARM32 --need=allow_dump \
@@ skipping 99 matching lines @@
 ; Check for a valid ARM mul instruction where operands have to be registers.
 ; On the other hand x86-32 does allow an immediate.
 define internal i32 @MulImm(i32 %a, i32 %b) {
 entry:
   %mul = mul i32 %a, 99
   ret i32 %mul
 }
 ; CHECK-LABEL: MulImm
 ; CHECK: imul e{{.*}},e{{.*}},0x63
 ; ARM32-LABEL: MulImm
-; ARM32: mov {{.*}}, #99
+; ARM32: movw {{.*}}, #99
 ; ARM32: mul r{{.*}}, r{{.*}}, r{{.*}}
 ; MIPS32-LABEL: MulImm
 ; MIPS32: mul
 
 ; Check for a valid addressing mode in the x86-32 mul instruction when
 ; the second source operand is an immediate.
 define internal i64 @MulImm64(i64 %a) {
 entry:
   %mul = mul i64 %a, 99
   ret i64 %mul
@@ skipping 139 matching lines @@
 ; CHECK: shr {{.*}},cl
 
 define internal i32 @AshrReloc(i32 %a) {
 entry:
   %opnd = ptrtoint [4 x i8]* @G to i32
   %result = ashr i32 %a, %opnd
   ret i32 %result
 }
 ; CHECK-LABEL: AshrReloc
 ; CHECK: sar {{.*}},cl