[turbofan] Implemented the RoundUint64ToFloat32 TurboFan operator for x64, arm64,

src/ppc/simulator-ppc.cc

Index: src/ppc/simulator-ppc.cc
diff --git a/src/ppc/simulator-ppc.cc b/src/ppc/simulator-ppc.cc
index ce0c77af3ed17813c5a62879938e60b616f23258..368e374ff2b37ad423675843cdb09e451491cd26 100644
--- a/src/ppc/simulator-ppc.cc
+++ b/src/ppc/simulator-ppc.cc
@@ -2708,6 +2708,16 @@ void Simulator::ExecuteExt3(Instruction* instr) {
       set_d_register_from_double(frt, frt_val);
       return;
     }
+    case FCFIDU: {
+      // fcfidus
+      int frt = instr->RTValue();
+      int frb = instr->RBValue();
+      double t_val = get_double_from_d_register(frb);

[titzer, 2015/11/12 19:06:00]

I'm not entirely certain that get_double_from_d_register doesn't accidentally
alter NaN bits somehow. Maybe we need a get_uint64_from_d_register?

[ahaas, 2015/11/12 20:49:18]

In my understanding the value in this register is the converted uint64_t value,
so this value cannot contain NaN.

[MTBrandyberry, 2015/11/12 23:00:10]

get_d_register, which returns the raw int64 bits, is probably the right answer
here.  I can fix this instance and the others that need it in a follow-on CL.

[MTBrandyberry, 2015/11/13 18:40:38]

See https://codereview.chromium.org/1445603002/ if you want to address this
here.

+      uint64_t* frb_val_p = reinterpret_cast<uint64_t*>(&t_val);
+      double frt_val = static_cast<float>(*frb_val_p);

[ahaas, 2015/11/12 20:49:18]

I think it should be float frt_val, and not double.

[MTBrandyberry, 2015/11/12 23:00:10]

PPC's only floating point register representation is double precision.  Thus the
cast is sufficient to convert to 32-bit float before assigning back to the
register.

+      set_d_register_from_double(frt, frt_val);
+      return;
+    }
   }
   UNIMPLEMENTED();  // Not used by V8.
 }