[turbofan] Implemented the RoundUint64ToFloat32 TurboFan operator for x64, arm64,

src/ppc/disasm-ppc.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 // A Disassembler object is used to disassemble a block of code instruction by
 // instruction. The default implementation of the NameConverter object can be
 // overriden to modify register names or to do symbol lookup on addresses.
 //
 // The example below will disassemble a block of code and print it to stdout.
 //
@@ skipping 871 matching lines @@
   }
 }
 
 
 void Decoder::DecodeExt3(Instruction* instr) {
   switch (instr->Bits(10, 1) << 1) {
     case FCFID: {
       Format(instr, "fcfids'. 'Dt, 'Db");
       break;
     }
+    case FCFIDU: {
+      Format(instr, "fcfidus'.'Dt, 'Db");
+      break;
+    }
     default: {
       Unknown(instr);  // not used by V8
     }
   }
 }
 
 
 void Decoder::DecodeExt4(Instruction* instr) {
   switch (instr->Bits(5, 1) << 1) {
     case FDIV: {
@@ skipping 531 matching lines @@
     pc += d.InstructionDecode(buffer, pc);
     v8::internal::PrintF(f, "%p    %08x      %s\n", prev_pc,
                          *reinterpret_cast<int32_t*>(prev_pc), buffer.start());
   }
 }
 
 
 }  // namespace disasm
 
 #endif  // V8_TARGET_ARCH_PPC