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Side by Side Diff: src/compiler/ppc/instruction-codes-ppc.h

Issue 1438013003: [turbofan] Implemented the RoundUint64ToFloat32 TurboFan operator for x64, arm64, (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Reformated the test Created 5 years, 1 month ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_PPC_INSTRUCTION_CODES_PPC_H_ 5 #ifndef V8_COMPILER_PPC_INSTRUCTION_CODES_PPC_H_
6 #define V8_COMPILER_PPC_INSTRUCTION_CODES_PPC_H_ 6 #define V8_COMPILER_PPC_INSTRUCTION_CODES_PPC_H_
7 7
8 namespace v8 { 8 namespace v8 {
9 namespace internal { 9 namespace internal {
10 namespace compiler { 10 namespace compiler {
(...skipping 62 matching lines...) Expand 10 before | Expand all | Expand 10 after
73 V(PPC_Push) \ 73 V(PPC_Push) \
74 V(PPC_PushFrame) \ 74 V(PPC_PushFrame) \
75 V(PPC_StoreToStackSlot) \ 75 V(PPC_StoreToStackSlot) \
76 V(PPC_ExtendSignWord8) \ 76 V(PPC_ExtendSignWord8) \
77 V(PPC_ExtendSignWord16) \ 77 V(PPC_ExtendSignWord16) \
78 V(PPC_ExtendSignWord32) \ 78 V(PPC_ExtendSignWord32) \
79 V(PPC_Uint32ToUint64) \ 79 V(PPC_Uint32ToUint64) \
80 V(PPC_Int64ToInt32) \ 80 V(PPC_Int64ToInt32) \
81 V(PPC_Int64ToFloat32) \ 81 V(PPC_Int64ToFloat32) \
82 V(PPC_Int64ToDouble) \ 82 V(PPC_Int64ToDouble) \
83 V(PPC_Uint64ToFloat32) \
83 V(PPC_Uint64ToDouble) \ 84 V(PPC_Uint64ToDouble) \
84 V(PPC_Int32ToDouble) \ 85 V(PPC_Int32ToDouble) \
85 V(PPC_Uint32ToDouble) \ 86 V(PPC_Uint32ToDouble) \
86 V(PPC_Float32ToDouble) \ 87 V(PPC_Float32ToDouble) \
87 V(PPC_DoubleToInt32) \ 88 V(PPC_DoubleToInt32) \
88 V(PPC_DoubleToUint32) \ 89 V(PPC_DoubleToUint32) \
89 V(PPC_DoubleToFloat32) \ 90 V(PPC_DoubleToFloat32) \
90 V(PPC_DoubleExtractLowWord32) \ 91 V(PPC_DoubleExtractLowWord32) \
91 V(PPC_DoubleExtractHighWord32) \ 92 V(PPC_DoubleExtractHighWord32) \
92 V(PPC_DoubleInsertLowWord32) \ 93 V(PPC_DoubleInsertLowWord32) \
(...skipping 34 matching lines...) Expand 10 before | Expand all | Expand 10 after
127 // MRR = [register + register] 128 // MRR = [register + register]
128 #define TARGET_ADDRESSING_MODE_LIST(V) \ 129 #define TARGET_ADDRESSING_MODE_LIST(V) \
129 V(MRI) /* [%r0 + K] */ \ 130 V(MRI) /* [%r0 + K] */ \
130 V(MRR) /* [%r0 + %r1] */ 131 V(MRR) /* [%r0 + %r1] */
131 132
132 } // namespace compiler 133 } // namespace compiler
133 } // namespace internal 134 } // namespace internal
134 } // namespace v8 135 } // namespace v8
135 136
136 #endif // V8_COMPILER_PPC_INSTRUCTION_CODES_PPC_H_ 137 #endif // V8_COMPILER_PPC_INSTRUCTION_CODES_PPC_H_
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