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1 ; This is a basic test of the alloca instruction. | 1 ; This is a basic test of the alloca instruction. |
2 | 2 |
3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ | 3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ |
4 ; RUN: --target x8632 -i %s --args -O2 -allow-externally-defined-symbols \ | 4 ; RUN: --target x8632 -i %s --args -O2 -allow-externally-defined-symbols \ |
5 ; RUN: | %if --need=target_X8632 --command FileCheck %s | 5 ; RUN: | %if --need=target_X8632 --command FileCheck %s |
6 | 6 |
7 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ | 7 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ |
8 ; RUN: --target x8632 -i %s --args -Om1 -allow-externally-defined-symbols \ | 8 ; RUN: --target x8632 -i %s --args -Om1 -allow-externally-defined-symbols \ |
9 ; RUN: | %if --need=target_X8632 --command FileCheck %s | 9 ; RUN: | %if --need=target_X8632 --command FileCheck \ |
| 10 ; RUN: --check-prefix CHECK-OPTM1 %s |
10 | 11 |
11 ; TODO(jvoung): Stop skipping unimplemented parts (via --skip-unimplemented) | 12 ; TODO(jvoung): Stop skipping unimplemented parts (via --skip-unimplemented) |
12 ; once enough infrastructure is in. Also, switch to --filetype=obj | 13 ; once enough infrastructure is in. Also, switch to --filetype=obj |
13 ; when possible. | 14 ; when possible. |
14 ; RUN: %if --need=target_ARM32 --need=allow_dump \ | 15 ; RUN: %if --need=target_ARM32 --need=allow_dump \ |
15 ; RUN: --command %p2i --filetype=asm --assemble \ | 16 ; RUN: --command %p2i --filetype=asm --assemble \ |
16 ; RUN: --disassemble --target arm32 -i %s --args -O2 --skip-unimplemented \ | 17 ; RUN: --disassemble --target arm32 -i %s --args -O2 --skip-unimplemented \ |
17 ; RUN: -allow-externally-defined-symbols \ | 18 ; RUN: -allow-externally-defined-symbols \ |
18 ; RUN: | %if --need=target_ARM32 --need=allow_dump \ | 19 ; RUN: | %if --need=target_ARM32 --need=allow_dump \ |
19 ; RUN: --command FileCheck --check-prefix ARM32 %s | 20 ; RUN: --command FileCheck --check-prefix ARM32 %s |
20 | 21 |
21 ; RUN: %if --need=target_ARM32 --need=allow_dump \ | 22 ; RUN: %if --need=target_ARM32 --need=allow_dump \ |
22 ; RUN: --command %p2i --filetype=asm --assemble \ | 23 ; RUN: --command %p2i --filetype=asm --assemble \ |
23 ; RUN: --disassemble --target arm32 -i %s --args -Om1 --skip-unimplemented \ | 24 ; RUN: --disassemble --target arm32 -i %s --args -Om1 --skip-unimplemented \ |
24 ; RUN: -allow-externally-defined-symbols \ | 25 ; RUN: -allow-externally-defined-symbols \ |
25 ; RUN: | %if --need=target_ARM32 --need=allow_dump \ | 26 ; RUN: | %if --need=target_ARM32 --need=allow_dump \ |
26 ; RUN: --command FileCheck --check-prefix ARM32 %s | 27 ; RUN: --command FileCheck --check-prefix ARM32 %s |
27 | 28 |
28 define internal void @fixed_416_align_16(i32 %n) { | 29 define internal void @fixed_416_align_16(i32 %n) { |
29 entry: | 30 entry: |
30 %array = alloca i8, i32 416, align 16 | 31 %array = alloca i8, i32 416, align 16 |
31 %__2 = ptrtoint i8* %array to i32 | 32 %__2 = ptrtoint i8* %array to i32 |
32 call void @f1(i32 %__2) | 33 call void @f1(i32 %__2) |
33 ret void | 34 ret void |
34 } | 35 } |
35 ; CHECK-LABEL: fixed_416_align_16 | 36 ; CHECK-LABEL: fixed_416_align_16 |
36 ; CHECK: sub esp,0x1a0 | 37 ; CHECK: sub esp,0x1ac |
37 ; CHECK: sub esp,0x10 | 38 ; CHECK: sub esp,0x10 |
38 ; CHECK: mov DWORD PTR [esp],eax | 39 ; CHECK: mov DWORD PTR [esp],eax |
39 ; CHECK: call {{.*}} R_{{.*}} f1 | 40 ; CHECK: call {{.*}} R_{{.*}} f1 |
40 | 41 |
| 42 ; CHECK-OPTM1-LABEL: fixed_416_align_16 |
| 43 ; CHECK-OPTM1: sub esp,0xc |
| 44 ; CHECK-OPTM1: sub esp,0x1a0 |
| 45 ; CHECK-OPTM1: sub esp,0x10 |
| 46 ; CHECK-OPTM1: mov DWORD PTR [esp],eax |
| 47 ; CHECK-OPTM1: call {{.*}} R_{{.*}} f1 |
| 48 |
41 ; ARM32-LABEL: fixed_416_align_16 | 49 ; ARM32-LABEL: fixed_416_align_16 |
42 ; ARM32: sub sp, sp, #416 | 50 ; ARM32: sub sp, sp, #416 |
43 ; ARM32: bl {{.*}} R_{{.*}} f1 | 51 ; ARM32: bl {{.*}} R_{{.*}} f1 |
44 | 52 |
45 define internal void @fixed_416_align_32(i32 %n) { | 53 define internal void @fixed_416_align_32(i32 %n) { |
46 entry: | 54 entry: |
47 %array = alloca i8, i32 400, align 32 | 55 %array = alloca i8, i32 400, align 32 |
48 %__2 = ptrtoint i8* %array to i32 | 56 %__2 = ptrtoint i8* %array to i32 |
49 call void @f1(i32 %__2) | 57 call void @f1(i32 %__2) |
50 ret void | 58 ret void |
51 } | 59 } |
52 ; CHECK-LABEL: fixed_416_align_32 | 60 ; CHECK-LABEL: fixed_416_align_32 |
53 ; CHECK: push ebp | 61 ; CHECK: push ebp |
54 ; CHECK-NEXT: mov ebp,esp | 62 ; CHECK-NEXT: mov ebp,esp |
| 63 ; CHECK: sub esp,0x1a8 |
55 ; CHECK: and esp,0xffffffe0 | 64 ; CHECK: and esp,0xffffffe0 |
56 ; CHECK: sub esp,0x1a0 | |
57 ; CHECK: sub esp,0x10 | 65 ; CHECK: sub esp,0x10 |
58 ; CHECK: mov DWORD PTR [esp],eax | 66 ; CHECK: mov DWORD PTR [esp],eax |
59 ; CHECK: call {{.*}} R_{{.*}} f1 | 67 ; CHECK: call {{.*}} R_{{.*}} f1 |
60 | 68 |
61 ; ARM32-LABEL: fixed_416_align_32 | 69 ; ARM32-LABEL: fixed_416_align_32 |
62 ; ARM32: bic sp, sp, #31 | 70 ; ARM32: bic sp, sp, #31 |
63 ; ARM32: sub sp, sp, #416 | 71 ; ARM32: sub sp, sp, #416 |
64 ; ARM32: bl {{.*}} R_{{.*}} f1 | 72 ; ARM32: bl {{.*}} R_{{.*}} f1 |
65 | 73 |
66 ; Show that the amount to allocate will be rounded up. | 74 ; Show that the amount to allocate will be rounded up. |
67 define internal void @fixed_351_align_16(i32 %n) { | 75 define internal void @fixed_351_align_16(i32 %n) { |
68 entry: | 76 entry: |
69 %array = alloca i8, i32 351, align 16 | 77 %array = alloca i8, i32 351, align 16 |
70 %__2 = ptrtoint i8* %array to i32 | 78 %__2 = ptrtoint i8* %array to i32 |
71 call void @f1(i32 %__2) | 79 call void @f1(i32 %__2) |
72 ret void | 80 ret void |
73 } | 81 } |
74 ; CHECK-LABEL: fixed_351_align_16 | 82 ; CHECK-LABEL: fixed_351_align_16 |
75 ; CHECK: sub esp,0x160 | 83 ; CHECK: sub esp,0x16c |
76 ; CHECK: sub esp,0x10 | |
77 ; CHECK: mov DWORD PTR [esp],eax | 84 ; CHECK: mov DWORD PTR [esp],eax |
78 ; CHECK: call {{.*}} R_{{.*}} f1 | 85 ; CHECK: call {{.*}} R_{{.*}} f1 |
79 | 86 |
| 87 ; CHECK-OPTM1-LABEL: fixed_351_align_16 |
| 88 ; CHECK-OPTM1: sub esp,0xc |
| 89 ; CHECK-OPTM1: sub esp,0x160 |
| 90 ; CHECK-OPTM1: mov DWORD PTR [esp],eax |
| 91 ; CHECK-OPTM1: call {{.*}} R_{{.*}} f1 |
| 92 |
80 ; ARM32-LABEL: fixed_351_align_16 | 93 ; ARM32-LABEL: fixed_351_align_16 |
81 ; ARM32: sub sp, sp, #352 | 94 ; ARM32: sub sp, sp, #352 |
82 ; ARM32: bl {{.*}} R_{{.*}} f1 | 95 ; ARM32: bl {{.*}} R_{{.*}} f1 |
83 | 96 |
84 define internal void @fixed_351_align_32(i32 %n) { | 97 define internal void @fixed_351_align_32(i32 %n) { |
85 entry: | 98 entry: |
86 %array = alloca i8, i32 351, align 32 | 99 %array = alloca i8, i32 351, align 32 |
87 %__2 = ptrtoint i8* %array to i32 | 100 %__2 = ptrtoint i8* %array to i32 |
88 call void @f1(i32 %__2) | 101 call void @f1(i32 %__2) |
89 ret void | 102 ret void |
90 } | 103 } |
91 ; CHECK-LABEL: fixed_351_align_32 | 104 ; CHECK-LABEL: fixed_351_align_32 |
92 ; CHECK: push ebp | 105 ; CHECK: push ebp |
93 ; CHECK-NEXT: mov ebp,esp | 106 ; CHECK-NEXT: mov ebp,esp |
| 107 ; CHECK: sub esp,0x168 |
94 ; CHECK: and esp,0xffffffe0 | 108 ; CHECK: and esp,0xffffffe0 |
95 ; CHECK: sub esp,0x160 | |
96 ; CHECK: sub esp,0x10 | 109 ; CHECK: sub esp,0x10 |
97 ; CHECK: mov DWORD PTR [esp],eax | 110 ; CHECK: mov DWORD PTR [esp],eax |
98 ; CHECK: call {{.*}} R_{{.*}} f1 | 111 ; CHECK: call {{.*}} R_{{.*}} f1 |
99 | 112 |
100 ; ARM32-LABEL: fixed_351_align_32 | 113 ; ARM32-LABEL: fixed_351_align_32 |
101 ; ARM32: bic sp, sp, #31 | 114 ; ARM32: bic sp, sp, #31 |
102 ; ARM32: sub sp, sp, #352 | 115 ; ARM32: sub sp, sp, #352 |
103 ; ARM32: bl {{.*}} R_{{.*}} f1 | 116 ; ARM32: bl {{.*}} R_{{.*}} f1 |
104 | 117 |
105 declare void @f1(i32 %ignored) | 118 declare void @f1(i32 %ignored) |
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276 %p1 = bitcast i8* %a1 to i32* | 289 %p1 = bitcast i8* %a1 to i32* |
277 %p2 = bitcast i8* %a2 to i32* | 290 %p2 = bitcast i8* %a2 to i32* |
278 %p3 = bitcast i8* %a3 to i32* | 291 %p3 = bitcast i8* %a3 to i32* |
279 store i32 %arg, i32* %p1, align 1 | 292 store i32 %arg, i32* %p1, align 1 |
280 store i32 %arg, i32* %p2, align 1 | 293 store i32 %arg, i32* %p2, align 1 |
281 store i32 %arg, i32* %p3, align 1 | 294 store i32 %arg, i32* %p3, align 1 |
282 ret void | 295 ret void |
283 } | 296 } |
284 ; CHECK-LABEL: var_with_frameptr | 297 ; CHECK-LABEL: var_with_frameptr |
285 ; CHECK: mov ebp,esp | 298 ; CHECK: mov ebp,esp |
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