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|    1 //===- subzero/src/IceInstX8632.cpp - X86-32 instruction implementation ---===// |    1 //===- subzero/src/IceInstX8632.cpp - X86-32 instruction implementation ---===// | 
|    2 // |    2 // | 
|    3 //                        The Subzero Code Generator |    3 //                        The Subzero Code Generator | 
|    4 // |    4 // | 
|    5 // This file is distributed under the University of Illinois Open Source |    5 // This file is distributed under the University of Illinois Open Source | 
|    6 // License. See LICENSE.TXT for details. |    6 // License. See LICENSE.TXT for details. | 
|    7 // |    7 // | 
|    8 //===----------------------------------------------------------------------===// |    8 //===----------------------------------------------------------------------===// | 
|    9 /// |    9 /// | 
|   10 /// \file |   10 /// \file | 
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|   91     Vars = Func->allocateArrayOf<Variable *>(NumVars); |   91     Vars = Func->allocateArrayOf<Variable *>(NumVars); | 
|   92     SizeT I = 0; |   92     SizeT I = 0; | 
|   93     if (Base) |   93     if (Base) | 
|   94       Vars[I++] = Base; |   94       Vars[I++] = Base; | 
|   95     if (Index) |   95     if (Index) | 
|   96       Vars[I++] = Index; |   96       Vars[I++] = Index; | 
|   97     assert(I == NumVars); |   97     assert(I == NumVars); | 
|   98   } |   98   } | 
|   99 } |   99 } | 
|  100  |  100  | 
 |  101 namespace { | 
 |  102 static int32_t GetRematerializableOffset(Variable *Var, bool IgnoreStackAdjust, | 
 |  103                                          const Ice::TargetX8632 *Target) { | 
 |  104   int32_t Disp = 0; | 
 |  105   Disp += Var->getStackOffset(); | 
 |  106   SizeT RegNum = static_cast<SizeT>(Var->getRegNum()); | 
 |  107   if (RegNum == Target->getStackReg()) { | 
 |  108     if (!IgnoreStackAdjust) | 
 |  109       Disp += Target->getStackAdjustment(); | 
 |  110   } else if (RegNum == Target->getFrameReg()) { | 
 |  111     Disp += Target->getFrameFixedAllocaOffset(); | 
 |  112   } else { | 
 |  113     llvm::report_fatal_error("Unexpected rematerializable register type"); | 
 |  114   } | 
 |  115   return Disp; | 
 |  116 } | 
 |  117 } // end of anonymous namespace | 
 |  118  | 
|  101 void MachineTraits<TargetX8632>::X86OperandMem::emit(const Cfg *Func) const { |  119 void MachineTraits<TargetX8632>::X86OperandMem::emit(const Cfg *Func) const { | 
|  102   if (!BuildDefs::dump()) |  120   if (!BuildDefs::dump()) | 
|  103     return; |  121     return; | 
|  104   const ::Ice::TargetLowering *Target = Func->getTarget(); |  122   const auto *Target = static_cast<const Ice::TargetX8632 *>(Func->getTarget()); | 
|  105   // If the base is rematerializable, we need to replace it with the correct |  123   // If the base is rematerializable, we need to replace it with the correct | 
|  106   // physical register (esp or ebp), and update the Offset. |  124   // physical register (esp or ebp), and update the Offset. | 
|  107   int32_t Disp = 0; |  125   int32_t Disp = 0; | 
|  108   if (getBase() && getBase()->isRematerializable()) { |  126   if (getBase() && getBase()->isRematerializable()) { | 
|  109     Disp += getBase()->getStackOffset(); |  127     Disp += | 
|  110     if (!getIgnoreStackAdjust()) |  128         GetRematerializableOffset(getBase(), getIgnoreStackAdjust(), Target); | 
|  111       Disp += Target->getStackAdjustment(); |  | 
|  112   } |  129   } | 
|  113   // The index should never be rematerializable.  But if we ever allow it, then |  130   // The index should never be rematerializable.  But if we ever allow it, then | 
|  114   // we should make sure the rematerialization offset is shifted by the Shift |  131   // we should make sure the rematerialization offset is shifted by the Shift | 
|  115   // value. |  132   // value. | 
|  116   if (getIndex()) |  133   if (getIndex()) | 
|  117     assert(!getIndex()->isRematerializable()); |  134     assert(!getIndex()->isRematerializable()); | 
|  118   Ostream &Str = Func->getContext()->getStrEmit(); |  135   Ostream &Str = Func->getContext()->getStrEmit(); | 
|  119   if (SegmentReg != DefaultSegment) { |  136   if (SegmentReg != DefaultSegment) { | 
|  120     assert(SegmentReg >= 0 && SegmentReg < SegReg_NUM); |  137     assert(SegmentReg >= 0 && SegmentReg < SegReg_NUM); | 
|  121     Str << "%" << X8632::Traits::InstSegmentRegNames[SegmentReg] << ":"; |  138     Str << "%" << X8632::Traits::InstSegmentRegNames[SegmentReg] << ":"; | 
|  122   } |  139   } | 
|  123   // Emit as Offset(Base,Index,1<<Shift). Offset is emitted without the leading |  140   // Emit as Offset(Base,Index,1<<Shift). Offset is emitted without the leading | 
|  124   // '$'. Omit the (Base,Index,1<<Shift) part if Base==nullptr. |  141   // '$'. Omit the (Base,Index,1<<Shift) part if Base==nullptr. | 
|  125   if (getOffset() == 0 && Disp == 0) { |  142   if (getOffset() == 0 && Disp == 0) { | 
|  126     // No offset, emit nothing. |  143     // No offset, emit nothing. | 
|  127   } else if (getOffset() == 0 && Disp != 0) { |  144   } else if (getOffset() == 0 && Disp != 0) { | 
|  128     Str << Disp; |  145     Str << Disp; | 
|  129   } else if (const auto *CI = llvm::dyn_cast<ConstantInteger32>(getOffset())) { |  146   } else if (const auto *CI = llvm::dyn_cast<ConstantInteger32>(getOffset())) { | 
|  130     if (getBase() == nullptr || CI->getValue() || Disp != 0) |  147     if (getBase() == nullptr || CI->getValue() || Disp != 0) | 
|  131       // Emit a non-zero offset without a leading '$'. |  148       // Emit a non-zero offset without a leading '$'. | 
|  132       Str << CI->getValue() + Disp; |  149       Str << CI->getValue() + Disp; | 
|  133   } else if (const auto *CR = |  150   } else if (const auto *CR = | 
|  134                  llvm::dyn_cast<ConstantRelocatable>(getOffset())) { |  151                  llvm::dyn_cast<ConstantRelocatable>(getOffset())) { | 
|  135     // TODO(sehr): ConstantRelocatable still needs updating for |  152     // TODO(sehr): ConstantRelocatable still needs updating for | 
|  136     // rematerializable base/index and Disp. |  153     // rematerializable base/index and Disp. | 
|  137     assert(Disp == 0); |  154     assert(Disp == 0); | 
|  138     CR->emitWithoutPrefix(Func->getTarget()); |  155     CR->emitWithoutPrefix(Target); | 
|  139   } else { |  156   } else { | 
|  140     llvm_unreachable("Invalid offset type for x86 mem operand"); |  157     llvm_unreachable("Invalid offset type for x86 mem operand"); | 
|  141   } |  158   } | 
|  142  |  159  | 
|  143   if (getBase() || getIndex()) { |  160   if (getBase() || getIndex()) { | 
|  144     Str << "("; |  161     Str << "("; | 
|  145     if (getBase()) |  162     if (getBase()) | 
|  146       getBase()->emit(Func); |  163       getBase()->emit(Func); | 
|  147     if (getIndex()) { |  164     if (getIndex()) { | 
|  148       Str << ","; |  165       Str << ","; | 
|  149       getIndex()->emit(Func); |  166       getIndex()->emit(Func); | 
|  150       if (getShift()) |  167       if (getShift()) | 
|  151         Str << "," << (1u << getShift()); |  168         Str << "," << (1u << getShift()); | 
|  152     } |  169     } | 
|  153     Str << ")"; |  170     Str << ")"; | 
|  154   } |  171   } | 
|  155 } |  172 } | 
|  156  |  173  | 
|  157 void MachineTraits<TargetX8632>::X86OperandMem::dump(const Cfg *Func, |  174 void MachineTraits<TargetX8632>::X86OperandMem::dump(const Cfg *Func, | 
|  158                                                      Ostream &Str) const { |  175                                                      Ostream &Str) const { | 
|  159   if (!BuildDefs::dump()) |  176   if (!BuildDefs::dump()) | 
|  160     return; |  177     return; | 
|  161   if (SegmentReg != DefaultSegment) { |  178   if (SegmentReg != DefaultSegment) { | 
|  162     assert(SegmentReg >= 0 && SegmentReg < SegReg_NUM); |  179     assert(SegmentReg >= 0 && SegmentReg < SegReg_NUM); | 
|  163     Str << X8632::Traits::InstSegmentRegNames[SegmentReg] << ":"; |  180     Str << X8632::Traits::InstSegmentRegNames[SegmentReg] << ":"; | 
|  164   } |  181   } | 
|  165   bool Dumped = false; |  182   bool Dumped = false; | 
|  166   Str << "["; |  183   Str << "["; | 
|  167   int32_t Disp = 0; |  184   int32_t Disp = 0; | 
 |  185   const auto *Target = static_cast<const Ice::TargetX8632 *>(Func->getTarget()); | 
|  168   if (getBase() && getBase()->isRematerializable()) { |  186   if (getBase() && getBase()->isRematerializable()) { | 
|  169     Disp += getBase()->getStackOffset(); |  187     Disp += | 
|  170     if (!getIgnoreStackAdjust()) |  188         GetRematerializableOffset(getBase(), getIgnoreStackAdjust(), Target); | 
|  171       Disp += Func->getTarget()->getStackAdjustment(); |  | 
|  172   } |  189   } | 
|  173   if (getBase()) { |  190   if (getBase()) { | 
|  174     if (Func) |  191     if (Func) | 
|  175       getBase()->dump(Func); |  192       getBase()->dump(Func); | 
|  176     else |  193     else | 
|  177       getBase()->dump(Str); |  194       getBase()->dump(Str); | 
|  178     Dumped = true; |  195     Dumped = true; | 
|  179   } |  196   } | 
|  180   if (getIndex()) { |  197   if (getIndex()) { | 
|  181     assert(!getIndex()->isRematerializable()); |  198     assert(!getIndex()->isRematerializable()); | 
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|  223     MachineTraits<TargetX8632>::Assembler *Asm) const { |  240     MachineTraits<TargetX8632>::Assembler *Asm) const { | 
|  224   if (SegmentReg != DefaultSegment) { |  241   if (SegmentReg != DefaultSegment) { | 
|  225     assert(SegmentReg >= 0 && SegmentReg < SegReg_NUM); |  242     assert(SegmentReg >= 0 && SegmentReg < SegReg_NUM); | 
|  226     Asm->emitSegmentOverride(X8632::Traits::InstSegmentPrefixes[SegmentReg]); |  243     Asm->emitSegmentOverride(X8632::Traits::InstSegmentPrefixes[SegmentReg]); | 
|  227   } |  244   } | 
|  228 } |  245 } | 
|  229  |  246  | 
|  230 MachineTraits<TargetX8632>::Address |  247 MachineTraits<TargetX8632>::Address | 
|  231 MachineTraits<TargetX8632>::X86OperandMem::toAsmAddress( |  248 MachineTraits<TargetX8632>::X86OperandMem::toAsmAddress( | 
|  232     MachineTraits<TargetX8632>::Assembler *Asm, |  249     MachineTraits<TargetX8632>::Assembler *Asm, | 
|  233     const Ice::TargetLowering *Target) const { |  250     const Ice::TargetLowering *TargetLowering) const { | 
|  234   int32_t Disp = 0; |  251   int32_t Disp = 0; | 
 |  252   const auto *Target = static_cast<const Ice::TargetX8632 *>(TargetLowering); | 
|  235   if (getBase() && getBase()->isRematerializable()) { |  253   if (getBase() && getBase()->isRematerializable()) { | 
|  236     Disp += getBase()->getStackOffset(); |  254     Disp += | 
|  237     if (!getIgnoreStackAdjust()) { |  255         GetRematerializableOffset(getBase(), getIgnoreStackAdjust(), Target); | 
|  238       Disp += Target->getStackAdjustment(); |  | 
|  239     } |  | 
|  240   } |  256   } | 
|  241   // The index should never be rematerializable.  But if we ever allow it, then |  257   // The index should never be rematerializable.  But if we ever allow it, then | 
|  242   // we should make sure the rematerialization offset is shifted by the Shift |  258   // we should make sure the rematerialization offset is shifted by the Shift | 
|  243   // value. |  259   // value. | 
|  244   if (getIndex()) |  260   if (getIndex()) | 
|  245     assert(!getIndex()->isRematerializable()); |  261     assert(!getIndex()->isRematerializable()); | 
|  246   AssemblerFixup *Fixup = nullptr; |  262   AssemblerFixup *Fixup = nullptr; | 
|  247   // Determine the offset (is it relocatable?) |  263   // Determine the offset (is it relocatable?) | 
|  248   if (getOffset()) { |  264   if (getOffset()) { | 
|  249     if (const auto *CI = llvm::dyn_cast<ConstantInteger32>(getOffset())) { |  265     if (const auto *CI = llvm::dyn_cast<ConstantInteger32>(getOffset())) { | 
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|  317     Var->dump(Func); |  333     Var->dump(Func); | 
|  318   else |  334   else | 
|  319     Var->dump(Str); |  335     Var->dump(Str); | 
|  320   Str << ")"; |  336   Str << ")"; | 
|  321 } |  337 } | 
|  322  |  338  | 
|  323 } // namespace X86Internal |  339 } // namespace X86Internal | 
|  324 } // end of namespace Ice |  340 } // end of namespace Ice | 
|  325  |  341  | 
|  326 X86INSTS_DEFINE_STATIC_DATA(TargetX8632) |  342 X86INSTS_DEFINE_STATIC_DATA(TargetX8632) | 
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