| Index: src/a64/assembler-a64.cc
|
| diff --git a/src/a64/assembler-a64.cc b/src/a64/assembler-a64.cc
|
| index ec90b557c639fe5ada4324549e7d29f9d71e28a5..fba1be9144fefae3d03ec40a4e2fc2587a62a25a 100644
|
| --- a/src/a64/assembler-a64.cc
|
| +++ b/src/a64/assembler-a64.cc
|
| @@ -30,6 +30,8 @@
|
|
|
| #if V8_TARGET_ARCH_A64
|
|
|
| +#define A64_DEFINE_REG_STATICS
|
| +
|
| #include "a64/assembler-a64-inl.h"
|
|
|
| namespace v8 {
|
| @@ -55,7 +57,7 @@ CPURegister CPURegList::PopLowestIndex() {
|
| int index = CountTrailingZeros(list_, kRegListSizeInBits);
|
| ASSERT((1 << index) & list_);
|
| Remove(index);
|
| - return CPURegister(index, size_, type_);
|
| + return CPURegister::Create(index, size_, type_);
|
| }
|
|
|
|
|
| @@ -68,7 +70,7 @@ CPURegister CPURegList::PopHighestIndex() {
|
| index = kRegListSizeInBits - 1 - index;
|
| ASSERT((1 << index) & list_);
|
| Remove(index);
|
| - return CPURegister(index, size_, type_);
|
| + return CPURegister::Create(index, size_, type_);
|
| }
|
|
|
|
|
| @@ -111,12 +113,6 @@ CPURegList CPURegList::GetCallerSavedFP(unsigned size) {
|
| }
|
|
|
|
|
| -const CPURegList kCalleeSaved = CPURegList::GetCalleeSaved();
|
| -const CPURegList kCalleeSavedFP = CPURegList::GetCalleeSavedFP();
|
| -const CPURegList kCallerSaved = CPURegList::GetCallerSaved();
|
| -const CPURegList kCallerSavedFP = CPURegList::GetCallerSavedFP();
|
| -
|
| -
|
| // This function defines the list of registers which are associated with a
|
| // safepoint slot. Safepoint register slots are saved contiguously on the stack.
|
| // MacroAssembler::SafepointRegisterStackIndex handles mapping from register
|
| @@ -184,31 +180,6 @@ void RelocInfo::PatchCodeWithCall(Address target, int guard_bytes) {
|
| }
|
|
|
|
|
| -// Registers.
|
| -#define XREG(n) x##n,
|
| -const Register Register::xregisters[] = {
|
| -REGISTER_CODE_LIST(XREG)
|
| -};
|
| -#undef XREG
|
| -
|
| -#define WREG(n) w##n,
|
| -const Register Register::wregisters[] = {
|
| -REGISTER_CODE_LIST(WREG)
|
| -};
|
| -#undef WREG
|
| -
|
| -#define SREG(n) s##n,
|
| -const FPRegister FPRegister::sregisters[] = {
|
| -REGISTER_CODE_LIST(SREG)
|
| -};
|
| -#undef SREG
|
| -
|
| -#define DREG(n) d##n,
|
| -const FPRegister FPRegister::dregisters[] = {
|
| -REGISTER_CODE_LIST(DREG)
|
| -};
|
| -#undef DREG
|
| -
|
| bool AreAliased(const CPURegister& reg1, const CPURegister& reg2,
|
| const CPURegister& reg3, const CPURegister& reg4,
|
| const CPURegister& reg5, const CPURegister& reg6,
|
| @@ -1955,7 +1926,7 @@ void Assembler::EmitExtendShift(const Register& rd,
|
| ASSERT(rd.SizeInBits() >= rn.SizeInBits());
|
| unsigned reg_size = rd.SizeInBits();
|
| // Use the correct size of register.
|
| - Register rn_ = Register(rn.code(), rd.SizeInBits());
|
| + Register rn_ = Register::Create(rn.code(), rd.SizeInBits());
|
| // Bits extracted are high_bit:0.
|
| unsigned high_bit = (8 << (extend & 0x3)) - 1;
|
| // Number of bits left in the result that are not introduced by the shift.
|
|
|