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| 1 // Copyright 2013 the V8 project authors. All rights reserved. | 1 // Copyright 2013 the V8 project authors. All rights reserved. |
| 2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
| 3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
| 4 // met: | 4 // met: |
| 5 // | 5 // |
| 6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
| 7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
| 8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
| 9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
| 10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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| 4489 if (!args[i].Is64Bits()) { | 4489 if (!args[i].Is64Bits()) { |
| 4490 const Register& as_x = args[i].X(); | 4490 const Register& as_x = args[i].X(); |
| 4491 And(as_x, as_x, 0x00000000ffffffff); | 4491 And(as_x, as_x, 0x00000000ffffffff); |
| 4492 args[i] = as_x; | 4492 args[i] = as_x; |
| 4493 } | 4493 } |
| 4494 } else if (args[i].IsFPRegister()) { | 4494 } else if (args[i].IsFPRegister()) { |
| 4495 pcs[i] = FPRegister::DRegFromCode(i); | 4495 pcs[i] = FPRegister::DRegFromCode(i); |
| 4496 // C and C++ varargs functions (such as printf) implicitly promote float | 4496 // C and C++ varargs functions (such as printf) implicitly promote float |
| 4497 // arguments to doubles. | 4497 // arguments to doubles. |
| 4498 if (!args[i].Is64Bits()) { | 4498 if (!args[i].Is64Bits()) { |
| 4499 FPRegister s(args[i]); | 4499 FPRegister s = FPRegister(args[i]); |
| 4500 const FPRegister& as_d = args[i].D(); | 4500 const FPRegister& as_d = args[i].D(); |
| 4501 Fcvt(as_d, s); | 4501 Fcvt(as_d, s); |
| 4502 args[i] = as_d; | 4502 args[i] = as_d; |
| 4503 } | 4503 } |
| 4504 } else { | 4504 } else { |
| 4505 // This is the first empty (NoCPUReg) argument, so use it to set the | 4505 // This is the first empty (NoCPUReg) argument, so use it to set the |
| 4506 // argument count and bail out. | 4506 // argument count and bail out. |
| 4507 arg_count = i; | 4507 arg_count = i; |
| 4508 break; | 4508 break; |
| 4509 } | 4509 } |
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| 4537 Push(args[1], args[0]); | 4537 Push(args[1], args[0]); |
| 4538 } | 4538 } |
| 4539 | 4539 |
| 4540 if ((arg_count % 2) != 0) { | 4540 if ((arg_count % 2) != 0) { |
| 4541 // Move the left-over register directly. | 4541 // Move the left-over register directly. |
| 4542 const CPURegister& leftover_arg = args[arg_count - 1]; | 4542 const CPURegister& leftover_arg = args[arg_count - 1]; |
| 4543 const CPURegister& leftover_pcs = pcs[arg_count - 1]; | 4543 const CPURegister& leftover_pcs = pcs[arg_count - 1]; |
| 4544 if (leftover_arg.IsRegister()) { | 4544 if (leftover_arg.IsRegister()) { |
| 4545 Mov(Register(leftover_pcs), Register(leftover_arg)); | 4545 Mov(Register(leftover_pcs), Register(leftover_arg)); |
| 4546 } else { | 4546 } else { |
| 4547 Fmov(FPRegister(leftover_pcs), FPRegister(leftover_arg)); | 4547 Fmov(Register(leftover_pcs), FPRegister(leftover_arg)); |
|
Rodolph Perfetta (ARM)
2014/02/06 11:51:21
FPRegister
| |
| 4548 } | 4548 } |
| 4549 } | 4549 } |
| 4550 | 4550 |
| 4551 if (arg_count >= 4) { | 4551 if (arg_count >= 4) { |
| 4552 Pop(pcs[0], pcs[1], pcs[2], pcs[3]); | 4552 Pop(pcs[0], pcs[1], pcs[2], pcs[3]); |
| 4553 } else if (arg_count >= 2) { | 4553 } else if (arg_count >= 2) { |
| 4554 Pop(pcs[0], pcs[1]); | 4554 Pop(pcs[0], pcs[1]); |
| 4555 } | 4555 } |
| 4556 | 4556 |
| 4557 // Load the format string into x0, as per the procedure-call standard. | 4557 // Load the format string into x0, as per the procedure-call standard. |
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| 4760 } | 4760 } |
| 4761 } | 4761 } |
| 4762 | 4762 |
| 4763 | 4763 |
| 4764 #undef __ | 4764 #undef __ |
| 4765 | 4765 |
| 4766 | 4766 |
| 4767 } } // namespace v8::internal | 4767 } } // namespace v8::internal |
| 4768 | 4768 |
| 4769 #endif // V8_TARGET_ARCH_A64 | 4769 #endif // V8_TARGET_ARCH_A64 |
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