A64: Eliminate static initializers

src/a64/assembler-a64.cc

 // Copyright 2013 the V8 project authors. All rights reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
@@ skipping 12 matching lines @@
 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
 #include "v8.h"
 
 #if V8_TARGET_ARCH_A64
 
+#define A64_DEFINE_REG_STATICS
+
 #include "a64/assembler-a64-inl.h"
 
 namespace v8 {
 namespace internal {
 
 
 // -----------------------------------------------------------------------------
 // CpuFeatures utilities (for V8 compatibility).
 
 ExternalReference ExternalReference::cpu_features() {
   return ExternalReference(&CpuFeatures::supported_);
 }
 
 
 // -----------------------------------------------------------------------------
 // CPURegList utilities.
 
 CPURegister CPURegList::PopLowestIndex() {
   ASSERT(IsValid());
   if (IsEmpty()) {
     return NoCPUReg;
   }
   int index = CountTrailingZeros(list_, kRegListSizeInBits);
   ASSERT((1 << index) & list_);
   Remove(index);
-  return CPURegister(index, size_, type_);
+  return CPURegister::Create(index, size_, type_);
 }
 
 
 CPURegister CPURegList::PopHighestIndex() {
   ASSERT(IsValid());
   if (IsEmpty()) {
     return NoCPUReg;
   }
   int index = CountLeadingZeros(list_, kRegListSizeInBits);
   index = kRegListSizeInBits - 1 - index;
   ASSERT((1 << index) & list_);
   Remove(index);
-  return CPURegister(index, size_, type_);
+  return CPURegister::Create(index, size_, type_);
 }
 
 
 void CPURegList::RemoveCalleeSaved() {
   if (type() == CPURegister::kRegister) {
     Remove(GetCalleeSaved(RegisterSizeInBits()));
   } else if (type() == CPURegister::kFPRegister) {
     Remove(GetCalleeSavedFP(RegisterSizeInBits()));
   } else {
     ASSERT(type() == CPURegister::kNoRegister);
@@ skipping 22 matching lines @@
 
 
 CPURegList CPURegList::GetCallerSavedFP(unsigned size) {
   // Registers d0-d7 and d16-d31 are caller-saved.
   CPURegList list = CPURegList(CPURegister::kFPRegister, size, 0, 7);
   list.Combine(CPURegList(CPURegister::kFPRegister, size, 16, 31));
   return list;
 }
 
 
-const CPURegList kCalleeSaved = CPURegList::GetCalleeSaved();
-const CPURegList kCalleeSavedFP = CPURegList::GetCalleeSavedFP();
-const CPURegList kCallerSaved = CPURegList::GetCallerSaved();
-const CPURegList kCallerSavedFP = CPURegList::GetCallerSavedFP();
-
-
 // This function defines the list of registers which are associated with a
 // safepoint slot. Safepoint register slots are saved contiguously on the stack.
 // MacroAssembler::SafepointRegisterStackIndex handles mapping from register
 // code to index in the safepoint register slots. Any change here can affect
 // this mapping.
 CPURegList CPURegList::GetSafepointSavedRegisters() {
   CPURegList list = CPURegList::GetCalleeSaved();
   list.Combine(CPURegList(CPURegister::kRegister, kXRegSize, kJSCallerSaved));
 
   // Note that unfortunately we can't use symbolic names for registers and have
@@ skipping 47 matching lines @@
 }
 
 
 // Patch the code at the current PC with a call to the target address.
 // Additional guard instructions can be added if required.
 void RelocInfo::PatchCodeWithCall(Address target, int guard_bytes) {
   UNIMPLEMENTED();
 }
 
 
-// Registers.
-#define XREG(n) x##n,
-const Register Register::xregisters[] = {
-REGISTER_CODE_LIST(XREG)
-};
-#undef XREG
-
-#define WREG(n) w##n,
-const Register Register::wregisters[] = {
-REGISTER_CODE_LIST(WREG)
-};
-#undef WREG
-
-#define SREG(n) s##n,
-const FPRegister FPRegister::sregisters[] = {
-REGISTER_CODE_LIST(SREG)
-};
-#undef SREG
-
-#define DREG(n) d##n,
-const FPRegister FPRegister::dregisters[] = {
-REGISTER_CODE_LIST(DREG)
-};
-#undef DREG
-
 bool AreAliased(const CPURegister& reg1, const CPURegister& reg2,
                 const CPURegister& reg3, const CPURegister& reg4,
                 const CPURegister& reg5, const CPURegister& reg6,
                 const CPURegister& reg7, const CPURegister& reg8) {
   int number_of_valid_regs = 0;
   int number_of_valid_fpregs = 0;
 
   RegList unique_regs = 0;
   RegList unique_fpregs = 0;
 
@@ skipping 1726 matching lines @@
 }
 
 
 void Assembler::EmitExtendShift(const Register& rd,
                                 const Register& rn,
                                 Extend extend,
                                 unsigned left_shift) {
   ASSERT(rd.SizeInBits() >= rn.SizeInBits());
   unsigned reg_size = rd.SizeInBits();
   // Use the correct size of register.
-  Register rn_ = Register(rn.code(), rd.SizeInBits());
+  Register rn_ = Register::Create(rn.code(), rd.SizeInBits());
   // Bits extracted are high_bit:0.
   unsigned high_bit = (8 << (extend & 0x3)) - 1;
   // Number of bits left in the result that are not introduced by the shift.
   unsigned non_shift_bits = (reg_size - left_shift) & (reg_size - 1);
 
   if ((non_shift_bits > high_bit) || (non_shift_bits == 0)) {
     switch (extend) {
       case UXTB:
       case UXTH:
       case UXTW: ubfm(rd, rn_, non_shift_bits, high_bit); break;
@@ skipping 545 matching lines @@
   // code.
 #ifdef ENABLE_DEBUGGER_SUPPORT
   RecordRelocInfo(RelocInfo::CONST_POOL, static_cast<intptr_t>(size));
 #endif
 }
 
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_A64