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| 1 // Copyright 2013 the V8 project authors. All rights reserved. | 1 // Copyright 2013 the V8 project authors. All rights reserved. |
| 2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
| 3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
| 4 // met: | 4 // met: |
| 5 // | 5 // |
| 6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
| 7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
| 8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
| 9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
| 10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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| 48 if (mode == UPDATE_WRITE_BARRIER && host() != NULL && IsCodeTarget(rmode_)) { | 48 if (mode == UPDATE_WRITE_BARRIER && host() != NULL && IsCodeTarget(rmode_)) { |
| 49 Object* target_code = Code::GetCodeFromTargetAddress(target); | 49 Object* target_code = Code::GetCodeFromTargetAddress(target); |
| 50 host()->GetHeap()->incremental_marking()->RecordWriteIntoCode( | 50 host()->GetHeap()->incremental_marking()->RecordWriteIntoCode( |
| 51 host(), this, HeapObject::cast(target_code)); | 51 host(), this, HeapObject::cast(target_code)); |
| 52 } | 52 } |
| 53 } | 53 } |
| 54 | 54 |
| 55 | 55 |
| 56 inline unsigned CPURegister::code() const { | 56 inline unsigned CPURegister::code() const { |
| 57 ASSERT(IsValid()); | 57 ASSERT(IsValid()); |
| 58 return code_; | 58 return reg_code; |
| 59 } | 59 } |
| 60 | 60 |
| 61 | 61 |
| 62 inline CPURegister::RegisterType CPURegister::type() const { | 62 inline CPURegister::RegisterType CPURegister::type() const { |
| 63 ASSERT(IsValidOrNone()); | 63 ASSERT(IsValidOrNone()); |
| 64 return type_; | 64 return reg_type; |
| 65 } | 65 } |
| 66 | 66 |
| 67 | 67 |
| 68 inline RegList CPURegister::Bit() const { | 68 inline RegList CPURegister::Bit() const { |
| 69 ASSERT(code_ < (sizeof(RegList) * kBitsPerByte)); | 69 ASSERT(reg_code < (sizeof(RegList) * kBitsPerByte)); |
| 70 return IsValid() ? 1UL << code_ : 0; | 70 return IsValid() ? 1UL << reg_code : 0; |
| 71 } | 71 } |
| 72 | 72 |
| 73 | 73 |
| 74 inline unsigned CPURegister::SizeInBits() const { | 74 inline unsigned CPURegister::SizeInBits() const { |
| 75 ASSERT(IsValid()); | 75 ASSERT(IsValid()); |
| 76 return size_; | 76 return reg_size; |
| 77 } | 77 } |
| 78 | 78 |
| 79 | 79 |
| 80 inline int CPURegister::SizeInBytes() const { | 80 inline int CPURegister::SizeInBytes() const { |
| 81 ASSERT(IsValid()); | 81 ASSERT(IsValid()); |
| 82 ASSERT(SizeInBits() % 8 == 0); | 82 ASSERT(SizeInBits() % 8 == 0); |
| 83 return size_ / 8; | 83 return reg_size / 8; |
| 84 } | 84 } |
| 85 | 85 |
| 86 | 86 |
| 87 inline bool CPURegister::Is32Bits() const { | 87 inline bool CPURegister::Is32Bits() const { |
| 88 ASSERT(IsValid()); | 88 ASSERT(IsValid()); |
| 89 return size_ == 32; | 89 return reg_size == 32; |
| 90 } | 90 } |
| 91 | 91 |
| 92 | 92 |
| 93 inline bool CPURegister::Is64Bits() const { | 93 inline bool CPURegister::Is64Bits() const { |
| 94 ASSERT(IsValid()); | 94 ASSERT(IsValid()); |
| 95 return size_ == 64; | 95 return reg_size == 64; |
| 96 } | 96 } |
| 97 | 97 |
| 98 | 98 |
| 99 inline bool CPURegister::IsValid() const { | 99 inline bool CPURegister::IsValid() const { |
| 100 if (IsValidRegister() || IsValidFPRegister()) { | 100 if (IsValidRegister() || IsValidFPRegister()) { |
| 101 ASSERT(!IsNone()); | 101 ASSERT(!IsNone()); |
| 102 return true; | 102 return true; |
| 103 } else { | 103 } else { |
| 104 ASSERT(IsNone()); | 104 ASSERT(IsNone()); |
| 105 return false; | 105 return false; |
| 106 } | 106 } |
| 107 } | 107 } |
| 108 | 108 |
| 109 | 109 |
| 110 inline bool CPURegister::IsValidRegister() const { | 110 inline bool CPURegister::IsValidRegister() const { |
| 111 return IsRegister() && | 111 return IsRegister() && |
| 112 ((size_ == kWRegSize) || (size_ == kXRegSize)) && | 112 ((reg_size == kWRegSize) || (reg_size == kXRegSize)) && |
| 113 ((code_ < kNumberOfRegisters) || (code_ == kSPRegInternalCode)); | 113 ((reg_code < kNumberOfRegisters) || (reg_code == kSPRegInternalCode)); |
| 114 } | 114 } |
| 115 | 115 |
| 116 | 116 |
| 117 inline bool CPURegister::IsValidFPRegister() const { | 117 inline bool CPURegister::IsValidFPRegister() const { |
| 118 return IsFPRegister() && | 118 return IsFPRegister() && |
| 119 ((size_ == kSRegSize) || (size_ == kDRegSize)) && | 119 ((reg_size == kSRegSize) || (reg_size == kDRegSize)) && |
| 120 (code_ < kNumberOfFPRegisters); | 120 (reg_code < kNumberOfFPRegisters); |
| 121 } | 121 } |
| 122 | 122 |
| 123 | 123 |
| 124 inline bool CPURegister::IsNone() const { | 124 inline bool CPURegister::IsNone() const { |
| 125 // kNoRegister types should always have size 0 and code 0. | 125 // kNoRegister types should always have size 0 and code 0. |
| 126 ASSERT((type_ != kNoRegister) || (code_ == 0)); | 126 ASSERT((reg_type != kNoRegister) || (reg_code == 0)); |
| 127 ASSERT((type_ != kNoRegister) || (size_ == 0)); | 127 ASSERT((reg_type != kNoRegister) || (reg_size == 0)); |
| 128 | 128 |
| 129 return type_ == kNoRegister; | 129 return reg_type == kNoRegister; |
| 130 } | 130 } |
| 131 | 131 |
| 132 | 132 |
| 133 inline bool CPURegister::Is(const CPURegister& other) const { | 133 inline bool CPURegister::Is(const CPURegister& other) const { |
| 134 ASSERT(IsValidOrNone() && other.IsValidOrNone()); | 134 ASSERT(IsValidOrNone() && other.IsValidOrNone()); |
| 135 return (code_ == other.code_) && (size_ == other.size_) && | 135 return (reg_code == other.reg_code) && (reg_size == other.reg_size) && |
| 136 (type_ == other.type_); | 136 (reg_type == other.reg_type); |
| 137 } | 137 } |
| 138 | 138 |
| 139 | 139 |
| 140 inline bool CPURegister::IsRegister() const { | 140 inline bool CPURegister::IsRegister() const { |
| 141 return type_ == kRegister; | 141 return reg_type == kRegister; |
| 142 } | 142 } |
| 143 | 143 |
| 144 | 144 |
| 145 inline bool CPURegister::IsFPRegister() const { | 145 inline bool CPURegister::IsFPRegister() const { |
| 146 return type_ == kFPRegister; | 146 return reg_type == kFPRegister; |
| 147 } | 147 } |
| 148 | 148 |
| 149 | 149 |
| 150 inline bool CPURegister::IsSameSizeAndType(const CPURegister& other) const { | 150 inline bool CPURegister::IsSameSizeAndType(const CPURegister& other) const { |
| 151 return (size_ == other.size_) && (type_ == other.type_); | 151 return (reg_size == other.reg_size) && (reg_type == other.reg_type); |
| 152 } | 152 } |
| 153 | 153 |
| 154 | 154 |
| 155 inline bool CPURegister::IsValidOrNone() const { | 155 inline bool CPURegister::IsValidOrNone() const { |
| 156 return IsValid() || IsNone(); | 156 return IsValid() || IsNone(); |
| 157 } | 157 } |
| 158 | 158 |
| 159 | 159 |
| 160 inline bool CPURegister::IsZero() const { | 160 inline bool CPURegister::IsZero() const { |
| 161 ASSERT(IsValid()); | 161 ASSERT(IsValid()); |
| 162 return IsRegister() && (code_ == kZeroRegCode); | 162 return IsRegister() && (reg_code == kZeroRegCode); |
| 163 } | 163 } |
| 164 | 164 |
| 165 | 165 |
| 166 inline bool CPURegister::IsSP() const { | 166 inline bool CPURegister::IsSP() const { |
| 167 ASSERT(IsValid()); | 167 ASSERT(IsValid()); |
| 168 return IsRegister() && (code_ == kSPRegInternalCode); | 168 return IsRegister() && (reg_code == kSPRegInternalCode); |
| 169 } | 169 } |
| 170 | 170 |
| 171 | 171 |
| 172 inline void CPURegList::Combine(const CPURegList& other) { | 172 inline void CPURegList::Combine(const CPURegList& other) { |
| 173 ASSERT(IsValid()); | 173 ASSERT(IsValid()); |
| 174 ASSERT(other.type() == type_); | 174 ASSERT(other.type() == type_); |
| 175 ASSERT(other.RegisterSizeInBits() == size_); | 175 ASSERT(other.RegisterSizeInBits() == size_); |
| 176 list_ |= other.list(); | 176 list_ |= other.list(); |
| 177 } | 177 } |
| 178 | 178 |
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| 194 | 194 |
| 195 inline void CPURegList::Remove(const CPURegister& other) { | 195 inline void CPURegList::Remove(const CPURegister& other) { |
| 196 ASSERT(other.type() == type_); | 196 ASSERT(other.type() == type_); |
| 197 ASSERT(other.SizeInBits() == size_); | 197 ASSERT(other.SizeInBits() == size_); |
| 198 Remove(other.code()); | 198 Remove(other.code()); |
| 199 } | 199 } |
| 200 | 200 |
| 201 | 201 |
| 202 inline void CPURegList::Combine(int code) { | 202 inline void CPURegList::Combine(int code) { |
| 203 ASSERT(IsValid()); | 203 ASSERT(IsValid()); |
| 204 ASSERT(CPURegister(code, size_, type_).IsValid()); | 204 ASSERT(CPURegister::Create(code, size_, type_).IsValid()); |
| 205 list_ |= (1UL << code); | 205 list_ |= (1UL << code); |
| 206 } | 206 } |
| 207 | 207 |
| 208 | 208 |
| 209 inline void CPURegList::Remove(int code) { | 209 inline void CPURegList::Remove(int code) { |
| 210 ASSERT(IsValid()); | 210 ASSERT(IsValid()); |
| 211 ASSERT(CPURegister(code, size_, type_).IsValid()); | 211 ASSERT(CPURegister::Create(code, size_, type_).IsValid()); |
| 212 list_ &= ~(1UL << code); | 212 list_ &= ~(1UL << code); |
| 213 } | 213 } |
| 214 | 214 |
| 215 | 215 |
| 216 inline const Register& Register::XRegFromCode(unsigned code) { | 216 inline Register Register::XRegFromCode(unsigned code) { |
| 217 // This function returns the zero register when code = 31. The stack pointer | 217 // This function returns the zero register when code = 31. The stack pointer |
| 218 // can not be returned. | 218 // can not be returned. |
| 219 ASSERT(code < kNumberOfRegisters); | 219 ASSERT(code < kNumberOfRegisters); |
| 220 return xregisters[code]; | 220 return Register::Create(code, kXRegSize); |
| 221 } | 221 } |
| 222 | 222 |
| 223 | 223 |
| 224 inline const Register& Register::WRegFromCode(unsigned code) { | 224 inline Register Register::WRegFromCode(unsigned code) { |
| 225 ASSERT(code < kNumberOfRegisters); | 225 ASSERT(code < kNumberOfRegisters); |
| 226 return wregisters[code]; | 226 return Register::Create(code, kWRegSize); |
| 227 } | 227 } |
| 228 | 228 |
| 229 | 229 |
| 230 inline const FPRegister& FPRegister::SRegFromCode(unsigned code) { | 230 inline FPRegister FPRegister::SRegFromCode(unsigned code) { |
| 231 ASSERT(code < kNumberOfFPRegisters); | 231 ASSERT(code < kNumberOfFPRegisters); |
| 232 return sregisters[code]; | 232 return FPRegister::Create(code, kSRegSize); |
| 233 } | 233 } |
| 234 | 234 |
| 235 | 235 |
| 236 inline const FPRegister& FPRegister::DRegFromCode(unsigned code) { | 236 inline FPRegister FPRegister::DRegFromCode(unsigned code) { |
| 237 ASSERT(code < kNumberOfFPRegisters); | 237 ASSERT(code < kNumberOfFPRegisters); |
| 238 return dregisters[code]; | 238 return FPRegister::Create(code, kDRegSize); |
| 239 } | 239 } |
| 240 | 240 |
| 241 | 241 |
| 242 inline const Register& CPURegister::W() const { | 242 inline Register CPURegister::W() const { |
| 243 ASSERT(IsValidRegister()); | 243 ASSERT(IsValidRegister()); |
| 244 return Register::WRegFromCode(code_); | 244 return Register::WRegFromCode(reg_code); |
| 245 } | 245 } |
| 246 | 246 |
| 247 | 247 |
| 248 inline const Register& CPURegister::X() const { | 248 inline Register CPURegister::X() const { |
| 249 ASSERT(IsValidRegister()); | 249 ASSERT(IsValidRegister()); |
| 250 return Register::XRegFromCode(code_); | 250 return Register::XRegFromCode(reg_code); |
| 251 } | 251 } |
| 252 | 252 |
| 253 | 253 |
| 254 inline const FPRegister& CPURegister::S() const { | 254 inline FPRegister CPURegister::S() const { |
| 255 ASSERT(IsValidFPRegister()); | 255 ASSERT(IsValidFPRegister()); |
| 256 return FPRegister::SRegFromCode(code_); | 256 return FPRegister::SRegFromCode(reg_code); |
| 257 } | 257 } |
| 258 | 258 |
| 259 | 259 |
| 260 inline const FPRegister& CPURegister::D() const { | 260 inline FPRegister CPURegister::D() const { |
| 261 ASSERT(IsValidFPRegister()); | 261 ASSERT(IsValidFPRegister()); |
| 262 return FPRegister::DRegFromCode(code_); | 262 return FPRegister::DRegFromCode(reg_code); |
| 263 } | 263 } |
| 264 | 264 |
| 265 | 265 |
| 266 // Operand. | 266 // Operand. |
| 267 #define DECLARE_INT_OPERAND_CONSTRUCTOR(type) \ | 267 #define DECLARE_INT_OPERAND_CONSTRUCTOR(type) \ |
| 268 Operand::Operand(type immediate, RelocInfo::Mode rmode) \ | 268 Operand::Operand(type immediate, RelocInfo::Mode rmode) \ |
| 269 : immediate_(immediate), \ | 269 : immediate_(immediate), \ |
| 270 reg_(NoReg), \ | 270 reg_(NoReg), \ |
| 271 rmode_(rmode) {} | 271 rmode_(rmode) {} |
| 272 DECLARE_INT_OPERAND_CONSTRUCTOR(int64_t) | 272 DECLARE_INT_OPERAND_CONSTRUCTOR(int64_t) |
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| 1144 | 1144 |
| 1145 | 1145 |
| 1146 void Assembler::ClearRecordedAstId() { | 1146 void Assembler::ClearRecordedAstId() { |
| 1147 recorded_ast_id_ = TypeFeedbackId::None(); | 1147 recorded_ast_id_ = TypeFeedbackId::None(); |
| 1148 } | 1148 } |
| 1149 | 1149 |
| 1150 | 1150 |
| 1151 } } // namespace v8::internal | 1151 } } // namespace v8::internal |
| 1152 | 1152 |
| 1153 #endif // V8_A64_ASSEMBLER_A64_INL_H_ | 1153 #endif // V8_A64_ASSEMBLER_A64_INL_H_ |
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