Add POP instruction to ARM integrated assembler.

src/IceInstARM32.cpp

 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 1098 matching lines @@
       continue;
     startNextInst(Func);
     Str << "\t"
         << "vpop"
         << "\t{";
     Op->emit(Func);
     Str << "}\n";
   }
 }
 
+void InstARM32Pop::emitIAS(const Cfg *Func) const {
+  SizeT DestReg = 0;

[Jim Stichnoth, 2015/11/09 23:04:11]

remove this

[Karl, 2015/11/10 16:32:22]

Done.

+  SizeT IntegerCount = 0;
+  ARM32::IValueT GPRegisters = 0;
+  SizeT Index = 0;

[Jim Stichnoth, 2015/11/09 23:04:11]

replace this with:
Variable *LastDest = nullptr;

[Karl, 2015/11/10 16:32:21]

Done.

+  for (const Variable *Var : Dests) {
+    if (!isScalarIntegerType(Var->getType()))
+      // TODO(kschimpf) Implement vpush.
+      return emitUsingTextFixup(Func);
+    assert((Var && Var->hasReg()) && "pop only applies to registers");
+    int32_t Reg = Var->getRegNum();
+    assert(Reg != RegARM32::Encoded_Not_GPR);
+    DestReg = Index;

[Jim Stichnoth, 2015/11/09 23:04:11]

replace this with:
LastDest = Var;

[Karl, 2015/11/10 16:32:22]

Done.

+    GPRegisters |= (1 << Reg);
+    ++IntegerCount;
+    ++Index;

[Jim Stichnoth, 2015/11/09 23:04:11]

remove this

[Karl, 2015/11/10 16:32:22]

Done.

+  }
+  auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
+  switch (IntegerCount) {
+  case 0:
+    return;
+  case 1: {
+    if (const Variable *Var = Dests[DestReg]) {

[Jim Stichnoth, 2015/11/09 23:04:11]

use LastDest instead of Dests[DestReg]

Also, LastDest is basically guaranteed to be non-null (though an assert wouldn't
hurt anything), so this whole "if" statement is unneeded.

[Karl, 2015/11/10 16:32:21]

Done.

+      // Note: Can only apply pop register if single register is not sp.
+      assert((RegARM32::Encoded_Reg_sp != Var->getRegNum()) &&
+             "Effects of pop register SP is undefined!");
+      // TODO(kschimpf) ARM sandbox does not allow the single register form of
+      // pop, and the popList form expects multiple registers. Convert this
+      // assert to a conditional check once it has been shown that popList
+      // works.
+      assert(!Func->getContext()->getFlags().getUseSandboxing() &&
+             "pop register not in ARM sandbox!");
+      Asm->pop(Var, CondARM32::AL);
+      break;
+    }
+    // Intentionally fall to next case.
+  }
+  default:
+    Asm->popList(GPRegisters, CondARM32::AL);
+    break;
+  }
+  if (Asm->needsTextFixup())
+    emitUsingTextFixup(Func);
+}
+
 void InstARM32Pop::dump(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "pop"
       << " ";
   for (SizeT I = 0; I < Dests.size(); ++I) {
     if (I > 0)
       Str << ", ";
     Dests[I]->dump(Func);
@@ skipping 63 matching lines @@
         PrintComma = true;
       }
     }
     Str << "}\n";
   }
 }
 
 void InstARM32Push::emitIAS(const Cfg *Func) const {
   SizeT SrcReg = 0;
   SizeT IntegerCount = 0;
-  ARM32::IValueT GPURegisters = 0;
-  for (SizeT i = 0; i < getSrcSize(); ++i) {
-    if (!isScalarIntegerType(getSrc(i)->getType()))
+  ARM32::IValueT GPRegisters = 0;
+  for (SizeT Index = 0; Index < getSrcSize(); ++Index) {
+    if (!isScalarIntegerType(getSrc(Index)->getType()))
       // TODO(kschimpf) Implement vpush.
       return emitUsingTextFixup(Func);
-    auto *Var = llvm::dyn_cast<Variable>(getSrc(i));
+    auto *Var = llvm::dyn_cast<Variable>(getSrc(Index));
     assert((Var && Var->hasReg()) && "push only applies to registers");
-    ARM32::IValueT Reg = Var->getRegNum();
-    assert(Reg != static_cast<ARM32::IValueT>(RegARM32::Encoded_Not_GPR));
-    SrcReg = i;
-    GPURegisters |= (1 << Reg);
+    int32_t Reg = Var->getRegNum();
+    assert(Reg != RegARM32::Encoded_Not_GPR);
+    SrcReg = Index;
+    GPRegisters |= (1 << Reg);
     ++IntegerCount;
   }
   auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
   switch (IntegerCount) {
   case 0:
     return;
   case 1: {
     if (auto *Var = llvm::dyn_cast<Variable>(getSrc(SrcReg))) {
       // Note: Can only apply push register if single register is not sp.
       assert((RegARM32::Encoded_Reg_sp != Var->getRegNum()) &&
              "Effects of push register SP is undefined!");
       // TODO(kschimpf) ARM sandbox does not allow the single register form of
       // push, and the pushList form expects multiple registers. Convert this
       // assert to a conditional check once it has been shown that pushList
       // works.
       assert(!Func->getContext()->getFlags().getUseSandboxing() &&
              "push register not in ARM sandbox!");
       Asm->push(Var, CondARM32::AL);
       break;
     }
     // Intentionally fall to next case.
   }
   default:
     // TODO(kschimpf) Implement pushList in assembler.
-    Asm->pushList(GPURegisters, CondARM32::AL);
+    Asm->pushList(GPRegisters, CondARM32::AL);
     break;
   }
   if (Asm->needsTextFixup())
     emitUsingTextFixup(Func);
 }
 
 void InstARM32Push::dump(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrDump();
@@ skipping 454 matching lines @@
 template class InstARM32UnaryopGPR<InstARM32::Uxt, true>;
 template class InstARM32UnaryopFP<InstARM32::Vsqrt>;
 
 template class InstARM32FourAddrGPR<InstARM32::Mla>;
 template class InstARM32FourAddrGPR<InstARM32::Mls>;
 
 template class InstARM32CmpLike<InstARM32::Cmp>;
 template class InstARM32CmpLike<InstARM32::Tst>;
 
 } // end of namespace Ice