Add POP instruction to ARM integrated assembler.

src/DartARM32/assembler_arm.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 //
 // This is forked from Dart revision df52deea9f25690eb8b66c5995da92b70f7ac1fe
 // Please update the (git) revision if we merge changes from Dart.
 // https://code.google.com/p/dart/wiki/GettingTheSource
 
 #include "vm/globals.h"  // NOLINT
 #if defined(TARGET_ARCH_ARM)
@@ skipping 531 matching lines @@
   ASSERT((rd % 2) == 0);
   if (TargetCPUFeatures::arm_version() == ARMv5TE) {
     const Register rd2 = static_cast<Register>(static_cast<int32_t>(rd) + 1);
     str(rd, Address(rn, offset), cond);
     str(rd2, Address(rn, offset + kWordSize), cond);
   } else {
     EmitMemOpAddressMode3(cond, B7 | B6 | B5 | B4, rd, Address(rn, offset));
   }
 }
 
-
+#if 0
+// Folded into ARM32::AssemblerARM32::popList(), since it is its only
+// use (and doesn't implement ARM STM instruction).
 void Assembler::ldm(BlockAddressMode am, Register base, RegList regs,
                     Condition cond) {
   ASSERT(regs != 0);
   EmitMultiMemOp(cond, am, true, base, regs);
 }
 
-
-#if 0
 // Folded into ARM32::AssemblerARM32::pushList(), since it is its only
 // use (and doesn't implement ARM STM instruction).
 void Assembler::stm(BlockAddressMode am, Register base, RegList regs,
                     Condition cond) {
   ASSERT(regs != 0);
   EmitMultiMemOp(cond, am, false, base, regs);
 }
 #endif
 
 
@@ skipping 1990 matching lines @@
     bool is_load, intptr_t cid, int64_t offset) {
   int32_t offset_mask = 0;
   if (is_load) {
     return CanHoldLoadOffset(OperandSizeFor(cid), offset, &offset_mask);
   } else {
     return CanHoldStoreOffset(OperandSizeFor(cid), offset, &offset_mask);
   }
 }
 
 #if 0
-// Moved to ARM32::AssemblerARM32::push();
+// Moved to ARM32::AssemblerARM32::push().
 void Assembler::Push(Register rd, Condition cond) {
   str(rd, Address(SP, -kWordSize, Address::PreIndex), cond);
 }
-#endif
 
+// Moved to ARM32::AssemblerARM32::pop().
 void Assembler::Pop(Register rd, Condition cond) {
   ldr(rd, Address(SP, kWordSize, Address::PostIndex), cond);
 }
 
-#if 0
-// Moved to ARM32::AssemblerARM32::pushList();
+// Moved to ARM32::AssemblerARM32::pushList().
 void Assembler::PushList(RegList regs, Condition cond) {
   stm(DB_W, SP, regs, cond);
 }
-#endif
 
+// Moved to ARM32::AssemblerARM32::popList().
 void Assembler::PopList(RegList regs, Condition cond) {
   ldm(IA_W, SP, regs, cond);
 }
-
+#endif
 
 void Assembler::MoveRegister(Register rd, Register rm, Condition cond) {
   if (rd != rm) {
     mov(rd, Operand(rm), cond);
   }
 }
 
 
 void Assembler::Lsl(Register rd, Register rm, const Operand& shift_imm,
                     Condition cond) {
@@ skipping 1089 matching lines @@
 
 
 const char* Assembler::FpuRegisterName(FpuRegister reg) {
   ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters));
   return fpu_reg_names[reg];
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM