[machine-operator-reducer] fix float truncation

src/compiler/arm64/instruction-selector-arm64.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/instruction-selector-impl.h"
 #include "src/compiler/node-matchers.h"
 #include "src/compiler/node-properties.h"
 
 namespace v8 {
 namespace internal {
@@ skipping 123 matching lines @@
 void VisitRRO(InstructionSelector* selector, ArchOpcode opcode, Node* node,
               ImmediateMode operand_mode) {
   Arm64OperandGenerator g(selector);
   selector->Emit(opcode, g.DefineAsRegister(node),
                  g.UseRegister(node->InputAt(0)),
                  g.UseOperand(node->InputAt(1), operand_mode));
 }
 
 
 bool TryMatchAnyShift(InstructionSelector* selector, Node* node,
                       Node* input_node, InstructionCode* opcode, bool try_ror) {

[titzer, 2015/11/24 08:35:02]

Can you add additional unittests for the instruction selector in
test/unittests/compiler/arm64?

   Arm64OperandGenerator g(selector);
 
   if (!selector->CanCover(node, input_node)) return false;
   if (input_node->InputCount() != 2) return false;
   if (!g.IsIntegerConstant(input_node->InputAt(1))) return false;
 
+  // Shift right can't be grouped with 32-bit operation, because the data
+  // will be lost.
+  bool is_word_output = !IrOpcode::Is64(node->opcode());

[titzer, 2015/11/13 23:35:17]

Can you move this condition inline (so that it is not evaluated for every case)?

[fedor.indutny, 2015/11/14 00:15:52]

Acknowledged.

+
   switch (input_node->opcode()) {
     case IrOpcode::kWord32Shl:
     case IrOpcode::kWord64Shl:
       *opcode |= AddressingModeField::encode(kMode_Operand2_R_LSL_I);
       return true;
+    case IrOpcode::kWord64Shr:
+      if (is_word_output) return false;
     case IrOpcode::kWord32Shr:
-    case IrOpcode::kWord64Shr:
       *opcode |= AddressingModeField::encode(kMode_Operand2_R_LSR_I);
       return true;
+    case IrOpcode::kWord64Sar:
+      if (is_word_output) return false;
     case IrOpcode::kWord32Sar:
-    case IrOpcode::kWord64Sar:
       *opcode |= AddressingModeField::encode(kMode_Operand2_R_ASR_I);
       return true;
     case IrOpcode::kWord32Ror:
     case IrOpcode::kWord64Ror:
       if (try_ror) {
         *opcode |= AddressingModeField::encode(kMode_Operand2_R_ROR_I);
         return true;
       }
       return false;
     default:
@@ skipping 1872 matching lines @@
          MachineOperatorBuilder::kFloat64RoundTruncate |
          MachineOperatorBuilder::kFloat64RoundTiesAway |
          MachineOperatorBuilder::kWord32ShiftIsSafe |
          MachineOperatorBuilder::kInt32DivIsSafe |
          MachineOperatorBuilder::kUint32DivIsSafe;
 }
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8