PPC: [turbofan] Avoid unnecessary write barriers and improve code generation.

src/compiler/ppc/instruction-codes-ppc.h

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #ifndef V8_COMPILER_PPC_INSTRUCTION_CODES_PPC_H_
 #define V8_COMPILER_PPC_INSTRUCTION_CODES_PPC_H_
 
 namespace v8 {
 namespace internal {
 namespace compiler {
@@ skipping 88 matching lines @@
   V(PPC_LoadWordU16)               \
   V(PPC_LoadWordS32)               \
   V(PPC_LoadWord64)                \
   V(PPC_LoadFloat32)               \
   V(PPC_LoadDouble)                \
   V(PPC_StoreWord8)                \
   V(PPC_StoreWord16)               \
   V(PPC_StoreWord32)               \
   V(PPC_StoreWord64)               \
   V(PPC_StoreFloat32)              \
-  V(PPC_StoreDouble)               \
-  V(PPC_StoreWriteBarrier)
+  V(PPC_StoreDouble)
 
 
 // Addressing modes represent the "shape" of inputs to an instruction.
 // Many instructions support multiple addressing modes. Addressing modes
 // are encoded into the InstructionCode of the instruction and tell the
 // code generator after register allocation which assembler method to call.
 //
 // We use the following local notation for addressing modes:
 //
 // R = register
 // O = register or stack slot
 // D = double register
 // I = immediate (handle, external, int32)
 // MRI = [register + immediate]
 // MRR = [register + register]
 #define TARGET_ADDRESSING_MODE_LIST(V) \
   V(MRI) /* [%r0 + K] */               \
   V(MRR) /* [%r0 + %r1] */
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_COMPILER_PPC_INSTRUCTION_CODES_PPC_H_