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Side by Side Diff: src/IceInstARM32.cpp

Issue 1431453002: Add new form of ldr/str (immediate) to ARM integrated assembler. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Fix nits. Created 5 years, 1 month ago
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1 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===// 1 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
(...skipping 829 matching lines...) Expand 10 before | Expand all | Expand 10 after
840 emitUsingTextFixup(Func); 840 emitUsingTextFixup(Func);
841 } 841 }
842 842
843 void InstARM32Label::dump(const Cfg *Func) const { 843 void InstARM32Label::dump(const Cfg *Func) const {
844 if (!BuildDefs::dump()) 844 if (!BuildDefs::dump())
845 return; 845 return;
846 Ostream &Str = Func->getContext()->getStrDump(); 846 Ostream &Str = Func->getContext()->getStrDump();
847 Str << getName(Func) << ":"; 847 Str << getName(Func) << ":";
848 } 848 }
849 849
850 template <InstARM32::InstKindARM32 K>
851 void InstARM32LoadBase<K>::emitIAS(const Cfg *Func) const {
852 emitUsingTextFixup(Func);
853 }
854
850 template <> void InstARM32Ldr::emit(const Cfg *Func) const { 855 template <> void InstARM32Ldr::emit(const Cfg *Func) const {
851 if (!BuildDefs::dump()) 856 if (!BuildDefs::dump())
852 return; 857 return;
853 Ostream &Str = Func->getContext()->getStrEmit(); 858 Ostream &Str = Func->getContext()->getStrEmit();
854 assert(getSrcSize() == 1); 859 assert(getSrcSize() == 1);
855 assert(getDest()->hasReg()); 860 assert(getDest()->hasReg());
856 Variable *Dest = getDest(); 861 Variable *Dest = getDest();
857 Type DestTy = Dest->getType(); 862 Type DestTy = Dest->getType();
858 const bool DestIsVector = isVectorType(DestTy); 863 const bool DestIsVector = isVectorType(DestTy);
859 const bool DestIsScalarFloat = isScalarFloatingType(DestTy); 864 const bool DestIsScalarFloat = isScalarFloatingType(DestTy);
860 const char *ActualOpcode = 865 const char *ActualOpcode =
861 DestIsVector ? "vld1" : (DestIsScalarFloat ? "vldr" : "ldr"); 866 DestIsVector ? "vld1" : (DestIsScalarFloat ? "vldr" : "ldr");
862 const char *VectorMarker = DestIsVector ? ".64" : ""; 867 const char *VectorMarker = DestIsVector ? ".64" : "";
863 const char *WidthString = DestIsVector ? "" : getWidthString(DestTy); 868 const char *WidthString = DestIsVector ? "" : getWidthString(DestTy);
864 Str << "\t" << ActualOpcode << WidthString << getPredicate() << VectorMarker 869 Str << "\t" << ActualOpcode << WidthString << getPredicate() << VectorMarker
865 << "\t"; 870 << "\t";
866 getDest()->emit(Func); 871 getDest()->emit(Func);
867 Str << ", "; 872 Str << ", ";
868 getSrc(0)->emit(Func); 873 getSrc(0)->emit(Func);
869 } 874 }
870 875
876 template <> void InstARM32Ldr::emitIAS(const Cfg *Func) const {
877 assert(getSrcSize() == 1);
878 Variable *Dest = getDest();
879 Type DestTy = Dest->getType();
880 ARM32::AssemblerARM32 *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
881 if (isVectorType(DestTy) || isScalarFloatingType(DestTy))
882 // TODO(kschimpf) Handle case.
883 Asm->setNeedsTextFixup();
884 else
885 Asm->ldr(Dest, getSrc(0), getPredicate());
886 if (Asm->needsTextFixup())
887 emitUsingTextFixup(Func);
888 }
889
871 template <> void InstARM32Ldrex::emit(const Cfg *Func) const { 890 template <> void InstARM32Ldrex::emit(const Cfg *Func) const {
872 if (!BuildDefs::dump()) 891 if (!BuildDefs::dump())
873 return; 892 return;
874 Ostream &Str = Func->getContext()->getStrEmit(); 893 Ostream &Str = Func->getContext()->getStrEmit();
875 assert(getSrcSize() == 1); 894 assert(getSrcSize() == 1);
876 assert(getDest()->hasReg()); 895 assert(getDest()->hasReg());
877 Variable *Dest = getDest(); 896 Variable *Dest = getDest();
878 Type DestTy = Dest->getType(); 897 Type DestTy = Dest->getType();
879 assert(isScalarIntegerType(DestTy)); 898 assert(isScalarIntegerType(DestTy));
880 const char *WidthString = getWidthString(DestTy); 899 const char *WidthString = getWidthString(DestTy);
(...skipping 209 matching lines...) Expand 10 before | Expand all | Expand 10 after
1090 const char *Opcode = 1109 const char *Opcode =
1091 IsVectorStore ? "vst1" : (isScalarFloatingType(Ty) ? "vstr" : "str"); 1110 IsVectorStore ? "vst1" : (isScalarFloatingType(Ty) ? "vstr" : "str");
1092 const char *VecEltWidthString = IsVectorStore ? ".64" : ""; 1111 const char *VecEltWidthString = IsVectorStore ? ".64" : "";
1093 Str << "\t" << Opcode << getWidthString(Ty) << getPredicate() 1112 Str << "\t" << Opcode << getWidthString(Ty) << getPredicate()
1094 << VecEltWidthString << "\t"; 1113 << VecEltWidthString << "\t";
1095 getSrc(0)->emit(Func); 1114 getSrc(0)->emit(Func);
1096 Str << ", "; 1115 Str << ", ";
1097 getSrc(1)->emit(Func); 1116 getSrc(1)->emit(Func);
1098 } 1117 }
1099 1118
1119 void InstARM32Str::emitIAS(const Cfg *Func) const {
1120 assert(getSrcSize() == 2);
1121 Type Ty = getSrc(0)->getType();
1122 ARM32::AssemblerARM32 *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
1123 if (isVectorType(Ty) || isScalarFloatingType(Ty))
1124 // TODO(kschimpf) Handle case.
1125 Asm->setNeedsTextFixup();
1126 else
1127 Asm->str(getSrc(0), getSrc(1), getPredicate());
1128 if (Asm->needsTextFixup())
1129 emitUsingTextFixup(Func);
1130 }
1131
1100 void InstARM32Str::dump(const Cfg *Func) const { 1132 void InstARM32Str::dump(const Cfg *Func) const {
1101 if (!BuildDefs::dump()) 1133 if (!BuildDefs::dump())
1102 return; 1134 return;
1103 Ostream &Str = Func->getContext()->getStrDump(); 1135 Ostream &Str = Func->getContext()->getStrDump();
1104 Type Ty = getSrc(0)->getType(); 1136 Type Ty = getSrc(0)->getType();
1105 dumpOpcodePred(Str, "str", Ty); 1137 dumpOpcodePred(Str, "str", Ty);
1106 Str << " "; 1138 Str << " ";
1107 getSrc(1)->dump(Func); 1139 getSrc(1)->dump(Func);
1108 Str << ", "; 1140 Str << ", ";
1109 getSrc(0)->dump(Func); 1141 getSrc(0)->dump(Func);
(...skipping 343 matching lines...) Expand 10 before | Expand all | Expand 10 after
1453 template class InstARM32ThreeAddrGPR<InstARM32::Sbc>; 1485 template class InstARM32ThreeAddrGPR<InstARM32::Sbc>;
1454 template class InstARM32ThreeAddrGPR<InstARM32::Sdiv>; 1486 template class InstARM32ThreeAddrGPR<InstARM32::Sdiv>;
1455 template class InstARM32ThreeAddrGPR<InstARM32::Sub>; 1487 template class InstARM32ThreeAddrGPR<InstARM32::Sub>;
1456 template class InstARM32ThreeAddrGPR<InstARM32::Udiv>; 1488 template class InstARM32ThreeAddrGPR<InstARM32::Udiv>;
1457 1489
1458 template class InstARM32ThreeAddrFP<InstARM32::Vadd>; 1490 template class InstARM32ThreeAddrFP<InstARM32::Vadd>;
1459 template class InstARM32ThreeAddrFP<InstARM32::Vdiv>; 1491 template class InstARM32ThreeAddrFP<InstARM32::Vdiv>;
1460 template class InstARM32ThreeAddrFP<InstARM32::Vmul>; 1492 template class InstARM32ThreeAddrFP<InstARM32::Vmul>;
1461 template class InstARM32ThreeAddrFP<InstARM32::Vsub>; 1493 template class InstARM32ThreeAddrFP<InstARM32::Vsub>;
1462 1494
1495 template class InstARM32LoadBase<InstARM32::Ldr>;
1496 template class InstARM32LoadBase<InstARM32::Ldrex>;
1497
1463 template class InstARM32TwoAddrGPR<InstARM32::Movt>; 1498 template class InstARM32TwoAddrGPR<InstARM32::Movt>;
1464 1499
1465 } // end of namespace Ice 1500 } // end of namespace Ice
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