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| 1 ; Show that we know how to translate mul. |
| 2 |
| 3 ; NOTE: We use -O2 to get rid of memory stores. |
| 4 |
| 5 ; REQUIRES: allow_dump |
| 6 |
| 7 ; Compile using standalone assembler. |
| 8 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -O2 \ |
| 9 ; RUN: | FileCheck %s --check-prefix=ASM |
| 10 |
| 11 ; Show bytes in assembled standalone code. |
| 12 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \ |
| 13 ; RUN: --args -O2 | FileCheck %s --check-prefix=DIS |
| 14 |
| 15 ; Compile using integrated assembler. |
| 16 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --args -O2 \ |
| 17 ; RUN: | FileCheck %s --check-prefix=IASM |
| 18 |
| 19 ; Show bytes in assembled integrated code. |
| 20 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \ |
| 21 ; RUN: --args -O2 | FileCheck %s --check-prefix=DIS |
| 22 |
| 23 define internal i32 @MulTwoRegs(i32 %a, i32 %b) { |
| 24 %v = mul i32 %a, %b |
| 25 ret i32 %v |
| 26 } |
| 27 |
| 28 ; ASM-LABEL:MulTwoRegs: |
| 29 ; ASM-NEXT:.LMulTwoRegs$__0: |
| 30 ; ASM-NEXT: mul r0, r0, r1 |
| 31 |
| 32 ; DIS-LABEL:00000000 <MulTwoRegs>: |
| 33 ; DIS-NEXT: 0: e0000190 |
| 34 |
| 35 ; IASM-LABEL:MulTwoRegs: |
| 36 ; IASM-NEXT:.LMulTwoRegs$__0: |
| 37 ; IASM-NEXT: .byte 0x90 |
| 38 ; IASM-NEXT: .byte 0x1 |
| 39 ; IASM-NEXT: .byte 0x0 |
| 40 ; IASM-NEXT: .byte 0xe0 |
| 41 |
| 42 define internal i64 @MulTwoI64Regs(i64 %a, i64 %b) { |
| 43 %v = mul i64 %a, %b |
| 44 ret i64 %v |
| 45 } |
| 46 |
| 47 ; ASM-LABEL:MulTwoI64Regs: |
| 48 ; ASM-NEXT:.LMulTwoI64Regs$__0: |
| 49 ; ASM-NEXT: mul r3, r0, r3 |
| 50 ; ASM-NEXT: mla r1, r2, r1, r3 |
| 51 ; ASM-NEXT: umull r0, r2, r0, r2 |
| 52 ; ASM: add r2, r2, r1 |
| 53 ; ASM-NEXT: mov r1, r2 |
| 54 ; ASM: bx lr |
| 55 |
| 56 |
| 57 ; DIS-LABEL:00000010 <MulTwoI64Regs>: |
| 58 ; DIS-NEXT: 10: e0030390 |
| 59 ; DIS-NEXT: 14: e0213192 |
| 60 ; DIS-NEXT: 18: e0820290 |
| 61 ; DIS-NEXT: 1c: e0822001 |
| 62 ; DIS-NEXT: 20: e1a01002 |
| 63 ; DIS-NEXT: 24: e12fff1e |
| 64 |
| 65 ; IASM-LABEL:MulTwoI64Regs: |
| 66 ; IASM-NEXT:.LMulTwoI64Regs$__0: |
| 67 ; IASM-NEXT: .byte 0x90 |
| 68 ; IASM-NEXT: .byte 0x3 |
| 69 ; IASM-NEXT: .byte 0x3 |
| 70 ; IASM-NEXT: .byte 0xe0 |
| 71 ; IASM-NEXT: mla r1, r2, r1, r3 |
| 72 ; IASM-NEXT: umull r0, r2, r0, r2 |
| 73 ; IASM-NEXT: .byte 0x1 |
| 74 ; IASM-NEXT: .byte 0x20 |
| 75 ; IASM-NEXT: .byte 0x82 |
| 76 ; IASM-NEXT: .byte 0xe0 |
| 77 ; IASM-NEXT: mov r1, r2 |
| 78 ; IASM-NEXT: .byte 0x1e |
| 79 ; IASM-NEXT: .byte 0xff |
| 80 ; IASM-NEXT: .byte 0x2f |
| 81 ; IASM-NEXT: .byte 0xe1 |
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