Add MLA instruction to ARM integerated assembler.

src/IceInstARM32.cpp

 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 174 matching lines @@
   Str << "\t" << Opcode << Inst->getPredicate() << "\t";
   Inst->getDest()->emit(Func);
   Str << ", ";
   Inst->getSrc(0)->emit(Func);
   Str << ", ";
   Inst->getSrc(1)->emit(Func);
   Str << ", ";
   Inst->getSrc(2)->emit(Func);
 }
 
+template <InstARM32::InstKindARM32 K>
+void InstARM32FourAddrGPR<K>::emitIAS(const Cfg *Func) const {
+  emitUsingTextFixup(Func);
+}
+
+template <> void InstARM32Mla::emitIAS(const Cfg *Func) const {
+  assert(getSrcSize() == 3);
+  ARM32::AssemblerARM32 *Asm = Func->getAssembler<ARM32::AssemblerARM32>();

[Jim Stichnoth, 2015/11/05 00:15:04]

auto *

[Karl, 2015/11/05 16:28:20]

Also fixed all other similar occurrences in this file.

+  Asm->mla(getDest(), getSrc(0), getSrc(1), getSrc(2), getPredicate());
+  if (Asm->needsTextFixup())
+    emitUsingTextFixup(Func);
+}
+
 void InstARM32Pred::emitCmpLike(const char *Opcode, const InstARM32Pred *Inst,
                                 const Cfg *Func) {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(Inst->getSrcSize() == 2);
   Str << "\t" << Opcode << Inst->getPredicate() << "\t";
   Inst->getSrc(0)->emit(Func);
   Str << ", ";
   Inst->getSrc(1)->emit(Func);
@@ skipping 1390 matching lines @@
 
 template class InstARM32UnaryopGPR<InstARM32::Movw, false>;
 template class InstARM32UnaryopGPR<InstARM32::Clz, false>;
 template class InstARM32UnaryopGPR<InstARM32::Mvn, false>;
 template class InstARM32UnaryopGPR<InstARM32::Rbit, false>;
 template class InstARM32UnaryopGPR<InstARM32::Rev, false>;
 template class InstARM32UnaryopGPR<InstARM32::Sxt, true>;
 template class InstARM32UnaryopGPR<InstARM32::Uxt, true>;
 template class InstARM32UnaryopFP<InstARM32::Vsqrt>;
 
+template class InstARM32FourAddrGPR<InstARM32::Mla>;
+template class InstARM32FourAddrGPR<InstARM32::Mls>;
+
 template class InstARM32CmpLike<InstARM32::Cmp>;
 template class InstARM32CmpLike<InstARM32::Tst>;
 
 } // end of namespace Ice