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| 1 //===- subzero/src/IceAssemblerARM32.h - Assembler for ARM32 ----*- C++ -*-===// | 1 //===- subzero/src/IceAssemblerARM32.h - Assembler for ARM32 ----*- C++ -*-===// |
| 2 // | 2 // |
| 3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
| 4 // for details. All rights reserved. Use of this source code is governed by a | 4 // for details. All rights reserved. Use of this source code is governed by a |
| 5 // BSD-style license that can be found in the LICENSE file. | 5 // BSD-style license that can be found in the LICENSE file. |
| 6 // | 6 // |
| 7 // Modified by the Subzero authors. | 7 // Modified by the Subzero authors. |
| 8 // | 8 // |
| 9 //===----------------------------------------------------------------------===// | 9 //===----------------------------------------------------------------------===// |
| 10 // | 10 // |
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| 165 bool SetFlags, CondARM32::Cond Cond); | 165 bool SetFlags, CondARM32::Cond Cond); |
| 166 | 166 |
| 167 void ldr(const Operand *OpRt, const Operand *OpAddress, CondARM32::Cond Cond); | 167 void ldr(const Operand *OpRt, const Operand *OpAddress, CondARM32::Cond Cond); |
| 168 | 168 |
| 169 void mov(const Operand *OpRd, const Operand *OpSrc, CondARM32::Cond Cond); | 169 void mov(const Operand *OpRd, const Operand *OpSrc, CondARM32::Cond Cond); |
| 170 | 170 |
| 171 void movw(const Operand *OpRd, const Operand *OpSrc, CondARM32::Cond Cond); | 171 void movw(const Operand *OpRd, const Operand *OpSrc, CondARM32::Cond Cond); |
| 172 | 172 |
| 173 void movt(const Operand *OpRd, const Operand *OpSrc, CondARM32::Cond Cond); | 173 void movt(const Operand *OpRd, const Operand *OpSrc, CondARM32::Cond Cond); |
| 174 | 174 |
| 175 void mla(const Operand *OpRd, const Operand *OpRn, const Operand *OpRm, |
| 176 const Operand *OpRa, CondARM32::Cond Cond); |
| 177 |
| 175 void mul(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1, | 178 void mul(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1, |
| 176 bool SetFlags, CondARM32::Cond Cond); | 179 bool SetFlags, CondARM32::Cond Cond); |
| 177 | 180 |
| 178 void orr(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1, | 181 void orr(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1, |
| 179 bool SetFlags, CondARM32::Cond Cond); | 182 bool SetFlags, CondARM32::Cond Cond); |
| 180 | 183 |
| 181 void sbc(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1, | 184 void sbc(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1, |
| 182 bool SetFlags, CondARM32::Cond Cond); | 185 bool SetFlags, CondARM32::Cond Cond); |
| 183 | 186 |
| 184 void sdiv(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1, | 187 void sdiv(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1, |
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| 267 IValueT encodeBranchOffset(IOffsetT Offset, IValueT Inst); | 270 IValueT encodeBranchOffset(IOffsetT Offset, IValueT Inst); |
| 268 | 271 |
| 269 // Returns the offset encoded in the branch instruction Inst. | 272 // Returns the offset encoded in the branch instruction Inst. |
| 270 static IOffsetT decodeBranchOffset(IValueT Inst); | 273 static IOffsetT decodeBranchOffset(IValueT Inst); |
| 271 }; | 274 }; |
| 272 | 275 |
| 273 } // end of namespace ARM32 | 276 } // end of namespace ARM32 |
| 274 } // end of namespace Ice | 277 } // end of namespace Ice |
| 275 | 278 |
| 276 #endif // SUBZERO_SRC_ICEASSEMBLERARM32_H | 279 #endif // SUBZERO_SRC_ICEASSEMBLERARM32_H |
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