Add SDIV to ARM integrated assembler.

src/DartARM32/assembler_arm.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 //
 // This is forked from Dart revision df52deea9f25690eb8b66c5995da92b70f7ac1fe
 // Please update the (git) revision if we merge changes from Dart.
 // https://code.google.com/p/dart/wiki/GettingTheSource
 
 #include "vm/globals.h"  // NOLINT
 #if defined(TARGET_ARCH_ARM)
@@ skipping 268 matching lines @@
 // Moved to ARM32::AssemberARM32::orr()
 void Assembler::orr(Register rd, Register rn, Operand o, Condition cond) {
   EmitType01(cond, o.type(), ORR, 0, rn, rd, o);
 }
 
 // Moved to ARM32::AssemberARM32::orr()
 void Assembler::orrs(Register rd, Register rn, Operand o, Condition cond) {
   EmitType01(cond, o.type(), ORR, 1, rn, rd, o);
 }
 
-// Moved to AssemblerARM32::mov()
+// Moved to ARM32::AssemblerARM32::mov()
 // TODO(kschimpf) other forms of move.
 void Assembler::mov(Register rd, Operand o, Condition cond) {
   EmitType01(cond, o.type(), MOV, 0, R0, rd, o);
 }
 #endif
 
 void Assembler::movs(Register rd, Operand o, Condition cond) {
   EmitType01(cond, o.type(), MOV, 1, R0, rd, o);
 }
 
@@ skipping 26 matching lines @@
   ASSERT(rm != PC);
   int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) |
                      B24 | B22 | B21 | (0xf << 16) |
                      (static_cast<int32_t>(rd) << kRdShift) |
                      (0xf << 8) | B4 | static_cast<int32_t>(rm);
   Emit(encoding);
 }
 
 
 #if
-// Moved to ARM::AssemblerARM32::movw
+// Moved to ARM32::AssemblerARM32::movw
 void Assembler::movw(Register rd, uint16_t imm16, Condition cond) {
   ASSERT(cond != kNoCondition);
   int32_t encoding = static_cast<int32_t>(cond) << kConditionShift |
                      B25 | B24 | ((imm16 >> 12) << 16) |
                      static_cast<int32_t>(rd) << kRdShift | (imm16 & 0xfff);
   Emit(encoding);
 }
 
 
-// Moved to ARM::AssemblerARM32::movt
+// Moved to ARM32::AssemblerARM32::movt
 void Assembler::movt(Register rd, uint16_t imm16, Condition cond) {
   ASSERT(cond != kNoCondition);
   int32_t encoding = static_cast<int32_t>(cond) << kConditionShift |
                      B25 | B24 | B22 | ((imm16 >> 12) << 16) |
                      static_cast<int32_t>(rd) << kRdShift | (imm16 & 0xfff);
   Emit(encoding);
 }
 #endif
 
 #if 0
@@ skipping 82 matching lines @@
     EmitMulOp(AL, B22, rd_lo, rd_hi, rn, rm);
   } else {
     mov(IP, Operand(0));
     umlal(rd_lo, IP, rn, rm);
     adds(rd_lo, rd_lo, Operand(rd_hi));
     adc(rd_hi, IP, Operand(0));
   }
 }
 
 
+#if 0
+// Moved to ARM32::AssemblerARM32::emitDivOp()
 void Assembler::EmitDivOp(Condition cond, int32_t opcode,
                           Register rd, Register rn, Register rm) {
   ASSERT(TargetCPUFeatures::integer_division_supported());
   ASSERT(rd != kNoRegister);
   ASSERT(rn != kNoRegister);
   ASSERT(rm != kNoRegister);
   ASSERT(cond != kNoCondition);
   int32_t encoding = opcode |
     (static_cast<int32_t>(cond) << kConditionShift) |
     (static_cast<int32_t>(rn) << kDivRnShift) |
     (static_cast<int32_t>(rd) << kDivRdShift) |
+      // TODO(kschimpf): Why not also: B15 | B14 | B13 | B12?
     B26 | B25 | B24 | B20 | B4 |
     (static_cast<int32_t>(rm) << kDivRmShift);
   Emit(encoding);
 }
 
-
+// Moved to ARM32::AssemblerARM32::sdiv()
 void Assembler::sdiv(Register rd, Register rn, Register rm, Condition cond) {
   EmitDivOp(cond, 0, rd, rn, rm);
 }
-
+#endif
 
 void Assembler::udiv(Register rd, Register rn, Register rm, Condition cond) {
   EmitDivOp(cond, B21 , rd, rn, rm);
 }
 
 
 #if 0
 // Moved to ARM32::AssemblerARM32::ldr()
 void Assembler::ldr(Register rd, Address ad, Condition cond) {
   EmitMemOp(cond, true, false, rd, ad);
@@ skipping 1609 matching lines @@
 
 #if 0
 // Moved to ::canEncodeBranchoffset in IceAssemblerARM32.cpp.
 static bool CanEncodeBranchOffset(int32_t offset) {
   ASSERT(Utils::IsAligned(offset, 4));
   // Note: This check doesn't take advantage of the fact that offset>>2
   // is stored (allowing two more bits in address space).
   return Utils::IsInt(Utils::CountOneBits(kBranchOffsetMask), offset);
 }
 
-// Moved to AssemblerARM32::encodeBranchOffset.
+// Moved to ARM32::AssemblerARM32::encodeBranchOffset.
 int32_t Assembler::EncodeBranchOffset(int32_t offset, int32_t inst) {
   // The offset is off by 8 due to the way the ARM CPUs read PC.
   offset -= Instr::kPCReadOffset;
 
   if (!CanEncodeBranchOffset(offset)) {
     ASSERT(!use_far_branches());
     Thread::Current()->long_jump_base()->Jump(
         1, Object::branch_offset_error());
   }
 
@@ skipping 1564 matching lines @@
 
 
 const char* Assembler::FpuRegisterName(FpuRegister reg) {
   ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters));
   return fpu_reg_names[reg];
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM