Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(57)

Unified Diff: tests_lit/llvm2ice_tests/address-mode-global.ll

Issue 1428443002: Enhance address mode recovery (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Fixed relocation being attached to the wrong location. Created 5 years, 2 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View side-by-side diff with in-line comments
Download patch
« src/IceTargetLoweringX86BaseImpl.h ('K') | « src/IceTargetLoweringX86BaseImpl.h ('k') | no next file » | no next file with comments »
Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
Index: tests_lit/llvm2ice_tests/address-mode-global.ll
diff --git a/tests_lit/llvm2ice_tests/address-mode-global.ll b/tests_lit/llvm2ice_tests/address-mode-global.ll
new file mode 100644
index 0000000000000000000000000000000000000000..162a797af1234855b6edc486b5370d614ee41833
--- /dev/null
+++ b/tests_lit/llvm2ice_tests/address-mode-global.ll
@@ -0,0 +1,36 @@
+; This file checks support for address mode optimization.
+
+; RUN: %p2i --filetype=obj --disassemble -i %s --args -O2 \
+; RUN: -allow-externally-defined-symbols | FileCheck %s
+
+@bytes = internal global [1024 x i8] zeroinitializer
+
+define internal i32 @load_global_direct() {
+entry:
+ %base = ptrtoint [1024 x i8]* @bytes to i32
+ %addr_lo.int = add i32 0, %base
+ %addr_hi.int = add i32 4, %base
+ %addr_lo.ptr = inttoptr i32 %addr_lo.int to i32*
+ %addr_hi.ptr = inttoptr i32 %addr_hi.int to i32*
+ %addr_lo.load = load i32, i32* %addr_lo.ptr, align 1
+ %addr_hi.load = load i32, i32* %addr_hi.ptr, align 1
+ %result = add i32 %addr_lo.load, %addr_hi.load
+ ret i32 %result
+; CHECK-LABEL: load_global_direct
+; CHECK-NEXT: mov eax,DWORD PTR ds:0x0{{.*}}bytes
+; CHECK-NEXT: add eax,DWORD PTR ds:0x4{{.*}}bytes
+}
+
+define internal i32 @load_global_indexed(i32 %arg) {
+entry:
+ %offset = shl i32 %arg, 3
+ %base = ptrtoint [1024 x i8]* @bytes to i32
+ %addr.int = add i32 %offset, %base
+ %addr.ptr = inttoptr i32 %addr.int to i32*
+ %addr.load = load i32, i32* %addr.ptr, align 1
+ ret i32 %addr.load
+; CHECK-LABEL: load_global_indexed
+; CHECK-NEXT: mov eax,DWORD PTR [esp+0x4]
+; CHECK-NEXT: mov eax,DWORD PTR [eax*8+0x0]
+}
+
Jim Stichnoth 2015/10/27 05:52:34 git doesn't like "trailing whitespace".
sehr 2015/10/27 21:48:01 Removed.
« src/IceTargetLoweringX86BaseImpl.h ('K') | « src/IceTargetLoweringX86BaseImpl.h ('k') | no next file » | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698