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Side by Side Diff: unittest/AssemblerX8632/X87.cpp

Issue 1428443002: Enhance address mode recovery (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Streamline absolute addressing support (rip-relative on x64) Created 5 years, 1 month ago
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1 //===- subzero/unittest/AssemblerX8632/X87.cpp ----------------------------===// 1 //===- subzero/unittest/AssemblerX8632/X87.cpp ----------------------------===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 #include "AssemblerX8632/TestUtil.h" 9 #include "AssemblerX8632/TestUtil.h"
10 10
11 namespace Ice { 11 namespace Ice {
12 namespace X8632 { 12 namespace X8632 {
13 namespace Test { 13 namespace Test {
14 namespace { 14 namespace {
15 15
16 TEST_F(AssemblerX8632LowLevelTest, Fld) { 16 TEST_F(AssemblerX8632LowLevelTest, Fld) {
17 __ fld(IceType_f32, Address(GPRRegister::Encoded_Reg_ebp, 1)); 17 static constexpr AssemblerFixup *Fixup = nullptr;
18 __ fld(IceType_f64, Address(GPRRegister::Encoded_Reg_ebp, 0x10000)); 18 __ fld(IceType_f32, Address(GPRRegister::Encoded_Reg_ebp, 1, Fixup));
19 __ fld(IceType_f64, Address(GPRRegister::Encoded_Reg_ebp, 0x10000, Fixup));
19 20
20 constexpr size_t ByteCount = 9; 21 constexpr size_t ByteCount = 9;
21 ASSERT_EQ(ByteCount, codeBytesSize()); 22 ASSERT_EQ(ByteCount, codeBytesSize());
22 23
23 constexpr uint8_t Fld32Opcode = 0xd9; 24 constexpr uint8_t Fld32Opcode = 0xd9;
24 constexpr uint8_t Fld32ModRM = (/*mod*/ 1 << 6) | (/*reg*/ 0 << 3) | 25 constexpr uint8_t Fld32ModRM = (/*mod*/ 1 << 6) | (/*reg*/ 0 << 3) |
25 (/*rm*/ GPRRegister::Encoded_Reg_ebp); 26 (/*rm*/ GPRRegister::Encoded_Reg_ebp);
26 constexpr uint8_t Fld64Opcode = 0xdd; 27 constexpr uint8_t Fld64Opcode = 0xdd;
27 constexpr uint8_t Fld64ModRM = (/*mod*/ 2 << 6) | (/*reg*/ 0 << 3) | 28 constexpr uint8_t Fld64ModRM = (/*mod*/ 2 << 6) | (/*reg*/ 0 << 3) |
28 (/*rm*/ GPRRegister::Encoded_Reg_ebp); 29 (/*rm*/ GPRRegister::Encoded_Reg_ebp);
29 verifyBytes<ByteCount>(codeBytes(), Fld32Opcode, Fld32ModRM, 0x01, 30 verifyBytes<ByteCount>(codeBytes(), Fld32Opcode, Fld32ModRM, 0x01,
30 Fld64Opcode, Fld64ModRM, 0x00, 0x00, 0x01, 0x00); 31 Fld64Opcode, Fld64ModRM, 0x00, 0x00, 0x01, 0x00);
31 } 32 }
32 33
33 TEST_F(AssemblerX8632LowLevelTest, FstpAddr) { 34 TEST_F(AssemblerX8632LowLevelTest, FstpAddr) {
34 __ fstp(IceType_f32, Address(GPRRegister::Encoded_Reg_ebp, 1)); 35 static constexpr AssemblerFixup *Fixup = nullptr;
35 __ fstp(IceType_f64, Address(GPRRegister::Encoded_Reg_ebp, 0x10000)); 36 __ fstp(IceType_f32, Address(GPRRegister::Encoded_Reg_ebp, 1, Fixup));
37 __ fstp(IceType_f64, Address(GPRRegister::Encoded_Reg_ebp, 0x10000, Fixup));
36 38
37 constexpr size_t ByteCount = 9; 39 constexpr size_t ByteCount = 9;
38 ASSERT_EQ(ByteCount, codeBytesSize()); 40 ASSERT_EQ(ByteCount, codeBytesSize());
39 41
40 constexpr uint8_t Fld32Opcode = 0xd9; 42 constexpr uint8_t Fld32Opcode = 0xd9;
41 constexpr uint8_t Fld32ModRM = (/*mod*/ 1 << 6) | (/*reg*/ 3 << 3) | 43 constexpr uint8_t Fld32ModRM = (/*mod*/ 1 << 6) | (/*reg*/ 3 << 3) |
42 (/*rm*/ GPRRegister::Encoded_Reg_ebp); 44 (/*rm*/ GPRRegister::Encoded_Reg_ebp);
43 constexpr uint8_t Fld64Opcode = 0xdd; 45 constexpr uint8_t Fld64Opcode = 0xdd;
44 constexpr uint8_t Fld64ModRM = (/*mod*/ 2 << 6) | (/*reg*/ 3 << 3) | 46 constexpr uint8_t Fld64ModRM = (/*mod*/ 2 << 6) | (/*reg*/ 3 << 3) |
45 (/*rm*/ GPRRegister::Encoded_Reg_ebp); 47 (/*rm*/ GPRRegister::Encoded_Reg_ebp);
46 verifyBytes<ByteCount>(codeBytes(), Fld32Opcode, Fld32ModRM, 0x01, 48 verifyBytes<ByteCount>(codeBytes(), Fld32Opcode, Fld32ModRM, 0x01,
47 Fld64Opcode, Fld64ModRM, 0x00, 0x00, 0x01, 0x00); 49 Fld64Opcode, Fld64ModRM, 0x00, 0x00, 0x01, 0x00);
48 } 50 }
49 51
50 TEST_F(AssemblerX8632LowLevelTest, Fincstp) { 52 TEST_F(AssemblerX8632LowLevelTest, Fincstp) {
51 __ fincstp(); 53 __ fincstp();
52 54
53 constexpr size_t ByteCount = 2; 55 constexpr size_t ByteCount = 2;
54 ASSERT_EQ(ByteCount, codeBytesSize()); 56 ASSERT_EQ(ByteCount, codeBytesSize());
55 57
56 verifyBytes<ByteCount>(codeBytes(), 0xD9, 0XF7); 58 verifyBytes<ByteCount>(codeBytes(), 0xD9, 0XF7);
57 } 59 }
58 60
59 TEST_F(AssemblerX8632LowLevelTest, FnstcwAddr) { 61 TEST_F(AssemblerX8632LowLevelTest, FnstcwAddr) {
60 __ fnstcw(Address(GPRRegister::Encoded_Reg_ebp, 0x12345)); 62 static constexpr AssemblerFixup *Fixup = nullptr;
63 __ fnstcw(Address(GPRRegister::Encoded_Reg_ebp, 0x12345, Fixup));
61 64
62 constexpr size_t ByteCount = 6; 65 constexpr size_t ByteCount = 6;
63 ASSERT_EQ(ByteCount, codeBytesSize()); 66 ASSERT_EQ(ByteCount, codeBytesSize());
64 67
65 constexpr uint8_t Opcode = 0xd9; 68 constexpr uint8_t Opcode = 0xd9;
66 constexpr uint8_t ModRM = (/*mod*/ 2 << 6) | (/*reg*/ 7 << 3) | 69 constexpr uint8_t ModRM = (/*mod*/ 2 << 6) | (/*reg*/ 7 << 3) |
67 (/*rm*/ GPRRegister::Encoded_Reg_ebp); 70 (/*rm*/ GPRRegister::Encoded_Reg_ebp);
68 verifyBytes<ByteCount>(codeBytes(), Opcode, ModRM, 0x45, 0x23, 0x01, 0x00); 71 verifyBytes<ByteCount>(codeBytes(), Opcode, ModRM, 0x45, 0x23, 0x01, 0x00);
69 } 72 }
70 73
71 TEST_F(AssemblerX8632LowLevelTest, FldcwAddr) { 74 TEST_F(AssemblerX8632LowLevelTest, FldcwAddr) {
72 __ fldcw(Address(GPRRegister::Encoded_Reg_ebp, 0x12345)); 75 static constexpr AssemblerFixup *Fixup = nullptr;
76 __ fldcw(Address(GPRRegister::Encoded_Reg_ebp, 0x12345, Fixup));
73 77
74 constexpr size_t ByteCount = 6; 78 constexpr size_t ByteCount = 6;
75 ASSERT_EQ(ByteCount, codeBytesSize()); 79 ASSERT_EQ(ByteCount, codeBytesSize());
76 80
77 constexpr uint8_t Opcode = 0xd9; 81 constexpr uint8_t Opcode = 0xd9;
78 constexpr uint8_t ModRM = (/*mod*/ 2 << 6) | (/*reg*/ 5 << 3) | 82 constexpr uint8_t ModRM = (/*mod*/ 2 << 6) | (/*reg*/ 5 << 3) |
79 (/*rm*/ GPRRegister::Encoded_Reg_ebp); 83 (/*rm*/ GPRRegister::Encoded_Reg_ebp);
80 verifyBytes<ByteCount>(codeBytes(), Opcode, ModRM, 0x45, 0x23, 0x01, 0x00); 84 verifyBytes<ByteCount>(codeBytes(), Opcode, ModRM, 0x45, 0x23, 0x01, 0x00);
81 } 85 }
82 86
(...skipping 175 matching lines...) Expand 10 before | Expand all | Expand 10 after
258 262
259 TestFistp(s, 32, Dword, float, uint32_t); 263 TestFistp(s, 32, Dword, float, uint32_t);
260 TestFistp(l, 64, Qword, double, uint64_t); 264 TestFistp(l, 64, Qword, double, uint64_t);
261 #undef TestFistp 265 #undef TestFistp
262 } 266 }
263 267
264 } // end of anonymous namespace 268 } // end of anonymous namespace
265 } // end of namespace Test 269 } // end of namespace Test
266 } // end of namespace X8632 270 } // end of namespace X8632
267 } // end of namespace Ice 271 } // end of namespace Ice
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