Enhance address mode recovery

src/IceInstX8664.cpp

 //===- subzero/src/IceInstX8664.cpp - X86-64 instruction implementation ---===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 88 matching lines @@
   } else if (const auto CI = llvm::dyn_cast<ConstantInteger32>(Offset)) {
     if (Base == nullptr || CI->getValue())
       // Emit a non-zero offset without a leading '$'.
       Str << CI->getValue();
   } else if (const auto CR = llvm::dyn_cast<ConstantRelocatable>(Offset)) {
     CR->emitWithoutPrefix(Func->getTarget());
   } else {
     llvm_unreachable("Invalid offset type for x86 mem operand");
   }
 
-  if (Base) {
+  if (Base || Index) {
     Str << "(";
-    Base->emit(Func);
+    if (Base)
+      Base->emit(Func);
     if (Index) {
       Str << ",";
       Index->emit(Func);
       if (Shift)
         Str << "," << (1u << Shift);
     }
     Str << ")";
   }
 }
 
 void MachineTraits<TargetX8664>::X86OperandMem::dump(const Cfg *Func,
                                                      Ostream &Str) const {
   if (!BuildDefs::dump())
     return;
   bool Dumped = false;
   Str << "[";
   if (Base) {
     if (Func)
       Base->dump(Func);
     else
       Base->dump(Str);
     Dumped = true;
   }
   if (Index) {
-    assert(Base);
-    Str << "+";
+    if (Base)
+      Str << "+";
     if (Shift > 0)
       Str << (1u << Shift) << "*";
     if (Func)
       Index->dump(Func);
     else
       Index->dump(Str);
     Dumped = true;
   }
   // Pretty-print the Offset.
   bool OffsetIsZero = false;
@@ skipping 35 matching lines @@
     } else {
       llvm_unreachable("Unexpected offset type");
     }
   }
 
   // Now convert to the various possible forms.
   if (getBase() && getIndex()) {
     return X8664::Traits::Address(
         RegX8664::getEncodedGPR(getBase()->getRegNum()),
         RegX8664::getEncodedGPR(getIndex()->getRegNum()),
-        X8664::Traits::ScaleFactor(getShift()), Disp);
+        X8664::Traits::ScaleFactor(getShift()), Disp, Fixup);
   } else if (getBase()) {
     return X8664::Traits::Address(
-        RegX8664::getEncodedGPR(getBase()->getRegNum()), Disp);
+        RegX8664::getEncodedGPR(getBase()->getRegNum()), Disp, Fixup);
   } else if (getIndex()) {
     return X8664::Traits::Address(
         RegX8664::getEncodedGPR(getIndex()->getRegNum()),
-        X8664::Traits::ScaleFactor(getShift()), Disp);
-  } else if (Fixup) {
-    return X8664::Traits::Address::Absolute(Disp, Fixup);
+        X8664::Traits::ScaleFactor(getShift()), Disp, Fixup);
   } else {
-    return X8664::Traits::Address::Absolute(Disp);
+    return X8664::Traits::Address(Disp, Fixup);
   }
 }
 
 MachineTraits<TargetX8664>::Address
 MachineTraits<TargetX8664>::VariableSplit::toAsmAddress(const Cfg *Func) const {
   assert(!Var->hasReg());
   const ::Ice::TargetLowering *Target = Func->getTarget();
   int32_t Offset =
       Var->getStackOffset() + Target->getStackAdjustment() + getOffset();
+  static constexpr AssemblerFixup *Fixup = nullptr;
   return X8664::Traits::Address(
-      RegX8664::getEncodedGPR(Target->getFrameOrStackReg()), Offset);
+      RegX8664::getEncodedGPR(Target->getFrameOrStackReg()), Offset, Fixup);
 }
 
 void MachineTraits<TargetX8664>::VariableSplit::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(!Var->hasReg());
   // The following is copied/adapted from TargetX8664::emitVariable().
   const ::Ice::TargetLowering *Target = Func->getTarget();
   const Type Ty = IceType_i32;
@@ skipping 21 matching lines @@
     Var->dump(Func);
   else
     Var->dump(Str);
   Str << ")";
 }
 
 } // namespace X86Internal
 } // end of namespace Ice
 
 X86INSTS_DEFINE_STATIC_DATA(TargetX8664)