Adds support for debugger API on MIPS.

runtime/vm/instructions_mips.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // Needed here to get TARGET_ARCH_MIPS.
 #if defined(TARGET_ARCH_MIPS)
 
 #include "vm/constants_mips.h"
 #include "vm/instructions.h"
 #include "vm/object.h"
@@ skipping 55 matching lines @@
   uword i = Back(++end);
   Instr* instr = Instr::At(reinterpret_cast<uword>(&i));
   ASSERT(instr->OpcodeField() == ORI);
   imm = instr->UImmField();
   *reg = instr->RtField();
 
   i = Back(++end);
   instr = Instr::At(reinterpret_cast<uword>(&i));
   ASSERT(instr->OpcodeField() == LUI);
   ASSERT(instr->RtField() == *reg);
-  imm |= instr->UImmField();
+  imm |= (instr->UImmField() << 16);
   *value = imm;
   return end;
 }
 
 
 // Decodes a load sequence ending at end. Returns the register being loaded and
 // the index in the pool being read from.
 // Returns the location of the load sequence, counting the number of
 // instructions back from the end of the call pattern.
 int CallPattern::DecodeLoadWordFromPool(int end, Register* reg, int* index) {
@@ skipping 105 matching lines @@
   const uint16_t target_hi = target_address >> 16;
 
   lui->SetInstructionBits((lui_bits & 0xffff0000) | target_hi);
   ori->SetInstructionBits((ori_bits & 0xffff0000) | target_lo);
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_MIPS