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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
4 | 4 |
5 #include "vm/globals.h" | 5 #include "vm/globals.h" |
6 #if defined(TARGET_ARCH_MIPS) | 6 #if defined(TARGET_ARCH_MIPS) |
7 | 7 |
| 8 #include "vm/cpu.h" |
8 #include "vm/debugger.h" | 9 #include "vm/debugger.h" |
| 10 #include "vm/instructions.h" |
| 11 #include "vm/stub_code.h" |
9 | 12 |
10 namespace dart { | 13 namespace dart { |
11 | 14 |
| 15 // TODO(hausner): Handle captured variables. |
12 RawInstance* ActivationFrame::GetLocalVarValue(intptr_t slot_index) { | 16 RawInstance* ActivationFrame::GetLocalVarValue(intptr_t slot_index) { |
13 UNIMPLEMENTED(); | 17 uword var_address = fp() + slot_index * kWordSize; |
14 return NULL; | 18 return reinterpret_cast<RawInstance*>( |
| 19 *reinterpret_cast<uword*>(var_address)); |
15 } | 20 } |
16 | 21 |
17 | 22 |
18 RawInstance* ActivationFrame::GetInstanceCallReceiver( | 23 RawInstance* ActivationFrame::GetInstanceCallReceiver( |
19 intptr_t num_actual_args) { | 24 intptr_t num_actual_args) { |
20 UNIMPLEMENTED(); | 25 ASSERT(num_actual_args > 0); // At minimum we have a receiver on the stack. |
21 return NULL; | 26 // Stack pointer points to last argument that was pushed on the stack. |
| 27 uword receiver_addr = sp() + ((num_actual_args - 1) * kWordSize); |
| 28 return reinterpret_cast<RawInstance*>( |
| 29 *reinterpret_cast<uword*>(receiver_addr)); |
22 } | 30 } |
23 | 31 |
24 | 32 |
25 void CodeBreakpoint::PatchFunctionReturn() { | 33 void CodeBreakpoint::PatchFunctionReturn() { |
26 UNIMPLEMENTED(); | 34 Instr* instr1 = Instr::At(pc_ - 6 * Instr::kInstrSize); |
| 35 Instr* instr2 = Instr::At(pc_ - 5 * Instr::kInstrSize); |
| 36 Instr* instr3 = Instr::At(pc_ - 4 * Instr::kInstrSize); |
| 37 Instr* instr4 = Instr::At(pc_ - 3 * Instr::kInstrSize); |
| 38 Instr* instr5 = Instr::At(pc_ - 2 * Instr::kInstrSize); |
| 39 Instr* instr6 = Instr::At(pc_ - 1 * Instr::kInstrSize); |
| 40 |
| 41 #if defined(DEBUG) |
| 42 |
| 43 instr1->AssertIsImmInstr(LW, SP, RA, 2 * kWordSize); |
| 44 instr2->AssertIsImmInstr(LW, SP, FP, 1 * kWordSize); |
| 45 instr3->AssertIsImmInstr(LW, SP, PP, 0 * kWordSize); |
| 46 instr4->AssertIsImmInstr(ADDIU, SP, SP, 4 * kWordSize); |
| 47 instr5->AssertIsSpecialInstr(JR, RA, ZR, ZR); |
| 48 ASSERT(instr6->InstructionBits() == Instr::kNopInstruction); |
| 49 #endif // defined(DEBUG) |
| 50 |
| 51 // Smash code with call instruction and target address. |
| 52 uword stub_addr = StubCode::BreakpointReturnEntryPoint(); |
| 53 uint16_t target_lo = stub_addr & 0xffff; |
| 54 uint16_t target_hi = stub_addr >> 16; |
| 55 |
| 56 // Unlike other architectures, the sequence we are patching in is shorter |
| 57 // than the sequence we are replacing. We pad at the top with nops so that |
| 58 // the end of the new sequence is lined up with the code descriptor. |
| 59 instr1->SetInstructionBits(Instr::kNopInstruction); |
| 60 instr2->SetInstructionBits(Instr::kNopInstruction); |
| 61 instr3->SetImmInstrBits(LUI, ZR, TMP1, target_hi); |
| 62 instr4->SetImmInstrBits(ORI, TMP1, TMP1, target_lo); |
| 63 instr5->SetSpecialInstrBits(JALR, TMP1, ZR, RA); |
| 64 instr6->SetInstructionBits(Instr::kNopInstruction); |
| 65 |
| 66 CPU::FlushICache(pc_ - 6 * Instr::kInstrSize, 6 * Instr::kInstrSize); |
27 } | 67 } |
28 | 68 |
29 | 69 |
30 void CodeBreakpoint::RestoreFunctionReturn() { | 70 void CodeBreakpoint::RestoreFunctionReturn() { |
31 UNIMPLEMENTED(); | 71 Instr* instr1 = Instr::At(pc_ - 6 * Instr::kInstrSize); |
| 72 Instr* instr2 = Instr::At(pc_ - 5 * Instr::kInstrSize); |
| 73 Instr* instr3 = Instr::At(pc_ - 4 * Instr::kInstrSize); |
| 74 Instr* instr4 = Instr::At(pc_ - 3 * Instr::kInstrSize); |
| 75 Instr* instr5 = Instr::At(pc_ - 2 * Instr::kInstrSize); |
| 76 Instr* instr6 = Instr::At(pc_ - 1 * Instr::kInstrSize); |
| 77 |
| 78 ASSERT(instr3->OpcodeField() == LUI && instr3->RtField() == TMP1); |
| 79 |
| 80 instr1->SetImmInstrBits(LW, SP, RA, 2 * kWordSize); |
| 81 instr2->SetImmInstrBits(LW, SP, FP, 1 * kWordSize); |
| 82 instr3->SetImmInstrBits(LW, SP, PP, 0 * kWordSize); |
| 83 instr4->SetImmInstrBits(ADDIU, SP, SP, 4 * kWordSize); |
| 84 instr5->SetSpecialInstrBits(JR, RA, ZR, ZR); |
| 85 instr6->SetInstructionBits(Instr::kNopInstruction); |
| 86 |
| 87 CPU::FlushICache(pc_ - 6 * Instr::kInstrSize, 6 * Instr::kInstrSize); |
32 } | 88 } |
33 | 89 |
34 } // namespace dart | 90 } // namespace dart |
35 | 91 |
36 #endif // defined TARGET_ARCH_MIPS | 92 #endif // defined TARGET_ARCH_MIPS |
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