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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
4 | 4 |
5 #ifndef VM_CONSTANTS_MIPS_H_ | 5 #ifndef VM_CONSTANTS_MIPS_H_ |
6 #define VM_CONSTANTS_MIPS_H_ | 6 #define VM_CONSTANTS_MIPS_H_ |
7 | 7 |
| 8 #include "platform/assert.h" |
| 9 |
8 namespace dart { | 10 namespace dart { |
9 | 11 |
10 enum Register { | 12 enum Register { |
11 R0 = 0, | 13 R0 = 0, |
12 R1 = 1, | 14 R1 = 1, |
13 kFirstFreeCpuRegister = 2, | 15 kFirstFreeCpuRegister = 2, |
14 R2 = 2, | 16 R2 = 2, |
15 R3 = 3, | 17 R3 = 3, |
16 R4 = 4, | 18 R4 = 4, |
17 R5 = 5, | 19 R5 = 5, |
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405 // Get the raw instruction bits. | 407 // Get the raw instruction bits. |
406 inline int32_t InstructionBits() const { | 408 inline int32_t InstructionBits() const { |
407 return *reinterpret_cast<const int32_t*>(this); | 409 return *reinterpret_cast<const int32_t*>(this); |
408 } | 410 } |
409 | 411 |
410 // Set the raw instruction bits to value. | 412 // Set the raw instruction bits to value. |
411 inline void SetInstructionBits(int32_t value) { | 413 inline void SetInstructionBits(int32_t value) { |
412 *reinterpret_cast<int32_t*>(this) = value; | 414 *reinterpret_cast<int32_t*>(this) = value; |
413 } | 415 } |
414 | 416 |
| 417 inline void SetImmInstrBits(Opcode op, Register rs, Register rt, |
| 418 uint16_t imm) { |
| 419 SetInstructionBits( |
| 420 op << kOpcodeShift | |
| 421 rs << kRsShift | |
| 422 rt << kRtShift | |
| 423 imm << kImmShift); |
| 424 } |
| 425 |
| 426 inline void SetSpecialInstrBits(SpecialFunction f, |
| 427 Register rs, Register rt, Register rd) { |
| 428 SetInstructionBits( |
| 429 SPECIAL << kOpcodeShift | |
| 430 f << kFunctionShift | |
| 431 rs << kRsShift | |
| 432 rt << kRtShift | |
| 433 rd << kRdShift); |
| 434 } |
| 435 |
415 // Read one particular bit out of the instruction bits. | 436 // Read one particular bit out of the instruction bits. |
416 inline int32_t Bit(int nr) const { | 437 inline int32_t Bit(int nr) const { |
417 return (InstructionBits() >> nr) & 1; | 438 return (InstructionBits() >> nr) & 1; |
418 } | 439 } |
419 | 440 |
420 // Read a bit field out of the instruction bits. | 441 // Read a bit field out of the instruction bits. |
421 inline int32_t Bits(int shift, int count) const { | 442 inline int32_t Bits(int shift, int count) const { |
422 return (InstructionBits() >> shift) & ((1 << count) - 1); | 443 return (InstructionBits() >> shift) & ((1 << count) - 1); |
423 } | 444 } |
424 | 445 |
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495 inline Format FormatField() const { | 516 inline Format FormatField() const { |
496 return static_cast<Format>(Bits(kFmtShift, kFmtBits)); | 517 return static_cast<Format>(Bits(kFmtShift, kFmtBits)); |
497 } | 518 } |
498 | 519 |
499 // Instructions are read out of a code stream. The only way to get a | 520 // Instructions are read out of a code stream. The only way to get a |
500 // reference to an instruction is to convert a pc. There is no way | 521 // reference to an instruction is to convert a pc. There is no way |
501 // to allocate or create instances of class Instr. | 522 // to allocate or create instances of class Instr. |
502 // Use the At(pc) function to create references to Instr. | 523 // Use the At(pc) function to create references to Instr. |
503 static Instr* At(uword pc) { return reinterpret_cast<Instr*>(pc); } | 524 static Instr* At(uword pc) { return reinterpret_cast<Instr*>(pc); } |
504 | 525 |
| 526 #if defined(DEBUG) |
| 527 inline void AssertIsImmInstr(Opcode op, Register rs, Register rt, |
| 528 int32_t imm) { |
| 529 ASSERT((OpcodeField() == op) && (RsField() == rs) && (RtField() == rt) && |
| 530 (SImmField() == imm)); |
| 531 } |
| 532 |
| 533 inline void AssertIsSpecialInstr(SpecialFunction f, Register rs, Register rt, |
| 534 Register rd) { |
| 535 ASSERT((OpcodeField() == SPECIAL) && (FunctionField() == f) && |
| 536 (RsField() == rs) && (RtField() == rt) && |
| 537 (RdField() == rd)); |
| 538 } |
| 539 #endif // defined(DEBUG) |
| 540 |
505 private: | 541 private: |
506 DISALLOW_ALLOCATION(); | 542 DISALLOW_ALLOCATION(); |
507 DISALLOW_IMPLICIT_CONSTRUCTORS(Instr); | 543 DISALLOW_IMPLICIT_CONSTRUCTORS(Instr); |
508 }; | 544 }; |
509 | 545 |
510 } // namespace dart | 546 } // namespace dart |
511 | 547 |
512 #endif // VM_CONSTANTS_MIPS_H_ | 548 #endif // VM_CONSTANTS_MIPS_H_ |
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