| Index: src/x64/lithium-x64.h
|
| diff --git a/src/x64/lithium-x64.h b/src/x64/lithium-x64.h
|
| index cc7338261451e7f6d7f592542a3b2180dfdbdf60..d6edd6de8bd92f7a75d02f267f9933404d3ffcb8 100644
|
| --- a/src/x64/lithium-x64.h
|
| +++ b/src/x64/lithium-x64.h
|
| @@ -50,6 +50,7 @@ class LCodeGen;
|
| V(AccessArgumentsAt) \
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| V(AddI) \
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| V(Allocate) \
|
| + V(AllocateObject) \
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| V(ApplyArguments) \
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| V(ArgumentsElements) \
|
| V(ArgumentsLength) \
|
| @@ -489,17 +490,44 @@ class LUnknownOSRValue: public LTemplateInstruction<1, 0, 0> {
|
| template<int I, int T>
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| class LControlInstruction: public LTemplateInstruction<0, I, T> {
|
| public:
|
| + LControlInstruction() : false_label_(NULL), true_label_(NULL) { }
|
| +
|
| virtual bool IsControl() const { return true; }
|
|
|
| int SuccessorCount() { return hydrogen()->SuccessorCount(); }
|
| HBasicBlock* SuccessorAt(int i) { return hydrogen()->SuccessorAt(i); }
|
| - int true_block_id() { return hydrogen()->SuccessorAt(0)->block_id(); }
|
| - int false_block_id() { return hydrogen()->SuccessorAt(1)->block_id(); }
|
| +
|
| + int TrueDestination(LChunk* chunk) {
|
| + return chunk->LookupDestination(true_block_id());
|
| + }
|
| + int FalseDestination(LChunk* chunk) {
|
| + return chunk->LookupDestination(false_block_id());
|
| + }
|
| +
|
| + Label* TrueLabel(LChunk* chunk) {
|
| + if (true_label_ == NULL) {
|
| + true_label_ = chunk->GetAssemblyLabel(TrueDestination(chunk));
|
| + }
|
| + return true_label_;
|
| + }
|
| + Label* FalseLabel(LChunk* chunk) {
|
| + if (false_label_ == NULL) {
|
| + false_label_ = chunk->GetAssemblyLabel(FalseDestination(chunk));
|
| + }
|
| + return false_label_;
|
| + }
|
| +
|
| + protected:
|
| + int true_block_id() { return SuccessorAt(0)->block_id(); }
|
| + int false_block_id() { return SuccessorAt(1)->block_id(); }
|
|
|
| private:
|
| HControlInstruction* hydrogen() {
|
| return HControlInstruction::cast(this->hydrogen_value());
|
| }
|
| +
|
| + Label* false_label_;
|
| + Label* true_label_;
|
| };
|
|
|
|
|
| @@ -1190,7 +1218,7 @@ class LDebugBreak: public LTemplateInstruction<0, 0, 0> {
|
| };
|
|
|
|
|
| -class LCmpMapAndBranch: public LTemplateInstruction<0, 1, 0> {
|
| +class LCmpMapAndBranch: public LControlInstruction<1, 0> {
|
| public:
|
| explicit LCmpMapAndBranch(LOperand* value) {
|
| inputs_[0] = value;
|
| @@ -1201,15 +1229,7 @@ class LCmpMapAndBranch: public LTemplateInstruction<0, 1, 0> {
|
| DECLARE_CONCRETE_INSTRUCTION(CmpMapAndBranch, "cmp-map-and-branch")
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| DECLARE_HYDROGEN_ACCESSOR(CompareMap)
|
|
|
| - virtual bool IsControl() const { return true; }
|
| -
|
| Handle<Map> map() const { return hydrogen()->map(); }
|
| - int true_block_id() const {
|
| - return hydrogen()->FirstSuccessor()->block_id();
|
| - }
|
| - int false_block_id() const {
|
| - return hydrogen()->SecondSuccessor()->block_id();
|
| - }
|
| };
|
|
|
|
|
| @@ -2359,6 +2379,20 @@ class LCheckNonSmi: public LTemplateInstruction<0, 1, 0> {
|
| LOperand* value() { return inputs_[0]; }
|
|
|
| DECLARE_CONCRETE_INSTRUCTION(CheckNonSmi, "check-non-smi")
|
| + DECLARE_HYDROGEN_ACCESSOR(CheckHeapObject)
|
| +};
|
| +
|
| +
|
| +class LAllocateObject: public LTemplateInstruction<1, 0, 1> {
|
| + public:
|
| + explicit LAllocateObject(LOperand* temp) {
|
| + temps_[0] = temp;
|
| + }
|
| +
|
| + LOperand* temp() { return temps_[0]; }
|
| +
|
| + DECLARE_CONCRETE_INSTRUCTION(AllocateObject, "allocate-object")
|
| + DECLARE_HYDROGEN_ACCESSOR(AllocateObject)
|
| };
|
|
|
|
|
| @@ -2463,26 +2497,10 @@ class LDeleteProperty: public LTemplateInstruction<1, 2, 0> {
|
|
|
| class LOsrEntry: public LTemplateInstruction<0, 0, 0> {
|
| public:
|
| - LOsrEntry();
|
| + LOsrEntry() {}
|
|
|
| virtual bool HasInterestingComment(LCodeGen* gen) const { return false; }
|
| DECLARE_CONCRETE_INSTRUCTION(OsrEntry, "osr-entry")
|
| -
|
| - LOperand** SpilledRegisterArray() { return register_spills_; }
|
| - LOperand** SpilledDoubleRegisterArray() { return double_register_spills_; }
|
| -
|
| - void MarkSpilledRegister(int allocation_index, LOperand* spill_operand);
|
| - void MarkSpilledDoubleRegister(int allocation_index,
|
| - LOperand* spill_operand);
|
| -
|
| - private:
|
| - // Arrays of spill slot operands for registers with an assigned spill
|
| - // slot, i.e., that must also be restored to the spill slot on OSR entry.
|
| - // NULL if the register has no assigned spill slot. Indexed by allocation
|
| - // index.
|
| - LOperand* register_spills_[Register::kMaxNumAllocatableRegisters];
|
| - LOperand* double_register_spills_[
|
| - DoubleRegister::kMaxNumAllocatableRegisters];
|
| };
|
|
|
|
|
|
|