Subzero: Refactor x86 register representation to actively use aliases.

src/IceCfgNode.cpp

 //===- subzero/src/IceCfgNode.cpp - Basic block (node) implementation -----===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 286 matching lines @@
 }
 
 namespace {
 
 // Helpers for advancedPhiLowering().
 
 class PhiDesc {
   PhiDesc() = delete;
   PhiDesc(const PhiDesc &) = delete;
   PhiDesc &operator=(const PhiDesc &) = delete;
+
 public:
   PhiDesc(InstPhi *Phi, Variable *Dest) : Phi(Phi), Dest(Dest) {}
   PhiDesc(PhiDesc &&) = default;
   InstPhi *Phi = nullptr;
   Variable *Dest = nullptr;
   Operand *Src = nullptr;
   bool Processed = false;
   size_t NumPred = 0; // number of entries whose Src is this Dest
   int32_t Weight = 0; // preference for topological order
 };
@@ skipping 133 matching lines @@
     }
     // Second pass computes NumPred by comparing every pair of Phi instructions.
     for (PhiDesc &Item : Desc) {
       if (Item.Processed)
         continue;
       const Variable *Dest = Item.Dest;
       for (PhiDesc &Item2 : Desc) {
         if (Item2.Processed)
           continue;
         // There shouldn't be two different Phis with the same Dest variable or
-          // register.
+        // register.
         assert((&Item == &Item2) || !sameVarOrReg(Target, Dest, Item2.Dest));
         if (sameVarOrReg(Target, Dest, Item2.Src))
           ++Item.NumPred;
       }
     }
 
     // Another pass to compute initial Weight values.
     for (PhiDesc &Item : Desc) {
       if (Item.Processed)
         continue;
@@ skipping 934 matching lines @@
   InstIntrinsicCall *Inst = InstIntrinsicCall::create(
       Func, 5, Func->makeVariable(IceType_i64), RMWI64Name, Info->Info);
   Inst->addArg(AtomicRMWOp);
   Inst->addArg(Counter);
   Inst->addArg(One);
   Inst->addArg(OrderAcquireRelease);
   Insts.push_front(Inst);
 }
 
 } // end of namespace Ice