Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(866)

Side by Side Diff: Makefile.standalone

Issue 1427973003: Subzero: Refactor x86 register representation to actively use aliases. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Reformat Created 5 years, 1 month ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« no previous file with comments | « no previous file | src/IceCfg.cpp » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 # The following variables will likely need to be modified, depending on where 1 # The following variables will likely need to be modified, depending on where
2 # and how you built LLVM & Clang. They can be overridden in a command-line 2 # and how you built LLVM & Clang. They can be overridden in a command-line
3 # invocation of make, like: 3 # invocation of make, like:
4 # 4 #
5 # make LLVM_SRC_PATH=<path> LIBCXX_INSTALL_PATH=<path> CLANG_PATH=<path> \ 5 # make LLVM_SRC_PATH=<path> LIBCXX_INSTALL_PATH=<path> CLANG_PATH=<path> \
6 # PNACL_BIN_PATH=<path> ... 6 # PNACL_BIN_PATH=<path> ...
7 # 7 #
8 8
9 # LLVM_SRC_PATH is the path to the root of the checked out source code. This 9 # LLVM_SRC_PATH is the path to the root of the checked out source code. This
10 # directory should contain the configure script, the include/ and lib/ 10 # directory should contain the configure script, the include/ and lib/
(...skipping 178 matching lines...) Expand 10 before | Expand all | Expand 10 after
189 189
190 CXXFLAGS := $(LLVM_CXXFLAGS) $(BASE_CXXFLAGS) $(CXX_DEFINES) $(HOST_FLAGS) \ 190 CXXFLAGS := $(LLVM_CXXFLAGS) $(BASE_CXXFLAGS) $(CXX_DEFINES) $(HOST_FLAGS) \
191 $(STDLIB_FLAGS) 191 $(STDLIB_FLAGS)
192 SB_CXXFLAGS := $(SB_LLVM_CXXFLAGS) $(BASE_CXXFLAGS) $(SB_CXX_DEFINES) 192 SB_CXXFLAGS := $(SB_LLVM_CXXFLAGS) $(BASE_CXXFLAGS) $(SB_CXX_DEFINES)
193 193
194 LDFLAGS := $(HOST_FLAGS) -L$(LIBCXX_INSTALL_PATH)/lib -Wl,--gc-sections \ 194 LDFLAGS := $(HOST_FLAGS) -L$(LIBCXX_INSTALL_PATH)/lib -Wl,--gc-sections \
195 $(LD_EXTRA) $(STDLIB_FLAGS) 195 $(LD_EXTRA) $(STDLIB_FLAGS)
196 # Not specifying -Wl,--gc-sections but instead doing bitcode linking GC w/ LTO. 196 # Not specifying -Wl,--gc-sections but instead doing bitcode linking GC w/ LTO.
197 SB_LDFLAGS := $(LINKOPTLEVEL) $(LD_EXTRA) 197 SB_LDFLAGS := $(LINKOPTLEVEL) $(LD_EXTRA)
198 198
199 # List the target-specific source files first, which generally take longer to
200 # compile, in the hope of improving parallel build time.
199 SRCS = \ 201 SRCS = \
202 IceAssemblerARM32.cpp \
203 IceInstARM32.cpp \
204 IceInstMIPS32.cpp \
205 IceInstX8632.cpp \
206 IceInstX8664.cpp \
207 IceTargetLowering.cpp \
208 IceTargetLoweringARM32.cpp \
209 IceTargetLoweringMIPS32.cpp \
210 IceTargetLoweringX8632.cpp \
211 IceTargetLoweringX8664.cpp \
200 IceAssembler.cpp \ 212 IceAssembler.cpp \
201 IceAssemblerARM32.cpp \
202 IceBrowserCompileServer.cpp \ 213 IceBrowserCompileServer.cpp \
203 IceCfg.cpp \ 214 IceCfg.cpp \
204 IceCfgNode.cpp \ 215 IceCfgNode.cpp \
205 IceClFlags.cpp \ 216 IceClFlags.cpp \
206 IceCompiler.cpp \ 217 IceCompiler.cpp \
207 IceCompileServer.cpp \ 218 IceCompileServer.cpp \
208 IceELFObjectWriter.cpp \ 219 IceELFObjectWriter.cpp \
209 IceELFSection.cpp \ 220 IceELFSection.cpp \
210 IceFixups.cpp \ 221 IceFixups.cpp \
211 IceGlobalContext.cpp \ 222 IceGlobalContext.cpp \
212 IceGlobalInits.cpp \ 223 IceGlobalInits.cpp \
213 IceInst.cpp \ 224 IceInst.cpp \
214 IceInstARM32.cpp \
215 IceInstMIPS32.cpp \
216 IceInstX8632.cpp \
217 IceInstX8664.cpp \
218 IceIntrinsics.cpp \ 225 IceIntrinsics.cpp \
219 IceLiveness.cpp \ 226 IceLiveness.cpp \
220 IceLoopAnalyzer.cpp \ 227 IceLoopAnalyzer.cpp \
221 IceOperand.cpp \ 228 IceOperand.cpp \
222 IceRegAlloc.cpp \ 229 IceRegAlloc.cpp \
223 IceRNG.cpp \ 230 IceRNG.cpp \
224 IceSwitchLowering.cpp \ 231 IceSwitchLowering.cpp \
225 IceTargetLowering.cpp \
226 IceTargetLoweringARM32.cpp \
227 IceTargetLoweringMIPS32.cpp \
228 IceTargetLoweringX8632.cpp \
229 IceTargetLoweringX8664.cpp \
230 IceThreading.cpp \ 232 IceThreading.cpp \
231 IceTimerTree.cpp \ 233 IceTimerTree.cpp \
232 IceTranslator.cpp \ 234 IceTranslator.cpp \
233 IceTypes.cpp \ 235 IceTypes.cpp \
234 main.cpp \ 236 main.cpp \
235 PNaClTranslator.cpp 237 PNaClTranslator.cpp
236 238
237 ifndef MINIMAL 239 ifndef MINIMAL
238 SRCS += \ 240 SRCS += \
239 IceConverter.cpp \ 241 IceConverter.cpp \
(...skipping 150 matching lines...) Expand 10 before | Expand all | Expand 10 after
390 -i arm32,native,neon \ 392 -i arm32,native,neon \
391 -e arm32,native,neon,test_vector_ops \ 393 -e arm32,native,neon,test_vector_ops \
392 -e arm32,native,neon,test_select 394 -e arm32,native,neon,test_select
393 PNACL_BIN_PATH=$(PNACL_BIN_PATH) \ 395 PNACL_BIN_PATH=$(PNACL_BIN_PATH) \
394 $(LLVM_SRC_PATH)/utils/lit/lit.py -sv crosstest/Output 396 $(LLVM_SRC_PATH)/utils/lit/lit.py -sv crosstest/Output
395 endif 397 endif
396 398
397 check-unit: $(OBJDIR)/run_unittests 399 check-unit: $(OBJDIR)/run_unittests
398 $(OBJDIR)/run_unittests 400 $(OBJDIR)/run_unittests
399 401
400 ALLSPEC := 177.mesa 179.art 183.equake 188.ammp 164.gzip 175.vpr 176.gcc \ 402 # List the spec2k components in roughly reverse order of runtime, to help with
401 181.mcf 186.crafty 197.parser 253.perlbmk 254.gap 255.vortex \ 403 # parallel execution speed.
402 256.bzip2 300.twolf 252.eon 404 ALLSPEC := 253.perlbmk 177.mesa 188.ammp 256.bzip2 164.gzip 179.art 183.equake \
405 175.vpr 176.gcc 181.mcf 186.crafty 197.parser 254.gap 255.vortex \
406 300.twolf 252.eon
403 .PHONY: $(ALLSPEC) 407 .PHONY: $(ALLSPEC)
404 408
405 TARGET := x8632 409 TARGET := x8632
406 ifeq ($(TARGET),x8632) 410 ifeq ($(TARGET),x8632)
407 TARGETFLAG=x8632 411 TARGETFLAG=x8632
408 SETUP=SetupGccX8632Opt 412 SETUP=SetupGccX8632Opt
409 SPEC := -O2 --filetype=obj 413 SPEC := -O2 --filetype=obj
410 endif 414 endif
411 ifeq ($(TARGET),arm32) 415 ifeq ($(TARGET),arm32)
412 TARGETFLAG=arm32 416 TARGETFLAG=arm32
413 SETUP=SetupGccArmOpt 417 SETUP=SetupGccArmOpt
414 SPEC := -O2 --filetype=asm 418 SPEC := -O2 --filetype=asm
415 endif 419 endif
416 420
417 %.spec2k: % 421 %.spec2k: % $(OBJDIR)/pnacl-sz make_symlink runtime
418 ./pydir/szbuild_spec2k.py -v --force --target=$(TARGETFLAG) $(SPEC) $< 422 ./pydir/szbuild_spec2k.py -v --force --target=$(TARGETFLAG) $(SPEC) $<
419 ( cd ../../../tests/spec2k; \ 423 ( cd ../../../tests/spec2k; \
420 ./run_all.sh RunTimedBenchmarks $(SETUP) train $< ) 424 ./run_all.sh RunTimedBenchmarks $(SETUP) train $< )
421 425
422 check-spec: $(OBJDIR)/pnacl-sz make_symlink $(ALLSPEC:=.spec2k) 426 check-spec: $(ALLSPEC:=.spec2k)
423 427
424 check: check-lit check-unit check-xtest 428 check: check-lit check-unit check-xtest
425 429
426 FORMAT_BLACKLIST = 430 FORMAT_BLACKLIST =
427 # Add one of the following lines for each source file to ignore. 431 # Add one of the following lines for each source file to ignore.
428 FORMAT_BLACKLIST += ! -name IceParseInstsTest.cpp 432 FORMAT_BLACKLIST += ! -name IceParseInstsTest.cpp
429 FORMAT_BLACKLIST += ! -name IceParseTypesTest.cpp 433 FORMAT_BLACKLIST += ! -name IceParseTypesTest.cpp
430 FORMAT_BLACKLIST += ! -name assembler_arm.h 434 FORMAT_BLACKLIST += ! -name assembler_arm.h
431 FORMAT_BLACKLIST += ! -name assembler_arm.cc 435 FORMAT_BLACKLIST += ! -name assembler_arm.cc
432 format: 436 format:
(...skipping 13 matching lines...) Expand all
446 450
447 docs: 451 docs:
448 doxygen Doxyfile 452 doxygen Doxyfile
449 @echo See file://`pwd`/docs/html/index.html 453 @echo See file://`pwd`/docs/html/index.html
450 454
451 clean: 455 clean:
452 rm -rf pnacl-sz *.o $(OBJDIR) $(SB_OBJDIR) build/pnacl-sz.bloat.json 456 rm -rf pnacl-sz *.o $(OBJDIR) $(SB_OBJDIR) build/pnacl-sz.bloat.json
453 457
454 clean-all: clean 458 clean-all: clean
455 rm -rf build/ docs/ 459 rm -rf build/ docs/
OLDNEW
« no previous file with comments | « no previous file | src/IceCfg.cpp » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698