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Side by Side Diff: src/IceAssemblerARM32.h

Issue 1427023004: Add UDIV to ARM integrated assembler. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Remove tabs. Created 5 years, 1 month ago
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1 //===- subzero/src/IceAssemblerARM32.h - Assembler for ARM32 ----*- C++ -*-===// 1 //===- subzero/src/IceAssemblerARM32.h - Assembler for ARM32 ----*- C++ -*-===//
2 // 2 //
3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
4 // for details. All rights reserved. Use of this source code is governed by a 4 // for details. All rights reserved. Use of this source code is governed by a
5 // BSD-style license that can be found in the LICENSE file. 5 // BSD-style license that can be found in the LICENSE file.
6 // 6 //
7 // Modified by the Subzero authors. 7 // Modified by the Subzero authors.
8 // 8 //
9 //===----------------------------------------------------------------------===// 9 //===----------------------------------------------------------------------===//
10 // 10 //
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171 bool SetFlags, CondARM32::Cond Cond); 171 bool SetFlags, CondARM32::Cond Cond);
172 172
173 void sdiv(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1, 173 void sdiv(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1,
174 CondARM32::Cond Cond); 174 CondARM32::Cond Cond);
175 175
176 void str(const Operand *OpRt, const Operand *OpAddress, CondARM32::Cond Cond); 176 void str(const Operand *OpRt, const Operand *OpAddress, CondARM32::Cond Cond);
177 177
178 void sub(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1, 178 void sub(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1,
179 bool SetFlags, CondARM32::Cond Cond); 179 bool SetFlags, CondARM32::Cond Cond);
180 180
181 void udiv(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1,
182 CondARM32::Cond Cond);
183
181 static bool classof(const Assembler *Asm) { 184 static bool classof(const Assembler *Asm) {
182 return Asm->getKind() == Asm_ARM32; 185 return Asm->getKind() == Asm_ARM32;
183 } 186 }
184 187
185 void emitTextInst(const std::string &Text, SizeT InstSize = sizeof(IValueT)); 188 void emitTextInst(const std::string &Text, SizeT InstSize = sizeof(IValueT));
186 189
187 private: 190 private:
188 // A vector of pool-allocated x86 labels for CFG nodes. 191 // A vector of pool-allocated x86 labels for CFG nodes.
189 using LabelVector = std::vector<Label *>; 192 using LabelVector = std::vector<Label *>;
190 LabelVector CfgNodeLabels; 193 LabelVector CfgNodeLabels;
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232 IValueT encodeBranchOffset(IOffsetT Offset, IValueT Inst); 235 IValueT encodeBranchOffset(IOffsetT Offset, IValueT Inst);
233 236
234 // Returns the offset encoded in the branch instruction Inst. 237 // Returns the offset encoded in the branch instruction Inst.
235 static IOffsetT decodeBranchOffset(IValueT Inst); 238 static IOffsetT decodeBranchOffset(IValueT Inst);
236 }; 239 };
237 240
238 } // end of namespace ARM32 241 } // end of namespace ARM32
239 } // end of namespace Ice 242 } // end of namespace Ice
240 243
241 #endif // SUBZERO_SRC_ICEASSEMBLERARM32_H 244 #endif // SUBZERO_SRC_ICEASSEMBLERARM32_H
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