Reverts refactoring of CPU feature detection for

runtime/vm/simulator_arm.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include <math.h>  // for isnan.
 #include <setjmp.h>
 #include <stdlib.h>
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_ARM)
 
 // Only build the simulator if not compiling for real ARM hardware.
 #if !defined(HOST_ARCH_ARM)
 
 #include "vm/simulator.h"
 
 #include "vm/assembler.h"
 #include "vm/constants_arm.h"
-#include "vm/cpu.h"
 #include "vm/disassembler.h"
 #include "vm/native_arguments.h"
 #include "vm/stack_frame.h"
 #include "vm/thread.h"
 
 namespace dart {
 
 DEFINE_FLAG(bool, trace_sim, false, "Trace simulator execution.");
 DEFINE_FLAG(int, stop_sim_at, 0, "Address to stop simulator at.");
 
@@ skipping 2267 matching lines @@
         set_register(rd, ReadW(addr, instr));
       } else {
         WriteW(addr, get_register(rd), instr);
       }
     }
   }
 }
 
 
 void Simulator::DoDivision(Instr* instr) {
-  ASSERT(TargetCPUFeatures::integer_division_supported());
+  ASSERT(CPUFeatures::integer_division_supported());
   Register rd = instr->DivRdField();
   Register rn = instr->DivRnField();
   Register rm = instr->DivRmField();
 
   // ARMv7-a does not trap on divide-by-zero. The destination register is just
   // set to 0.
   if (get_register(rm) == 0) {
     set_register(rd, 0);
     return;
   }
@@ skipping 1407 matching lines @@
   set_register(kExceptionObjectReg, bit_cast<int32_t>(raw_exception));
   set_register(kStackTraceObjectReg, bit_cast<int32_t>(raw_stacktrace));
   buf->Longjmp();
 }
 
 }  // namespace dart
 
 #endif  // !defined(HOST_ARCH_ARM)
 
 #endif  // defined TARGET_ARCH_ARM