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Side by Side Diff: src/IceInstARM32.cpp

Issue 1426513004: Fix ARM emit() methods to count instructions generated. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Fix nits. Created 5 years, 1 month ago
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1 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===// 1 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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77 77
78 void InstARM32Pred::dumpOpcodePred(Ostream &Str, const char *Opcode, 78 void InstARM32Pred::dumpOpcodePred(Ostream &Str, const char *Opcode,
79 Type Ty) const { 79 Type Ty) const {
80 Str << Opcode << getPredicate() << "." << Ty; 80 Str << Opcode << getPredicate() << "." << Ty;
81 } 81 }
82 82
83 CondARM32::Cond InstARM32::getOppositeCondition(CondARM32::Cond Cond) { 83 CondARM32::Cond InstARM32::getOppositeCondition(CondARM32::Cond Cond) {
84 return InstARM32CondAttributes[Cond].Opposite; 84 return InstARM32CondAttributes[Cond].Opposite;
85 } 85 }
86 86
87 void InstARM32::startNextInst(const Cfg *Func) const {
88 if (auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>())
89 Asm->incEmitTextSize(InstSize);
90 }
91
87 void InstARM32::emitUsingTextFixup(const Cfg *Func) const { 92 void InstARM32::emitUsingTextFixup(const Cfg *Func) const {
88 if (!BuildDefs::dump()) 93 if (!BuildDefs::dump())
89 return; 94 return;
90 GlobalContext *Ctx = Func->getContext(); 95 GlobalContext *Ctx = Func->getContext();
91 if (Ctx->getFlags().getDisableHybridAssembly()) { 96 if (Ctx->getFlags().getDisableHybridAssembly()) {
92 UnimplementedError(Ctx->getFlags()); 97 UnimplementedError(Ctx->getFlags());
93 return; 98 return;
94 } 99 }
95 ARM32::AssemblerARM32 *Asm = Func->getAssembler<ARM32::AssemblerARM32>(); 100 ARM32::AssemblerARM32 *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
96 std::string Buffer; 101 std::string Buffer;
97 llvm::raw_string_ostream StrBuf(Buffer); 102 llvm::raw_string_ostream StrBuf(Buffer);
98 OstreamLocker L(Ctx); 103 OstreamLocker L(Ctx);
99 Ostream &OldStr = Ctx->getStrEmit(); 104 Ostream &OldStr = Ctx->getStrEmit();
100 Ctx->setStrEmit(StrBuf); 105 Ctx->setStrEmit(StrBuf);
106 // Start counting instructions here, so that emit() methods don't
107 // need to call this for the first instruction.
108 Asm->resetEmitTextSize();
109 Asm->incEmitTextSize(InstSize);
101 emit(Func); 110 emit(Func);
102 Ctx->setStrEmit(OldStr); 111 Ctx->setStrEmit(OldStr);
103 Asm->emitTextInst(StrBuf.str()); 112 Asm->emitTextInst(StrBuf.str(), Asm->getEmitTextSize());
104 } 113 }
105 114
106 void InstARM32::emitIAS(const Cfg *Func) const { emitUsingTextFixup(Func); } 115 void InstARM32::emitIAS(const Cfg *Func) const { emitUsingTextFixup(Func); }
107 116
108 void InstARM32Pred::emitUnaryopGPR(const char *Opcode, 117 void InstARM32Pred::emitUnaryopGPR(const char *Opcode,
109 const InstARM32Pred *Inst, const Cfg *Func, 118 const InstARM32Pred *Inst, const Cfg *Func,
110 bool NeedsWidthSuffix) { 119 bool NeedsWidthSuffix) {
111 Ostream &Str = Func->getContext()->getStrEmit(); 120 Ostream &Str = Func->getContext()->getStrEmit();
112 assert(Inst->getSrcSize() == 1); 121 assert(Inst->getSrcSize() == 1);
113 Type SrcTy = Inst->getSrc(0)->getType(); 122 Type SrcTy = Inst->getSrc(0)->getType();
(...skipping 689 matching lines...) Expand 10 before | Expand all | Expand 10 after
803 Str << "\t" 812 Str << "\t"
804 << "b" << getPredicate() << "\t"; 813 << "b" << getPredicate() << "\t";
805 if (Label) { 814 if (Label) {
806 Str << Label->getName(Func); 815 Str << Label->getName(Func);
807 } else { 816 } else {
808 if (isUnconditionalBranch()) { 817 if (isUnconditionalBranch()) {
809 Str << getTargetFalse()->getAsmName(); 818 Str << getTargetFalse()->getAsmName();
810 } else { 819 } else {
811 Str << getTargetTrue()->getAsmName(); 820 Str << getTargetTrue()->getAsmName();
812 if (getTargetFalse()) { 821 if (getTargetFalse()) {
822 startNextInst(Func);
813 Str << "\n\t" 823 Str << "\n\t"
814 << "b" 824 << "b"
815 << "\t" << getTargetFalse()->getAsmName(); 825 << "\t" << getTargetFalse()->getAsmName();
816 } 826 }
817 } 827 }
818 } 828 }
819 } 829 }
820 830
821 void InstARM32Br::emitIAS(const Cfg *Func) const { 831 void InstARM32Br::emitIAS(const Cfg *Func) const {
822 if (!Func->getContext()->getFlags().getAllowUnsafeIas()) 832 if (!Func->getContext()->getFlags().getAllowUnsafeIas())
(...skipping 239 matching lines...) Expand 10 before | Expand all | Expand 10 after
1062 Op->emit(Func); 1072 Op->emit(Func);
1063 PrintComma = true; 1073 PrintComma = true;
1064 } 1074 }
1065 } 1075 }
1066 Str << "}\n"; 1076 Str << "}\n";
1067 } 1077 }
1068 1078
1069 for (const Operand *Op : Dests) { 1079 for (const Operand *Op : Dests) {
1070 if (isScalarIntegerType(Op->getType())) 1080 if (isScalarIntegerType(Op->getType()))
1071 continue; 1081 continue;
1082 startNextInst(Func);
1072 Str << "\t" 1083 Str << "\t"
1073 << "vpop" 1084 << "vpop"
1074 << "\t{"; 1085 << "\t{";
1075 Op->emit(Func); 1086 Op->emit(Func);
1076 Str << "}\n"; 1087 Str << "}\n";
1077 } 1088 }
1078 } 1089 }
1079 1090
1080 void InstARM32Pop::dump(const Cfg *Func) const { 1091 void InstARM32Pop::dump(const Cfg *Func) const {
1081 if (!BuildDefs::dump()) 1092 if (!BuildDefs::dump())
(...skipping 50 matching lines...) Expand 10 before | Expand all | Expand 10 after
1132 Operand *Op = getSrc(i - 1); 1143 Operand *Op = getSrc(i - 1);
1133 if (isScalarIntegerType(Op->getType())) 1144 if (isScalarIntegerType(Op->getType()))
1134 continue; 1145 continue;
1135 Str << "\t" 1146 Str << "\t"
1136 << "vpush" 1147 << "vpush"
1137 << "\t{"; 1148 << "\t{";
1138 Op->emit(Func); 1149 Op->emit(Func);
1139 Str << "}\n"; 1150 Str << "}\n";
1140 } 1151 }
1141 if (IntegerCount != 0) { 1152 if (IntegerCount != 0) {
1153 startNextInst(Func);
1142 Str << "\t" 1154 Str << "\t"
1143 << "push" 1155 << "push"
1144 << "\t{"; 1156 << "\t{";
1145 bool PrintComma = false; 1157 bool PrintComma = false;
1146 for (SizeT i = 0; i < getSrcSize(); ++i) { 1158 for (SizeT i = 0; i < getSrcSize(); ++i) {
1147 Operand *Op = getSrc(i); 1159 Operand *Op = getSrc(i);
1148 if (isScalarIntegerType(Op->getType())) { 1160 if (isScalarIntegerType(Op->getType())) {
1149 if (PrintComma) 1161 if (PrintComma)
1150 Str << ", "; 1162 Str << ", ";
1151 Op->emit(Func); 1163 Op->emit(Func);
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1599 template class InstARM32UnaryopGPR<InstARM32::Rbit, false>; 1611 template class InstARM32UnaryopGPR<InstARM32::Rbit, false>;
1600 template class InstARM32UnaryopGPR<InstARM32::Rev, false>; 1612 template class InstARM32UnaryopGPR<InstARM32::Rev, false>;
1601 template class InstARM32UnaryopGPR<InstARM32::Sxt, true>; 1613 template class InstARM32UnaryopGPR<InstARM32::Sxt, true>;
1602 template class InstARM32UnaryopGPR<InstARM32::Uxt, true>; 1614 template class InstARM32UnaryopGPR<InstARM32::Uxt, true>;
1603 template class InstARM32UnaryopFP<InstARM32::Vsqrt>; 1615 template class InstARM32UnaryopFP<InstARM32::Vsqrt>;
1604 1616
1605 template class InstARM32CmpLike<InstARM32::Cmp>; 1617 template class InstARM32CmpLike<InstARM32::Cmp>;
1606 template class InstARM32CmpLike<InstARM32::Tst>; 1618 template class InstARM32CmpLike<InstARM32::Tst>;
1607 1619
1608 } // end of namespace Ice 1620 } // end of namespace Ice
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