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1 //===- subzero/src/IceAssemblerARM32.h - Assembler for ARM32 ----*- C++ -*-===// | 1 //===- subzero/src/IceAssemblerARM32.h - Assembler for ARM32 ----*- C++ -*-===// |
2 // | 2 // |
3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
4 // for details. All rights reserved. Use of this source code is governed by a | 4 // for details. All rights reserved. Use of this source code is governed by a |
5 // BSD-style license that can be found in the LICENSE file. | 5 // BSD-style license that can be found in the LICENSE file. |
6 // | 6 // |
7 // Modified by the Subzero authors. | 7 // Modified by the Subzero authors. |
8 // | 8 // |
9 //===----------------------------------------------------------------------===// | 9 //===----------------------------------------------------------------------===// |
10 // | 10 // |
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75 } | 75 } |
76 } | 76 } |
77 | 77 |
78 MoveRelocatableFixup *createMoveFixup(bool IsMovW, const Constant *Value); | 78 MoveRelocatableFixup *createMoveFixup(bool IsMovW, const Constant *Value); |
79 | 79 |
80 void alignFunction() override { | 80 void alignFunction() override { |
81 const SizeT Align = 1 << getBundleAlignLog2Bytes(); | 81 const SizeT Align = 1 << getBundleAlignLog2Bytes(); |
82 SizeT BytesNeeded = Utils::OffsetToAlignment(Buffer.getPosition(), Align); | 82 SizeT BytesNeeded = Utils::OffsetToAlignment(Buffer.getPosition(), Align); |
83 constexpr IValueT UndefinedInst = 0xe7fedef0; // udf #60896 | 83 constexpr IValueT UndefinedInst = 0xe7fedef0; // udf #60896 |
84 constexpr SizeT InstSize = sizeof(IValueT); | 84 constexpr SizeT InstSize = sizeof(IValueT); |
85 assert(BytesNeeded % InstSize == 0); | 85 assert(BytesNeeded % InstARM32::InstSize == 0); |
86 while (BytesNeeded > 0) { | 86 while (BytesNeeded > 0) { |
87 AssemblerBuffer::EnsureCapacity ensured(&Buffer); | 87 AssemblerBuffer::EnsureCapacity ensured(&Buffer); |
88 emitInst(UndefinedInst); | 88 emitInst(UndefinedInst); |
89 BytesNeeded -= InstSize; | 89 BytesNeeded -= InstSize; |
90 } | 90 } |
91 } | 91 } |
92 | 92 |
93 SizeT getBundleAlignLog2Bytes() const override { return 4; } | 93 SizeT getBundleAlignLog2Bytes() const override { return 4; } |
94 | 94 |
95 const char *getAlignDirective() const override { return ".p2alignl"; } | 95 const char *getAlignDirective() const override { return ".p2alignl"; } |
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130 if (!getPreliminary()) | 130 if (!getPreliminary()) |
131 this->bind(L); | 131 this->bind(L); |
132 } | 132 } |
133 | 133 |
134 bool fixupIsPCRel(FixupKind Kind) const override { | 134 bool fixupIsPCRel(FixupKind Kind) const override { |
135 (void)Kind; | 135 (void)Kind; |
136 // TODO(kschimpf) Decide if we need this. | 136 // TODO(kschimpf) Decide if we need this. |
137 return false; | 137 return false; |
138 } | 138 } |
139 | 139 |
| 140 /// Accessors to keep track of the number of bytes generated inside |
| 141 /// InstARM32::emit() methods, when run inside of |
| 142 /// InstARM32::emitUsingTextFixup(). |
| 143 void resetEmitTextSize() { EmitTextSize = 0; } |
| 144 void incEmitTextSize(size_t Amount) { EmitTextSize += Amount; } |
| 145 void decEmitTextSize(size_t Amount) { EmitTextSize -= Amount; } |
| 146 size_t getEmitTextSize() const { return EmitTextSize; } |
| 147 |
140 void bind(Label *label); | 148 void bind(Label *label); |
141 | 149 |
142 // List of instructions implemented by integrated assembler. | 150 // List of instructions implemented by integrated assembler. |
143 | 151 |
144 void adc(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1, | 152 void adc(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1, |
145 bool SetFlags, CondARM32::Cond Cond); | 153 bool SetFlags, CondARM32::Cond Cond); |
146 | 154 |
147 void add(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1, | 155 void add(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1, |
148 bool SetFlags, CondARM32::Cond Cond); | 156 bool SetFlags, CondARM32::Cond Cond); |
149 | 157 |
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191 | 199 |
192 void tst(const Operand *OpRn, const Operand *OpSrc1, CondARM32::Cond Cond); | 200 void tst(const Operand *OpRn, const Operand *OpSrc1, CondARM32::Cond Cond); |
193 | 201 |
194 void udiv(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1, | 202 void udiv(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1, |
195 CondARM32::Cond Cond); | 203 CondARM32::Cond Cond); |
196 | 204 |
197 static bool classof(const Assembler *Asm) { | 205 static bool classof(const Assembler *Asm) { |
198 return Asm->getKind() == Asm_ARM32; | 206 return Asm->getKind() == Asm_ARM32; |
199 } | 207 } |
200 | 208 |
201 void emitTextInst(const std::string &Text, SizeT InstSize = sizeof(IValueT)); | 209 void emitTextInst(const std::string &Text, SizeT InstSize); |
202 | 210 |
203 private: | 211 private: |
204 // A vector of pool-allocated x86 labels for CFG nodes. | 212 // A vector of pool-allocated x86 labels for CFG nodes. |
205 using LabelVector = std::vector<Label *>; | 213 using LabelVector = std::vector<Label *>; |
206 LabelVector CfgNodeLabels; | 214 LabelVector CfgNodeLabels; |
207 // A vector of pool-allocated x86 labels for Local labels. | 215 // A vector of pool-allocated x86 labels for Local labels. |
208 LabelVector LocalLabels; | 216 LabelVector LocalLabels; |
| 217 // Number of bytes emitted by InstARM32::emit() methods, when run inside |
| 218 // InstARM32::emitUsingTextFixup(). |
| 219 size_t EmitTextSize = 0; |
209 | 220 |
210 Label *getOrCreateLabel(SizeT Number, LabelVector &Labels); | 221 Label *getOrCreateLabel(SizeT Number, LabelVector &Labels); |
211 | 222 |
212 void bindCfgNodeLabel(const CfgNode *Node) override; | 223 void bindCfgNodeLabel(const CfgNode *Node) override; |
213 | 224 |
214 void emitInst(IValueT Value) { Buffer.emit<IValueT>(Value); } | 225 void emitInst(IValueT Value) { Buffer.emit<IValueT>(Value); } |
215 | 226 |
216 // Pattern cccctttoooosnnnnddddiiiiiiiiiiii where cccc=Cond, ttt=Type, | 227 // Pattern cccctttoooosnnnnddddiiiiiiiiiiii where cccc=Cond, ttt=Type, |
217 // oooo=Opcode, nnnn=Rn, dddd=Rd, iiiiiiiiiiii=imm12 (See ARM section A5.2.3). | 228 // oooo=Opcode, nnnn=Rn, dddd=Rd, iiiiiiiiiiii=imm12 (See ARM section A5.2.3). |
218 void emitType01(CondARM32::Cond Cond, IValueT Type, IValueT Opcode, | 229 void emitType01(CondARM32::Cond Cond, IValueT Type, IValueT Opcode, |
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267 IValueT encodeBranchOffset(IOffsetT Offset, IValueT Inst); | 278 IValueT encodeBranchOffset(IOffsetT Offset, IValueT Inst); |
268 | 279 |
269 // Returns the offset encoded in the branch instruction Inst. | 280 // Returns the offset encoded in the branch instruction Inst. |
270 static IOffsetT decodeBranchOffset(IValueT Inst); | 281 static IOffsetT decodeBranchOffset(IValueT Inst); |
271 }; | 282 }; |
272 | 283 |
273 } // end of namespace ARM32 | 284 } // end of namespace ARM32 |
274 } // end of namespace Ice | 285 } // end of namespace Ice |
275 | 286 |
276 #endif // SUBZERO_SRC_ICEASSEMBLERARM32_H | 287 #endif // SUBZERO_SRC_ICEASSEMBLERARM32_H |
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