Fix ARM emit() methods to count instructions generated.

src/IceAssemblerARM32.h

 //===- subzero/src/IceAssemblerARM32.h - Assembler for ARM32 ----*- C++ -*-===//
 //
 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 //
 // Modified by the Subzero authors.
 //
 //===----------------------------------------------------------------------===//
 //
@@ skipping 119 matching lines @@
     if (!getPreliminary())
       this->bind(L);
   }
 
   bool fixupIsPCRel(FixupKind Kind) const override {
     (void)Kind;
     // TODO(kschimpf) Decide if we need this.
     return false;
   }
 
+  /// Used inside InstARM32::emitUsingTextFixup() to define the beginning of the
+  /// first assembly instruction to be emitted.
+  void startFirstInst() { TextInstCount = 1; }

[Jim Stichnoth, 2015/11/04 23:45:26]

Bikeshedding a bit.  It would be nice if the getter/setter/updater method names
more similar to the field name, for easier grepping and comprehension.

[Karl, 2015/11/05 16:18:40]

Done.

+
+  /// Used inside InstARM32::emit() methods to define the beginning of the next
+  /// assembly instruction being emitted.
+  void startNextInst() { ++TextInstCount; }
+
+  /// Returns the number of emitted instructions since the last call
+  /// to startFirstInst().
+  size_t getNumberEmittedInsts() const { return TextInstCount; }
+
   void bind(Label *label);
 
   // List of instructions implemented by integrated assembler.
 
   void adc(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1,
            bool SetFlags, CondARM32::Cond Cond);
 
   void add(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1,
            bool SetFlags, CondARM32::Cond Cond);
 
@@ skipping 39 matching lines @@
   void sub(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1,
            bool SetFlags, CondARM32::Cond Cond);
 
   void udiv(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1,
             CondARM32::Cond Cond);
 
   static bool classof(const Assembler *Asm) {
     return Asm->getKind() == Asm_ARM32;
   }
 
-  void emitTextInst(const std::string &Text, SizeT InstSize = sizeof(IValueT));
+  void emitTextInst(const std::string &Text, SizeT InstSize);
 
 private:
   // A vector of pool-allocated x86 labels for CFG nodes.
   using LabelVector = std::vector<Label *>;
   LabelVector CfgNodeLabels;
   // A vector of pool-allocated x86 labels for Local labels.
   LabelVector LocalLabels;
+  // Counter used to count number of instructions emitted inside
+  // InstARM32::emit() methods, when run inside InstARM32::emitUsingTextFixup().
+  size_t TextInstCount = 0;
 
   Label *getOrCreateLabel(SizeT Number, LabelVector &Labels);
 
   void bindCfgNodeLabel(const CfgNode *Node) override;
 
   void emitInst(IValueT Value) { Buffer.emit<IValueT>(Value); }
 
   // Pattern cccctttoooosnnnnddddiiiiiiiiiiii where cccc=Cond, ttt=Type,
   // oooo=Opcode, nnnn=Rn, dddd=Rd, iiiiiiiiiiii=imm12 (See ARM section A5.2.3).
   void emitType01(CondARM32::Cond Cond, IValueT Type, IValueT Opcode,
@@ skipping 29 matching lines @@
   IValueT encodeBranchOffset(IOffsetT Offset, IValueT Inst);
 
   // Returns the offset encoded in the branch instruction Inst.
   static IOffsetT decodeBranchOffset(IValueT Inst);
 };
 
 } // end of namespace ARM32
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICEASSEMBLERARM32_H