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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
6 // are met: | 6 // are met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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56 return ExternalReference(&CpuFeatures::supported_); | 56 return ExternalReference(&CpuFeatures::supported_); |
57 } | 57 } |
58 | 58 |
59 // Get the CPU features enabled by the build. For cross compilation the | 59 // Get the CPU features enabled by the build. For cross compilation the |
60 // preprocessor symbols CAN_USE_ARMV7_INSTRUCTIONS and CAN_USE_VFP3_INSTRUCTIONS | 60 // preprocessor symbols CAN_USE_ARMV7_INSTRUCTIONS and CAN_USE_VFP3_INSTRUCTIONS |
61 // can be defined to enable ARMv7 and VFPv3 instructions when building the | 61 // can be defined to enable ARMv7 and VFPv3 instructions when building the |
62 // snapshot. | 62 // snapshot. |
63 static unsigned CpuFeaturesImpliedByCompiler() { | 63 static unsigned CpuFeaturesImpliedByCompiler() { |
64 unsigned answer = 0; | 64 unsigned answer = 0; |
65 #ifdef CAN_USE_ARMV7_INSTRUCTIONS | 65 #ifdef CAN_USE_ARMV7_INSTRUCTIONS |
66 answer |= 1u << ARMv7; | 66 if (FLAG_enable_armv7) { |
67 answer |= 1u << ARMv7; | |
68 } | |
67 #endif // CAN_USE_ARMV7_INSTRUCTIONS | 69 #endif // CAN_USE_ARMV7_INSTRUCTIONS |
68 #ifdef CAN_USE_VFP3_INSTRUCTIONS | 70 #ifdef CAN_USE_VFP3_INSTRUCTIONS |
69 answer |= 1u << VFP3 | 1u << ARMv7; | 71 if (FLAG_enable_vfp3) { |
72 answer |= 1u << VFP3 | 1u << ARMv7; | |
73 } | |
70 #endif // CAN_USE_VFP3_INSTRUCTIONS | 74 #endif // CAN_USE_VFP3_INSTRUCTIONS |
71 #ifdef CAN_USE_VFP32DREGS | 75 #ifdef CAN_USE_VFP32DREGS |
72 answer |= 1u << VFP32DREGS; | 76 if (FLAG_enable_32dregs) { |
77 answer |= 1u << VFP32DREGS; | |
78 } | |
73 #endif // CAN_USE_VFP32DREGS | 79 #endif // CAN_USE_VFP32DREGS |
74 | 80 if ((answer & (1u << ARMv7)) && FLAG_enable_unaligned_accesses) { |
75 #ifdef __arm__ | |
76 // If the compiler is allowed to use VFP then we can use VFP too in our code | |
77 // generation even when generating snapshots. ARMv7 and hardware floating | |
78 // point support implies VFPv3, see ARM DDI 0406B, page A1-6. | |
79 #if defined(CAN_USE_ARMV7_INSTRUCTIONS) && defined(__VFP_FP__) \ | |
80 && !defined(__SOFTFP__) | |
81 answer |= 1u << VFP3 | 1u << ARMv7; | |
82 #endif // defined(CAN_USE_ARMV7_INSTRUCTIONS) && defined(__VFP_FP__) | |
83 // && !defined(__SOFTFP__) | |
84 #endif // _arm__ | |
85 if (answer & (1u << ARMv7)) { | |
86 answer |= 1u << UNALIGNED_ACCESSES; | 81 answer |= 1u << UNALIGNED_ACCESSES; |
87 } | 82 } |
88 | 83 |
89 return answer; | 84 return answer; |
90 } | 85 } |
91 | 86 |
92 | 87 |
93 const char* DwVfpRegister::AllocationIndexToString(int index) { | 88 const char* DwVfpRegister::AllocationIndexToString(int index) { |
94 ASSERT(index >= 0 && index < NumAllocatableRegisters()); | 89 ASSERT(index >= 0 && index < NumAllocatableRegisters()); |
95 ASSERT(kScratchDoubleReg.code() - kDoubleRegZero.code() == | 90 ASSERT(kScratchDoubleReg.code() - kDoubleRegZero.code() == |
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109 initialized_ = true; | 104 initialized_ = true; |
110 #endif | 105 #endif |
111 | 106 |
112 // Get the features implied by the OS and the compiler settings. This is the | 107 // Get the features implied by the OS and the compiler settings. This is the |
113 // minimal set of features which is also alowed for generated code in the | 108 // minimal set of features which is also alowed for generated code in the |
114 // snapshot. | 109 // snapshot. |
115 supported_ |= standard_features; | 110 supported_ |= standard_features; |
116 | 111 |
117 if (Serializer::enabled()) { | 112 if (Serializer::enabled()) { |
118 // No probing for features if we might serialize (generate snapshot). | 113 // No probing for features if we might serialize (generate snapshot). |
114 printf(" "); | |
115 PrintFeatures(); | |
ulan
2013/04/16 10:12:18
Debug print?
Rodolph Perfetta
2013/04/16 10:49:35
I find it useful to see these info printed when I
ulan
2013/04/16 14:20:50
I see. I don't mind printing it.
| |
119 return; | 116 return; |
120 } | 117 } |
121 | 118 |
122 #ifndef __arm__ | 119 #ifndef __arm__ |
123 // For the simulator=arm build, use VFP when FLAG_enable_vfp3 is | 120 // For the simulator=arm build, use VFP when FLAG_enable_vfp3 is |
124 // enabled. VFPv3 implies ARMv7, see ARM DDI 0406B, page A1-6. | 121 // enabled. VFPv3 implies ARMv7, see ARM DDI 0406B, page A1-6. |
125 if (FLAG_enable_vfp3) { | 122 if (FLAG_enable_vfp3) { |
126 supported_ |= | 123 supported_ |= |
127 static_cast<uint64_t>(1) << VFP3 | | 124 static_cast<uint64_t>(1) << VFP3 | |
128 static_cast<uint64_t>(1) << ARMv7; | 125 static_cast<uint64_t>(1) << ARMv7; |
129 } | 126 } |
130 // For the simulator=arm build, use ARMv7 when FLAG_enable_armv7 is enabled | 127 // For the simulator=arm build, use ARMv7 when FLAG_enable_armv7 is enabled |
131 if (FLAG_enable_armv7) { | 128 if (FLAG_enable_armv7) { |
132 supported_ |= static_cast<uint64_t>(1) << ARMv7; | 129 supported_ |= static_cast<uint64_t>(1) << ARMv7; |
133 } | 130 } |
134 | 131 |
135 if (FLAG_enable_sudiv) { | 132 if (FLAG_enable_sudiv) { |
136 supported_ |= static_cast<uint64_t>(1) << SUDIV; | 133 supported_ |= static_cast<uint64_t>(1) << SUDIV; |
137 } | 134 } |
138 | 135 |
139 if (FLAG_enable_movw_movt) { | 136 if (FLAG_enable_movw_movt) { |
140 supported_ |= static_cast<uint64_t>(1) << MOVW_MOVT_IMMEDIATE_LOADS; | 137 supported_ |= static_cast<uint64_t>(1) << MOVW_MOVT_IMMEDIATE_LOADS; |
141 } | 138 } |
142 | 139 |
143 if (FLAG_enable_32dregs) { | 140 if (FLAG_enable_32dregs) { |
144 supported_ |= static_cast<uint64_t>(1) << VFP32DREGS; | 141 supported_ |= static_cast<uint64_t>(1) << VFP32DREGS; |
145 } | 142 } |
146 | 143 |
144 if (FLAG_enable_unaligned_accesses) { | |
145 supported_ |= static_cast<uint64_t>(1) << UNALIGNED_ACCESSES; | |
146 } | |
147 | |
147 #else // __arm__ | 148 #else // __arm__ |
148 // Probe for additional features not already known to be available. | 149 // Probe for additional features not already known to be available. |
149 if (!IsSupported(VFP3) && OS::ArmCpuHasFeature(VFP3)) { | 150 if (!IsSupported(VFP3) && FLAG_enable_vfp3 && OS::ArmCpuHasFeature(VFP3)) { |
150 // This implementation also sets the VFP flags if runtime | 151 // This implementation also sets the VFP flags if runtime |
151 // detection of VFP returns true. VFPv3 implies ARMv7, see ARM DDI | 152 // detection of VFP returns true. VFPv3 implies ARMv7, see ARM DDI |
152 // 0406B, page A1-6. | 153 // 0406B, page A1-6. |
153 found_by_runtime_probing_only_ |= | 154 found_by_runtime_probing_only_ |= |
154 static_cast<uint64_t>(1) << VFP3 | | 155 static_cast<uint64_t>(1) << VFP3 | |
155 static_cast<uint64_t>(1) << ARMv7; | 156 static_cast<uint64_t>(1) << ARMv7; |
156 } | 157 } |
157 | 158 |
158 if (!IsSupported(ARMv7) && OS::ArmCpuHasFeature(ARMv7)) { | 159 if (!IsSupported(ARMv7) && FLAG_enable_armv7 && OS::ArmCpuHasFeature(ARMv7)) { |
159 found_by_runtime_probing_only_ |= static_cast<uint64_t>(1) << ARMv7; | 160 found_by_runtime_probing_only_ |= static_cast<uint64_t>(1) << ARMv7; |
160 } | 161 } |
161 | 162 |
162 if (!IsSupported(SUDIV) && OS::ArmCpuHasFeature(SUDIV)) { | 163 if (!IsSupported(SUDIV) && FLAG_enable_sudiv && OS::ArmCpuHasFeature(SUDIV)) { |
163 found_by_runtime_probing_only_ |= static_cast<uint64_t>(1) << SUDIV; | 164 found_by_runtime_probing_only_ |= static_cast<uint64_t>(1) << SUDIV; |
164 } | 165 } |
165 | 166 |
166 if (!IsSupported(UNALIGNED_ACCESSES) && OS::ArmCpuHasFeature(ARMv7)) { | 167 if (!IsSupported(UNALIGNED_ACCESSES) && FLAG_enable_unaligned_accesses |
168 && OS::ArmCpuHasFeature(ARMv7)) { | |
167 found_by_runtime_probing_only_ |= | 169 found_by_runtime_probing_only_ |= |
168 static_cast<uint64_t>(1) << UNALIGNED_ACCESSES; | 170 static_cast<uint64_t>(1) << UNALIGNED_ACCESSES; |
169 } | 171 } |
170 | 172 |
171 if (OS::GetCpuImplementer() == QUALCOMM_IMPLEMENTER && | 173 if (OS::GetCpuImplementer() == QUALCOMM_IMPLEMENTER && |
172 OS::ArmCpuHasFeature(ARMv7)) { | 174 FLAG_enable_movw_movt && OS::ArmCpuHasFeature(ARMv7)) { |
173 found_by_runtime_probing_only_ |= | 175 found_by_runtime_probing_only_ |= |
174 static_cast<uint64_t>(1) << MOVW_MOVT_IMMEDIATE_LOADS; | 176 static_cast<uint64_t>(1) << MOVW_MOVT_IMMEDIATE_LOADS; |
175 } | 177 } |
176 | 178 |
177 if (!IsSupported(VFP32DREGS) && OS::ArmCpuHasFeature(VFP32DREGS)) { | 179 if (!IsSupported(VFP32DREGS) && FLAG_enable_32dregs |
180 && OS::ArmCpuHasFeature(VFP32DREGS)) { | |
178 found_by_runtime_probing_only_ |= static_cast<uint64_t>(1) << VFP32DREGS; | 181 found_by_runtime_probing_only_ |= static_cast<uint64_t>(1) << VFP32DREGS; |
179 } | 182 } |
180 | 183 |
181 supported_ |= found_by_runtime_probing_only_; | 184 supported_ |= found_by_runtime_probing_only_; |
182 #endif | 185 #endif |
183 | 186 |
184 // Assert that VFP3 implies ARMv7. | 187 // Assert that VFP3 implies ARMv7. |
185 ASSERT(!IsSupported(VFP3) || IsSupported(ARMv7)); | 188 ASSERT(!IsSupported(VFP3) || IsSupported(ARMv7)); |
186 } | 189 } |
187 | 190 |
188 | 191 |
192 void CpuFeatures::PrintTarget() { | |
193 const char* arm_arch = NULL; | |
194 const char* arm_test = ""; | |
195 const char* arm_fpu = ""; | |
196 const char* arm_thumb = ""; | |
197 const char* arm_float_abi = NULL; | |
198 | |
199 #if defined CAN_USE_ARMV7_INSTRUCTIONS | |
200 arm_arch = "arm v7"; | |
201 #else | |
202 arm_arch = "arm v6"; | |
203 #endif | |
204 | |
205 #ifdef __arm__ | |
206 | |
207 # ifdef ARM_TEST | |
208 arm_test = " test"; | |
209 # endif | |
210 # if defined __ARM_NEON__ | |
211 arm_fpu = " neon"; | |
212 # elif defined __VFP_FP__ | |
213 # if defined CAN_USE_ARMV7_INSTRUCTIONS | |
ulan
2013/04/16 10:12:18
Shouldn't it be CAN_USE_VFP3_INSTRUCTIONS?
Rodolph Perfetta
2013/04/16 10:49:35
Done.
| |
214 arm_fpu = " vfp3"; | |
215 # else | |
216 arm_fpu = " vfp2"; | |
217 # endif | |
218 # endif | |
219 # if (defined __thumb__) || (defined __thumb2__) | |
220 arm_thumb = " thumb"; | |
221 # endif | |
222 arm_float_abi = OS::ArmUsingHardFloat() ? "hard" : "softfp"; | |
223 | |
224 #else // __arm__ | |
225 | |
226 arm_test = " simulator"; | |
227 # if defined CAN_USE_VFP3_INSTRUCTIONS | |
228 # if defined CAN_USE_VFP32DREGS | |
229 arm_fpu = " vfp3"; | |
230 # else | |
231 arm_fpu = " vfp3-d16"; | |
232 # endif | |
233 # else | |
234 arm_fpu = " vfp2"; | |
235 # endif | |
236 # if USE_EABI_HARDFLOAT == 1 | |
237 arm_float_abi = "hard"; | |
238 # else | |
239 arm_float_abi = "softfp"; | |
240 # endif | |
241 | |
242 #endif // __arm__ | |
243 | |
244 printf("target%s %s%s%s %s\n", | |
245 arm_test, arm_arch, arm_fpu, arm_thumb, arm_float_abi); | |
246 } | |
247 | |
248 | |
249 void CpuFeatures::PrintFeatures() { | |
250 printf( | |
251 "ARMv7=%d VFP3=%d VFP32DREGS=%d SUDIV=%d UNALIGNED_ACCESSES=%d " | |
252 "MOVW_MOVT_IMMEDIATE_LOADS=%d", | |
253 CpuFeatures::IsSupported(ARMv7), | |
254 CpuFeatures::IsSupported(VFP3), | |
255 CpuFeatures::IsSupported(VFP32DREGS), | |
256 CpuFeatures::IsSupported(SUDIV), | |
257 CpuFeatures::IsSupported(UNALIGNED_ACCESSES), | |
258 CpuFeatures::IsSupported(MOVW_MOVT_IMMEDIATE_LOADS)); | |
259 #ifdef __arm__ | |
260 printf(" USE_EABI_HARDFLOAT=%d\n", OS::ArmUsingHardFloat()); | |
261 #else | |
262 printf(" USE_EABI_HARDFLOAT=%d\n", USE_EABI_HARDFLOAT); | |
263 #endif | |
264 } | |
265 | |
266 | |
189 // ----------------------------------------------------------------------------- | 267 // ----------------------------------------------------------------------------- |
190 // Implementation of RelocInfo | 268 // Implementation of RelocInfo |
191 | 269 |
192 const int RelocInfo::kApplyMask = 0; | 270 const int RelocInfo::kApplyMask = 0; |
193 | 271 |
194 | 272 |
195 bool RelocInfo::IsCodedSpecially() { | 273 bool RelocInfo::IsCodedSpecially() { |
196 // The deserializer needs to know whether a pointer is specially coded. Being | 274 // The deserializer needs to know whether a pointer is specially coded. Being |
197 // specially coded on ARM means that it is a movw/movt instruction. We don't | 275 // specially coded on ARM means that it is a movw/movt instruction. We don't |
198 // generate those yet. | 276 // generate those yet. |
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3004 | 3082 |
3005 // Since a constant pool was just emitted, move the check offset forward by | 3083 // Since a constant pool was just emitted, move the check offset forward by |
3006 // the standard interval. | 3084 // the standard interval. |
3007 next_buffer_check_ = pc_offset() + kCheckPoolInterval; | 3085 next_buffer_check_ = pc_offset() + kCheckPoolInterval; |
3008 } | 3086 } |
3009 | 3087 |
3010 | 3088 |
3011 } } // namespace v8::internal | 3089 } } // namespace v8::internal |
3012 | 3090 |
3013 #endif // V8_TARGET_ARCH_ARM | 3091 #endif // V8_TARGET_ARCH_ARM |
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