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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file | 3 // found in the LICENSE file |
4 | 4 |
5 #include "test/unittests/compiler/instruction-selector-unittest.h" | 5 #include "test/unittests/compiler/instruction-selector-unittest.h" |
6 | 6 |
7 namespace v8 { | 7 namespace v8 { |
8 namespace internal { | 8 namespace internal { |
9 namespace compiler { | 9 namespace compiler { |
10 | 10 |
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639 Stream s = m.Build(); | 639 Stream s = m.Build(); |
640 ASSERT_EQ(1U, s.size()); | 640 ASSERT_EQ(1U, s.size()); |
641 EXPECT_EQ(memacc.load_opcode, s[0]->arch_opcode()); | 641 EXPECT_EQ(memacc.load_opcode, s[0]->arch_opcode()); |
642 EXPECT_EQ(kMode_MRI, s[0]->addressing_mode()); | 642 EXPECT_EQ(kMode_MRI, s[0]->addressing_mode()); |
643 } | 643 } |
644 | 644 |
645 | 645 |
646 TEST_P(InstructionSelectorMemoryAccessTest, StoreWithParameters) { | 646 TEST_P(InstructionSelectorMemoryAccessTest, StoreWithParameters) { |
647 const MemoryAccess memacc = GetParam(); | 647 const MemoryAccess memacc = GetParam(); |
648 StreamBuilder m(this, kMachInt32, kMachPtr, kMachInt32, memacc.type); | 648 StreamBuilder m(this, kMachInt32, kMachPtr, kMachInt32, memacc.type); |
649 StoreRepresentation store_rep(memacc.type, kNoWriteBarrier); | 649 m.Store(memacc.type, m.Parameter(0), m.Parameter(1), kNoWriteBarrier); |
650 m.Store(store_rep, m.Parameter(0), m.Parameter(1)); | |
651 m.Return(m.Int32Constant(0)); | 650 m.Return(m.Int32Constant(0)); |
652 Stream s = m.Build(); | 651 Stream s = m.Build(); |
653 ASSERT_EQ(1U, s.size()); | 652 ASSERT_EQ(1U, s.size()); |
654 EXPECT_EQ(memacc.store_opcode, s[0]->arch_opcode()); | 653 EXPECT_EQ(memacc.store_opcode, s[0]->arch_opcode()); |
655 EXPECT_EQ(kMode_MRI, s[0]->addressing_mode()); | 654 EXPECT_EQ(kMode_MRI, s[0]->addressing_mode()); |
656 } | 655 } |
657 | 656 |
658 | 657 |
659 INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, | 658 INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, |
660 InstructionSelectorMemoryAccessTest, | 659 InstructionSelectorMemoryAccessTest, |
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690 | 689 |
691 // ---------------------------------------------------------------------------- | 690 // ---------------------------------------------------------------------------- |
692 // Store immediate. | 691 // Store immediate. |
693 // ---------------------------------------------------------------------------- | 692 // ---------------------------------------------------------------------------- |
694 | 693 |
695 | 694 |
696 TEST_P(InstructionSelectorMemoryAccessImmTest, StoreWithImmediateIndex) { | 695 TEST_P(InstructionSelectorMemoryAccessImmTest, StoreWithImmediateIndex) { |
697 const MemoryAccessImm memacc = GetParam(); | 696 const MemoryAccessImm memacc = GetParam(); |
698 TRACED_FOREACH(int32_t, index, memacc.immediates) { | 697 TRACED_FOREACH(int32_t, index, memacc.immediates) { |
699 StreamBuilder m(this, kMachInt32, kMachPtr, memacc.type); | 698 StreamBuilder m(this, kMachInt32, kMachPtr, memacc.type); |
700 StoreRepresentation store_rep(memacc.type, kNoWriteBarrier); | 699 m.Store(memacc.type, m.Parameter(0), m.Int32Constant(index), m.Parameter(1), |
701 m.Store(store_rep, m.Parameter(0), m.Int32Constant(index), m.Parameter(1)); | 700 kNoWriteBarrier); |
702 m.Return(m.Int32Constant(0)); | 701 m.Return(m.Int32Constant(0)); |
703 Stream s = m.Build(); | 702 Stream s = m.Build(); |
704 ASSERT_EQ(1U, s.size()); | 703 ASSERT_EQ(1U, s.size()); |
705 EXPECT_EQ(memacc.store_opcode, s[0]->arch_opcode()); | 704 EXPECT_EQ(memacc.store_opcode, s[0]->arch_opcode()); |
706 EXPECT_EQ(kMode_MRI, s[0]->addressing_mode()); | 705 EXPECT_EQ(kMode_MRI, s[0]->addressing_mode()); |
707 ASSERT_EQ(3U, s[0]->InputCount()); | 706 ASSERT_EQ(3U, s[0]->InputCount()); |
708 ASSERT_EQ(InstructionOperand::IMMEDIATE, s[0]->InputAt(1)->kind()); | 707 ASSERT_EQ(InstructionOperand::IMMEDIATE, s[0]->InputAt(1)->kind()); |
709 EXPECT_EQ(index, s.ToInt32(s[0]->InputAt(1))); | 708 EXPECT_EQ(index, s.ToInt32(s[0]->InputAt(1))); |
710 EXPECT_EQ(0U, s[0]->OutputCount()); | 709 EXPECT_EQ(0U, s[0]->OutputCount()); |
711 } | 710 } |
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742 EXPECT_EQ(1U, s[0]->OutputCount()); | 741 EXPECT_EQ(1U, s[0]->OutputCount()); |
743 } | 742 } |
744 } | 743 } |
745 | 744 |
746 | 745 |
747 TEST_P(InstructionSelectorMemoryAccessImmMoreThan16bitTest, | 746 TEST_P(InstructionSelectorMemoryAccessImmMoreThan16bitTest, |
748 StoreWithImmediateIndex) { | 747 StoreWithImmediateIndex) { |
749 const MemoryAccessImm1 memacc = GetParam(); | 748 const MemoryAccessImm1 memacc = GetParam(); |
750 TRACED_FOREACH(int32_t, index, memacc.immediates) { | 749 TRACED_FOREACH(int32_t, index, memacc.immediates) { |
751 StreamBuilder m(this, kMachInt32, kMachPtr, memacc.type); | 750 StreamBuilder m(this, kMachInt32, kMachPtr, memacc.type); |
752 StoreRepresentation store_rep(memacc.type, kNoWriteBarrier); | 751 m.Store(memacc.type, m.Parameter(0), m.Int32Constant(index), m.Parameter(1), |
753 m.Store(store_rep, m.Parameter(0), m.Int32Constant(index), m.Parameter(1)); | 752 kNoWriteBarrier); |
754 m.Return(m.Int32Constant(0)); | 753 m.Return(m.Int32Constant(0)); |
755 Stream s = m.Build(); | 754 Stream s = m.Build(); |
756 ASSERT_EQ(2U, s.size()); | 755 ASSERT_EQ(2U, s.size()); |
757 // kMipsAdd is expected opcode | 756 // kMipsAdd is expected opcode |
758 // size more than 16 bits wide | 757 // size more than 16 bits wide |
759 EXPECT_EQ(kMipsAdd, s[0]->arch_opcode()); | 758 EXPECT_EQ(kMipsAdd, s[0]->arch_opcode()); |
760 EXPECT_EQ(kMode_None, s[0]->addressing_mode()); | 759 EXPECT_EQ(kMode_None, s[0]->addressing_mode()); |
761 EXPECT_EQ(2U, s[0]->InputCount()); | 760 EXPECT_EQ(2U, s[0]->InputCount()); |
762 EXPECT_EQ(1U, s[0]->OutputCount()); | 761 EXPECT_EQ(1U, s[0]->OutputCount()); |
763 } | 762 } |
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842 EXPECT_EQ(kMipsAbsD, s[0]->arch_opcode()); | 841 EXPECT_EQ(kMipsAbsD, s[0]->arch_opcode()); |
843 ASSERT_EQ(1U, s[0]->InputCount()); | 842 ASSERT_EQ(1U, s[0]->InputCount()); |
844 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0))); | 843 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0))); |
845 ASSERT_EQ(1U, s[0]->OutputCount()); | 844 ASSERT_EQ(1U, s[0]->OutputCount()); |
846 EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output())); | 845 EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output())); |
847 } | 846 } |
848 | 847 |
849 } // namespace compiler | 848 } // namespace compiler |
850 } // namespace internal | 849 } // namespace internal |
851 } // namespace v8 | 850 } // namespace v8 |
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