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| 1 //===- subzero/src/IceInstARM32.h - ARM32 machine instructions --*- C++ -*-===// | 1 //===- subzero/src/IceInstARM32.h - ARM32 machine instructions --*- C++ -*-===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 /// | 9 /// |
| 10 /// \file | 10 /// \file |
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| 327 Vadd, | 327 Vadd, |
| 328 Vcmp, | 328 Vcmp, |
| 329 Vcvt, | 329 Vcvt, |
| 330 Vdiv, | 330 Vdiv, |
| 331 Vmrs, | 331 Vmrs, |
| 332 Vmul, | 332 Vmul, |
| 333 Vsqrt, | 333 Vsqrt, |
| 334 Vsub | 334 Vsub |
| 335 }; | 335 }; |
| 336 | 336 |
| 337 bool isIasSafe(InstKind Kind) const { |
| 338 return !BuildDefs::checkIasmSafe() || isIasSafeImpl(Kind); |
| 339 } |
| 340 |
| 337 static const char *getWidthString(Type Ty); | 341 static const char *getWidthString(Type Ty); |
| 338 static const char *getVecWidthString(Type Ty); | 342 static const char *getVecWidthString(Type Ty); |
| 339 static CondARM32::Cond getOppositeCondition(CondARM32::Cond Cond); | 343 static CondARM32::Cond getOppositeCondition(CondARM32::Cond Cond); |
| 340 | 344 |
| 341 /// Shared emit routines for common forms of instructions. | 345 /// Shared emit routines for common forms of instructions. |
| 342 static void emitThreeAddrFP(const char *Opcode, const InstARM32 *Inst, | 346 static void emitThreeAddrFP(const char *Opcode, const InstARM32 *Inst, |
| 343 const Cfg *Func); | 347 const Cfg *Func); |
| 344 | 348 |
| 345 void dump(const Cfg *Func) const override; | 349 void dump(const Cfg *Func) const override; |
| 346 | 350 |
| 347 void emitIAS(const Cfg *Func) const override; | 351 void emitIAS(const Cfg *Func) const override; |
| 348 | 352 |
| 349 protected: | 353 protected: |
| 350 InstARM32(Cfg *Func, InstKindARM32 Kind, SizeT Maxsrcs, Variable *Dest) | 354 InstARM32(Cfg *Func, InstKindARM32 Kind, SizeT Maxsrcs, Variable *Dest) |
| 351 : InstTarget(Func, static_cast<InstKind>(Kind), Maxsrcs, Dest) {} | 355 : InstTarget(Func, static_cast<InstKind>(Kind), Maxsrcs, Dest) {} |
| 352 | 356 |
| 353 static bool isClassof(const Inst *Inst, InstKindARM32 MyKind) { | 357 static bool isClassof(const Inst *Inst, InstKindARM32 MyKind) { |
| 354 return Inst->getKind() == static_cast<InstKind>(MyKind); | 358 return Inst->getKind() == static_cast<InstKind>(MyKind); |
| 355 } | 359 } |
| 356 | 360 |
| 361 // Returns true if ARM instruction of Kind is in safe list for |
| 362 // the integrated assembler. |
| 363 bool isIasSafeImpl(InstKind Kind) const; |
| 364 |
| 357 // Generates text of assembly instruction using method emit(), and then adds | 365 // Generates text of assembly instruction using method emit(), and then adds |
| 358 // to the assembly buffer as a Fixup. | 366 // to the assembly buffer as a Fixup. |
| 359 void emitUsingTextFixup(const Cfg *Func) const; | 367 void emitUsingTextFixup(const Cfg *Func) const; |
| 360 }; | 368 }; |
| 361 | 369 |
| 362 /// A predicable ARM instruction. | 370 /// A predicable ARM instruction. |
| 363 class InstARM32Pred : public InstARM32 { | 371 class InstARM32Pred : public InstARM32 { |
| 364 InstARM32Pred() = delete; | 372 InstARM32Pred() = delete; |
| 365 InstARM32Pred(const InstARM32Pred &) = delete; | 373 InstARM32Pred(const InstARM32Pred &) = delete; |
| 366 InstARM32Pred &operator=(const InstARM32Pred &) = delete; | 374 InstARM32Pred &operator=(const InstARM32Pred &) = delete; |
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| 1233 // default implementations. Without this, there is the possibility of ODR | 1241 // default implementations. Without this, there is the possibility of ODR |
| 1234 // violations and link errors. | 1242 // violations and link errors. |
| 1235 | 1243 |
| 1236 template <> void InstARM32Ldr::emit(const Cfg *Func) const; | 1244 template <> void InstARM32Ldr::emit(const Cfg *Func) const; |
| 1237 template <> void InstARM32Movw::emit(const Cfg *Func) const; | 1245 template <> void InstARM32Movw::emit(const Cfg *Func) const; |
| 1238 template <> void InstARM32Movt::emit(const Cfg *Func) const; | 1246 template <> void InstARM32Movt::emit(const Cfg *Func) const; |
| 1239 | 1247 |
| 1240 } // end of namespace Ice | 1248 } // end of namespace Ice |
| 1241 | 1249 |
| 1242 #endif // SUBZERO_SRC_ICEINSTARM32_H | 1250 #endif // SUBZERO_SRC_ICEINSTARM32_H |
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