Subzero. ARM32. Implements the Availability Optimization.

tests_lit/llvm2ice_tests/callindirect.pnacl.ll

 ; Test of multiple indirect calls to the same target.  Each call
 ; should be to the same operand, whether it's in a register or on the
 ; stack.
 
 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
 ; RUN:   --target x8632 -i %s --args -O2 \
 ; RUN:   | %if --need=target_X8632 --command FileCheck %s
 ; RUN: %if --need=allow_dump --need=target_X8632 --command %p2i --filetype=asm \
 ; RUN:     --assemble --disassemble -i %s --args -O2 \
 ; RUN:   | %if --need=allow_dump --need=target_X8632 --command FileCheck %s
@@ skipping 73 matching lines @@
 ; CHECK: call [[REGISTER]]
 ; CHECK: call [[REGISTER]]
 ;
 ; OPTM1-LABEL: CallIndirectGlobal
 ; OPTM1: call [[TARGET:.+]]
 ; OPTM1: call [[TARGET]]
 ; OPTM1: call [[TARGET]]
 ; OPTM1: call [[TARGET]]
 ;
 ; ARM32-LABEL: CallIndirectGlobal
-; ARM32: blx [[REGISTER:r.*]]
-; ARM32: blx [[REGISTER]]
+; ARM32: blx {{r.*}}
+; ARM32: blx [[REGISTER:r[0-9]*]]
 ; ARM32: blx [[REGISTER]]
 ; ARM32: blx [[REGISTER]]
 
 ; Calling an absolute address is used for non-IRT PNaCl pexes to directly
 ; access syscall trampolines. This is not really an indirect call, but
 ; there is a cast from int to pointer first.
 define internal void @CallConst() {
 entry:
   %__1 = inttoptr i32 66496 to void ()*
   call void %__1()
@@ skipping 13 matching lines @@
 ; OPTM1: e8 bc 03 01 00 call {{[0-9a-f]+}} {{.*}} R_386_PC32 *ABS*
 ;
 ; ARM32-LABEL: CallConst
 ; ARM32: movw [[REGISTER:r.*]], #960
 ; ARM32: movt [[REGISTER]], #1
 ; ARM32: blx [[REGISTER]]
 ; The legalization of the constant could be shared, but it isn't.
 ; ARM32: movw [[REGISTER:r.*]], #960
 ; ARM32: blx [[REGISTER]]
 ; ARM32: blx [[REGISTER]]