Handle MOV (immediate) and MOVT to load ARM global addresses.

src/IceInstARM32.cpp

 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 779 matching lines @@
 
 void InstARM32Call::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 1);
   if (llvm::isa<ConstantInteger32>(getCallTarget())) {
     // This shouldn't happen (typically have to copy the full 32-bits to a
     // register and do an indirect jump).
     llvm::report_fatal_error("ARM32Call to ConstantInteger32");
-  } else if (const auto CallTarget =
+  } else if (const auto *CallTarget =
                  llvm::dyn_cast<ConstantRelocatable>(getCallTarget())) {
     // Calls only have 24-bits, but the linker should insert veneers to extend
     // the range if needed.
     Str << "\t"
         << "bl"
         << "\t";
     CallTarget->emitWithoutPrefix(Func->getTarget());
   } else {
     Str << "\t"
         << "blx"
@@ skipping 71 matching lines @@
   getDest()->emit(Func);
   Str << ", ";
   getSrc(0)->emit(Func);
 }
 
 template <InstARM32::InstKindARM32 K>
 void InstARM32TwoAddrGPR<K>::emitIAS(const Cfg *Func) const {
   emitUsingTextFixup(Func);
 }
 
+template <InstARM32::InstKindARM32 K, bool Nws>
+void InstARM32UnaryopGPR<K, Nws>::emitIAS(const Cfg *Func) const {
+  emitUsingTextFixup(Func);
+}
+
 template <> void InstARM32Movw::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 1);
   Str << "\t" << Opcode << getPredicate() << "\t";
   getDest()->emit(Func);
   Str << ", ";
   Constant *Src0 = llvm::cast<Constant>(getSrc(0));
   if (auto *CR = llvm::dyn_cast<ConstantRelocatable>(Src0)) {
     Str << "#:lower16:";
     CR->emitWithoutPrefix(Func->getTarget());
   } else {
     Src0->emit(Func);
   }
 }
 
+template <> void InstARM32Movw::emitIAS(const Cfg *Func) const {
+  assert(getSrcSize() == 1);
+  ARM32::AssemblerARM32 *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
+  Asm->movw(getDest(), getSrc(0), getPredicate());
+  if (Asm->needsTextFixup())
+    emitUsingTextFixup(Func);
+}
+
 template <> void InstARM32Movt::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
   Variable *Dest = getDest();
   Constant *Src1 = llvm::cast<Constant>(getSrc(1));
   Str << "\t" << Opcode << getPredicate() << "\t";
   Dest->emit(Func);
   Str << ", ";
   if (auto *CR = llvm::dyn_cast<ConstantRelocatable>(Src1)) {
     Str << "#:upper16:";
     CR->emitWithoutPrefix(Func->getTarget());
   } else {
     Src1->emit(Func);
   }
 }
 
+template <> void InstARM32Movt::emitIAS(const Cfg *Func) const {
+  assert(getSrcSize() == 2);
+  ARM32::AssemblerARM32 *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
+  Asm->movt(getDest(), getSrc(1), getPredicate());
+  if (Asm->needsTextFixup())
+    emitUsingTextFixup(Func);
+}
+
 void InstARM32Pop::emit(const Cfg *Func) const {
   // TODO(jpp): Improve FP register save/restore.
   if (!BuildDefs::dump())
     return;
   SizeT IntegerCount = 0;
   for (const Operand *Op : Dests) {
     if (isScalarIntegerType(Op->getType())) {
       ++IntegerCount;
     }
   }
@@ skipping 518 matching lines @@
 template class InstARM32ThreeAddrGPR<InstARM32::Sub>;
 template class InstARM32ThreeAddrGPR<InstARM32::Udiv>;
 
 template class InstARM32ThreeAddrFP<InstARM32::Vadd>;
 template class InstARM32ThreeAddrFP<InstARM32::Vdiv>;
 template class InstARM32ThreeAddrFP<InstARM32::Vmul>;
 template class InstARM32ThreeAddrFP<InstARM32::Vsub>;
 
 template class InstARM32TwoAddrGPR<InstARM32::Movt>;
 
+template class InstARM32UnaryopGPR<InstARM32::Movw, false>;
+template class InstARM32UnaryopGPR<InstARM32::Clz, false>;
+template class InstARM32UnaryopGPR<InstARM32::Mvn, false>;
+template class InstARM32UnaryopGPR<InstARM32::Rbit, false>;
+template class InstARM32UnaryopGPR<InstARM32::Rev, false>;
+template class InstARM32UnaryopGPR<InstARM32::Sxt, true>;
+template class InstARM32UnaryopGPR<InstARM32::Uxt, true>;
+template class InstARM32UnaryopFP<InstARM32::Vsqrt>;
+
 } // end of namespace Ice