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Side by Side Diff: src/DartARM32/assembler_arm.cc

Issue 1424863005: Handle MOV (immediate) and MOVT to load ARM global addresses. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Fix movw and movt Created 5 years, 1 month ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 // 4 //
5 // This is forked from Dart revision df52deea9f25690eb8b66c5995da92b70f7ac1fe 5 // This is forked from Dart revision df52deea9f25690eb8b66c5995da92b70f7ac1fe
6 // Please update the (git) revision if we merge changes from Dart. 6 // Please update the (git) revision if we merge changes from Dart.
7 // https://code.google.com/p/dart/wiki/GettingTheSource 7 // https://code.google.com/p/dart/wiki/GettingTheSource
8 8
9 #include "vm/globals.h" // NOLINT 9 #include "vm/globals.h" // NOLINT
10 #if defined(TARGET_ARCH_ARM) 10 #if defined(TARGET_ARCH_ARM)
(...skipping 312 matching lines...) Expand 10 before | Expand all | Expand 10 after
323 ASSERT(rd != PC); 323 ASSERT(rd != PC);
324 ASSERT(rm != PC); 324 ASSERT(rm != PC);
325 int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | 325 int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) |
326 B24 | B22 | B21 | (0xf << 16) | 326 B24 | B22 | B21 | (0xf << 16) |
327 (static_cast<int32_t>(rd) << kRdShift) | 327 (static_cast<int32_t>(rd) << kRdShift) |
328 (0xf << 8) | B4 | static_cast<int32_t>(rm); 328 (0xf << 8) | B4 | static_cast<int32_t>(rm);
329 Emit(encoding); 329 Emit(encoding);
330 } 330 }
331 331
332 332
333 #if
334 // Moved to ARM::AssemblerARM32::movw
333 void Assembler::movw(Register rd, uint16_t imm16, Condition cond) { 335 void Assembler::movw(Register rd, uint16_t imm16, Condition cond) {
334 ASSERT(cond != kNoCondition); 336 ASSERT(cond != kNoCondition);
335 int32_t encoding = static_cast<int32_t>(cond) << kConditionShift | 337 int32_t encoding = static_cast<int32_t>(cond) << kConditionShift |
336 B25 | B24 | ((imm16 >> 12) << 16) | 338 B25 | B24 | ((imm16 >> 12) << 16) |
337 static_cast<int32_t>(rd) << kRdShift | (imm16 & 0xfff); 339 static_cast<int32_t>(rd) << kRdShift | (imm16 & 0xfff);
338 Emit(encoding); 340 Emit(encoding);
339 } 341 }
340 342
341 343
344 // Moved to ARM::AssemblerARM32::movt
342 void Assembler::movt(Register rd, uint16_t imm16, Condition cond) { 345 void Assembler::movt(Register rd, uint16_t imm16, Condition cond) {
343 ASSERT(cond != kNoCondition); 346 ASSERT(cond != kNoCondition);
344 int32_t encoding = static_cast<int32_t>(cond) << kConditionShift | 347 int32_t encoding = static_cast<int32_t>(cond) << kConditionShift |
345 B25 | B24 | B22 | ((imm16 >> 12) << 16) | 348 B25 | B24 | B22 | ((imm16 >> 12) << 16) |
346 static_cast<int32_t>(rd) << kRdShift | (imm16 & 0xfff); 349 static_cast<int32_t>(rd) << kRdShift | (imm16 & 0xfff);
347 Emit(encoding); 350 Emit(encoding);
348 } 351 }
352 #endif
349 353
350 354
351 void Assembler::EmitMulOp(Condition cond, int32_t opcode, 355 void Assembler::EmitMulOp(Condition cond, int32_t opcode,
352 Register rd, Register rn, 356 Register rd, Register rn,
353 Register rm, Register rs) { 357 Register rm, Register rs) {
354 ASSERT(rd != kNoRegister); 358 ASSERT(rd != kNoRegister);
355 ASSERT(rn != kNoRegister); 359 ASSERT(rn != kNoRegister);
356 ASSERT(rm != kNoRegister); 360 ASSERT(rm != kNoRegister);
357 ASSERT(rs != kNoRegister); 361 ASSERT(rs != kNoRegister);
358 ASSERT(cond != kNoCondition); 362 ASSERT(cond != kNoCondition);
(...skipping 3308 matching lines...) Expand 10 before | Expand all | Expand 10 after
3667 3671
3668 3672
3669 const char* Assembler::FpuRegisterName(FpuRegister reg) { 3673 const char* Assembler::FpuRegisterName(FpuRegister reg) {
3670 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters)); 3674 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters));
3671 return fpu_reg_names[reg]; 3675 return fpu_reg_names[reg];
3672 } 3676 }
3673 3677
3674 } // namespace dart 3678 } // namespace dart
3675 3679
3676 #endif // defined TARGET_ARCH_ARM 3680 #endif // defined TARGET_ARCH_ARM
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