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1 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===// | 1 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 /// | 9 /// |
10 /// \file | 10 /// \file |
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782 | 782 |
783 void InstARM32Call::emit(const Cfg *Func) const { | 783 void InstARM32Call::emit(const Cfg *Func) const { |
784 if (!BuildDefs::dump()) | 784 if (!BuildDefs::dump()) |
785 return; | 785 return; |
786 Ostream &Str = Func->getContext()->getStrEmit(); | 786 Ostream &Str = Func->getContext()->getStrEmit(); |
787 assert(getSrcSize() == 1); | 787 assert(getSrcSize() == 1); |
788 if (llvm::isa<ConstantInteger32>(getCallTarget())) { | 788 if (llvm::isa<ConstantInteger32>(getCallTarget())) { |
789 // This shouldn't happen (typically have to copy the full 32-bits to a | 789 // This shouldn't happen (typically have to copy the full 32-bits to a |
790 // register and do an indirect jump). | 790 // register and do an indirect jump). |
791 llvm::report_fatal_error("ARM32Call to ConstantInteger32"); | 791 llvm::report_fatal_error("ARM32Call to ConstantInteger32"); |
792 } else if (const auto CallTarget = | 792 } else if (const auto *CallTarget = |
793 llvm::dyn_cast<ConstantRelocatable>(getCallTarget())) { | 793 llvm::dyn_cast<ConstantRelocatable>(getCallTarget())) { |
794 // Calls only have 24-bits, but the linker should insert veneers to extend | 794 // Calls only have 24-bits, but the linker should insert veneers to extend |
795 // the range if needed. | 795 // the range if needed. |
796 Str << "\t" | 796 Str << "\t" |
797 << "bl" | 797 << "bl" |
798 << "\t"; | 798 << "\t"; |
799 CallTarget->emitWithoutPrefix(Func->getTarget()); | 799 CallTarget->emitWithoutPrefix(Func->getTarget()); |
800 } else { | 800 } else { |
801 Str << "\t" | 801 Str << "\t" |
802 << "blx" | 802 << "blx" |
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874 getDest()->emit(Func); | 874 getDest()->emit(Func); |
875 Str << ", "; | 875 Str << ", "; |
876 getSrc(0)->emit(Func); | 876 getSrc(0)->emit(Func); |
877 } | 877 } |
878 | 878 |
879 template <InstARM32::InstKindARM32 K> | 879 template <InstARM32::InstKindARM32 K> |
880 void InstARM32TwoAddrGPR<K>::emitIAS(const Cfg *Func) const { | 880 void InstARM32TwoAddrGPR<K>::emitIAS(const Cfg *Func) const { |
881 emitUsingTextFixup(Func); | 881 emitUsingTextFixup(Func); |
882 } | 882 } |
883 | 883 |
| 884 template <InstARM32::InstKindARM32 K, bool Nws> |
| 885 void InstARM32UnaryopGPR<K, Nws>::emitIAS(const Cfg *Func) const { |
| 886 emitUsingTextFixup(Func); |
| 887 } |
| 888 |
884 template <> void InstARM32Movw::emit(const Cfg *Func) const { | 889 template <> void InstARM32Movw::emit(const Cfg *Func) const { |
885 if (!BuildDefs::dump()) | 890 if (!BuildDefs::dump()) |
886 return; | 891 return; |
887 Ostream &Str = Func->getContext()->getStrEmit(); | 892 Ostream &Str = Func->getContext()->getStrEmit(); |
888 assert(getSrcSize() == 1); | 893 assert(getSrcSize() == 1); |
889 Str << "\t" << Opcode << getPredicate() << "\t"; | 894 Str << "\t" << Opcode << getPredicate() << "\t"; |
890 getDest()->emit(Func); | 895 getDest()->emit(Func); |
891 Str << ", "; | 896 Str << ", "; |
892 Constant *Src0 = llvm::cast<Constant>(getSrc(0)); | 897 Constant *Src0 = llvm::cast<Constant>(getSrc(0)); |
893 if (auto CR = llvm::dyn_cast<ConstantRelocatable>(Src0)) { | 898 if (auto *CR = llvm::dyn_cast<ConstantRelocatable>(Src0)) { |
894 Str << "#:lower16:"; | 899 Str << "#:lower16:"; |
895 CR->emitWithoutPrefix(Func->getTarget()); | 900 CR->emitWithoutPrefix(Func->getTarget()); |
896 } else { | 901 } else { |
897 Src0->emit(Func); | 902 Src0->emit(Func); |
898 } | 903 } |
899 } | 904 } |
900 | 905 |
| 906 template <> void InstARM32Movw::emitIAS(const Cfg *Func) const { |
| 907 assert(getSrcSize() == 1); |
| 908 ARM32::AssemblerARM32 *Asm = Func->getAssembler<ARM32::AssemblerARM32>(); |
| 909 Asm->movw(getDest(), getSrc(0), getPredicate()); |
| 910 } |
| 911 |
901 template <> void InstARM32Movt::emit(const Cfg *Func) const { | 912 template <> void InstARM32Movt::emit(const Cfg *Func) const { |
902 if (!BuildDefs::dump()) | 913 if (!BuildDefs::dump()) |
903 return; | 914 return; |
904 Ostream &Str = Func->getContext()->getStrEmit(); | 915 Ostream &Str = Func->getContext()->getStrEmit(); |
905 assert(getSrcSize() == 2); | 916 assert(getSrcSize() == 2); |
906 Variable *Dest = getDest(); | 917 Variable *Dest = getDest(); |
907 Constant *Src1 = llvm::cast<Constant>(getSrc(1)); | 918 Constant *Src1 = llvm::cast<Constant>(getSrc(1)); |
908 Str << "\t" << Opcode << getPredicate() << "\t"; | 919 Str << "\t" << Opcode << getPredicate() << "\t"; |
909 Dest->emit(Func); | 920 Dest->emit(Func); |
910 Str << ", "; | 921 Str << ", "; |
911 if (auto CR = llvm::dyn_cast<ConstantRelocatable>(Src1)) { | 922 if (auto *CR = llvm::dyn_cast<ConstantRelocatable>(Src1)) { |
912 Str << "#:upper16:"; | 923 Str << "#:upper16:"; |
913 CR->emitWithoutPrefix(Func->getTarget()); | 924 CR->emitWithoutPrefix(Func->getTarget()); |
914 } else { | 925 } else { |
915 Src1->emit(Func); | 926 Src1->emit(Func); |
916 } | 927 } |
917 } | 928 } |
918 | 929 |
| 930 template <> void InstARM32Movt::emitIAS(const Cfg *Func) const { |
| 931 assert(getSrcSize() == 2); |
| 932 ARM32::AssemblerARM32 *Asm = Func->getAssembler<ARM32::AssemblerARM32>(); |
| 933 Asm->movt(getDest(), getSrc(1), getPredicate()); |
| 934 } |
| 935 |
919 void InstARM32Pop::emit(const Cfg *Func) const { | 936 void InstARM32Pop::emit(const Cfg *Func) const { |
920 // TODO(jpp): Improve FP register save/restore. | 937 // TODO(jpp): Improve FP register save/restore. |
921 if (!BuildDefs::dump()) | 938 if (!BuildDefs::dump()) |
922 return; | 939 return; |
923 SizeT IntegerCount = 0; | 940 SizeT IntegerCount = 0; |
924 for (const Operand *Op : Dests) { | 941 for (const Operand *Op : Dests) { |
925 if (isScalarIntegerType(Op->getType())) { | 942 if (isScalarIntegerType(Op->getType())) { |
926 ++IntegerCount; | 943 ++IntegerCount; |
927 } | 944 } |
928 } | 945 } |
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1447 template class InstARM32ThreeAddrGPR<InstARM32::Sub>; | 1464 template class InstARM32ThreeAddrGPR<InstARM32::Sub>; |
1448 template class InstARM32ThreeAddrGPR<InstARM32::Udiv>; | 1465 template class InstARM32ThreeAddrGPR<InstARM32::Udiv>; |
1449 | 1466 |
1450 template class InstARM32ThreeAddrFP<InstARM32::Vadd>; | 1467 template class InstARM32ThreeAddrFP<InstARM32::Vadd>; |
1451 template class InstARM32ThreeAddrFP<InstARM32::Vdiv>; | 1468 template class InstARM32ThreeAddrFP<InstARM32::Vdiv>; |
1452 template class InstARM32ThreeAddrFP<InstARM32::Vmul>; | 1469 template class InstARM32ThreeAddrFP<InstARM32::Vmul>; |
1453 template class InstARM32ThreeAddrFP<InstARM32::Vsub>; | 1470 template class InstARM32ThreeAddrFP<InstARM32::Vsub>; |
1454 | 1471 |
1455 template class InstARM32TwoAddrGPR<InstARM32::Movt>; | 1472 template class InstARM32TwoAddrGPR<InstARM32::Movt>; |
1456 | 1473 |
| 1474 template class InstARM32UnaryopGPR<InstARM32::Movw, false>; |
| 1475 template class InstARM32UnaryopGPR<InstARM32::Clz, false>; |
| 1476 template class InstARM32UnaryopGPR<InstARM32::Mvn, false>; |
| 1477 template class InstARM32UnaryopGPR<InstARM32::Rbit, false>; |
| 1478 template class InstARM32UnaryopGPR<InstARM32::Rev, false>; |
| 1479 template class InstARM32UnaryopGPR<InstARM32::Sxt, true>; |
| 1480 template class InstARM32UnaryopGPR<InstARM32::Uxt, true>; |
| 1481 template class InstARM32UnaryopFP<InstARM32::Vsqrt>; |
| 1482 |
1457 } // end of namespace Ice | 1483 } // end of namespace Ice |
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