Add ADC (immediate) instruction to ARM integrated assembler.

src/DartARM32/assembler_arm.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 //
 // This is forked from Dart revision df52deea9f25690eb8b66c5995da92b70f7ac1fe
 // Please update the (git) revision if we merge changes from Dart.
 // https://code.google.com/p/dart/wiki/GettingTheSource
 
 #include "vm/globals.h"  // NOLINT
 #if defined(TARGET_ARCH_ARM)
@@ skipping 207 matching lines @@
 
 // Moved to ARM32::AssemberARM32::add()
 void Assembler::adds(Register rd, Register rn, Operand o, Condition cond) {
   EmitType01(cond, o.type(), ADD, 1, rn, rd, o);
 }
 
 // Moved to ARM32::AssemberARM32::sub()
 void Assembler::subs(Register rd, Register rn, Operand o, Condition cond) {
   EmitType01(cond, o.type(), SUB, 1, rn, rd, o);
 }
-#endif
 
+// Moved to ARM32::AssemberARM32::adc()
 void Assembler::adc(Register rd, Register rn, Operand o, Condition cond) {
   EmitType01(cond, o.type(), ADC, 0, rn, rd, o);
 }
 
-
+// Moved to ARM32::AssemberARM32::adc()
 void Assembler::adcs(Register rd, Register rn, Operand o, Condition cond) {
   EmitType01(cond, o.type(), ADC, 1, rn, rd, o);
 }
+#endif
 
 
 void Assembler::sbc(Register rd, Register rn, Operand o, Condition cond) {
   EmitType01(cond, o.type(), SBC, 0, rn, rd, o);
 }
 
 
 void Assembler::sbcs(Register rd, Register rn, Operand o, Condition cond) {
   EmitType01(cond, o.type(), SBC, 1, rn, rd, o);
 }
@@ skipping 3418 matching lines @@
 
 
 const char* Assembler::FpuRegisterName(FpuRegister reg) {
   ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters));
   return fpu_reg_names[reg];
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM