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Side by Side Diff: runtime/vm/assembler_mips.h

Issue 14246039: Implements features to run "Hello, world!" on simulated MIPS. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 7 years, 8 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #ifndef VM_ASSEMBLER_MIPS_H_ 5 #ifndef VM_ASSEMBLER_MIPS_H_
6 #define VM_ASSEMBLER_MIPS_H_ 6 #define VM_ASSEMBLER_MIPS_H_
7 7
8 #ifndef VM_ASSEMBLER_H_ 8 #ifndef VM_ASSEMBLER_H_
9 #error Do not include assembler_mips.h directly; use assembler.h instead. 9 #error Do not include assembler_mips.h directly; use assembler.h instead.
10 #endif 10 #endif
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184 // Only the tags field of the object is initialized. 184 // Only the tags field of the object is initialized.
185 void TryAllocate(const Class& cls, 185 void TryAllocate(const Class& cls,
186 Label* failure, 186 Label* failure,
187 bool near_jump, 187 bool near_jump,
188 Register instance_reg) { 188 Register instance_reg) {
189 UNIMPLEMENTED(); 189 UNIMPLEMENTED();
190 } 190 }
191 191
192 // Debugging and bringup support. 192 // Debugging and bringup support.
193 void Stop(const char* message); 193 void Stop(const char* message);
194 void Msg(const char *message);
194 void Unimplemented(const char* message); 195 void Unimplemented(const char* message);
195 void Untested(const char* message); 196 void Untested(const char* message);
196 void Unreachable(const char* message); 197 void Unreachable(const char* message);
197 198
198 static void InitializeMemoryWithBreakpoints(uword data, int length); 199 static void InitializeMemoryWithBreakpoints(uword data, int length);
199 200
200 void Comment(const char* format, ...) PRINTF_ATTRIBUTE(2, 3); 201 void Comment(const char* format, ...) PRINTF_ATTRIBUTE(2, 3);
201 202
202 const Code::Comments& GetCodeComments() const; 203 const Code::Comments& GetCodeComments() const;
203 204
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675 LoadImmediate(TMP1, value); 676 LoadImmediate(TMP1, value);
676 addu(rd, rs, TMP1); 677 addu(rd, rs, TMP1);
677 } 678 }
678 } 679 }
679 680
680 void AddImmediate(Register rd, int32_t value) { 681 void AddImmediate(Register rd, int32_t value) {
681 AddImmediate(rd, rd, value); 682 AddImmediate(rd, rd, value);
682 } 683 }
683 684
684 void BranchEqual(Register rd, int32_t value, Label* l) { 685 void BranchEqual(Register rd, int32_t value, Label* l) {
685 LoadImmediate(TMP1, value); 686 ASSERT(rd != CMPRES);
686 beq(rd, TMP1, l); 687 LoadImmediate(CMPRES, value);
688 beq(rd, CMPRES, l);
687 } 689 }
688 690
689 void BranchEqual(Register rd, const Object& object, Label* l) { 691 void BranchEqual(Register rd, const Object& object, Label* l) {
690 LoadObject(TMP1, object); 692 ASSERT(rd != CMPRES);
691 beq(rd, TMP1, l); 693 LoadObject(CMPRES, object);
694 beq(rd, CMPRES, l);
692 } 695 }
693 696
694 void BranchNotEqual(Register rd, int32_t value, Label* l) { 697 void BranchNotEqual(Register rd, int32_t value, Label* l) {
695 LoadImmediate(TMP1, value); 698 ASSERT(rd != CMPRES);
696 bne(rd, TMP1, l); 699 LoadImmediate(CMPRES, value);
700 bne(rd, CMPRES, l);
697 } 701 }
698 702
699 void BranchNotEqual(Register rd, const Object& object, Label* l) { 703 void BranchNotEqual(Register rd, const Object& object, Label* l) {
700 LoadObject(TMP1, object); 704 ASSERT(rd != CMPRES);
701 bne(rd, TMP1, l); 705 LoadObject(CMPRES, object);
706 bne(rd, CMPRES, l);
702 } 707 }
703 708
704 void BranchGreater(Register rd, int32_t value, Label* l) { 709 void BranchGreater(Register rd, int32_t value, Label* l) {
705 if (Utils::IsInt(kImmBits, -value)) { 710 if (Utils::IsInt(kImmBits, -value)) {
706 addiu(TMP1, rd, Immediate(-value)); 711 addiu(CMPRES, rd, Immediate(-value));
707 bgtz(TMP1, l); 712 bgtz(CMPRES, l);
708 } else { 713 } else {
709 LoadImmediate(TMP1, value); 714 LoadImmediate(CMPRES, value);
710 subu(TMP1, rd, TMP1); 715 subu(CMPRES, rd, CMPRES);
711 bgtz(TMP1, l); 716 bgtz(CMPRES, l);
712 } 717 }
713 } 718 }
714 719
715 void BranchGreater(Register rd, Register rs, Label* l) { 720 void BranchGreater(Register rd, Register rs, Label* l) {
716 subu(TMP1, rd, rs); 721 subu(CMPRES, rd, rs);
717 bgtz(TMP1, l); 722 bgtz(CMPRES, l);
718 } 723 }
719 724
720 void BranchGreaterEqual(Register rd, int32_t value, Label* l) { 725 void BranchGreaterEqual(Register rd, int32_t value, Label* l) {
721 if (Utils::IsInt(kImmBits, -value)) { 726 if (Utils::IsInt(kImmBits, -value)) {
722 addiu(TMP1, rd, Immediate(-value)); 727 addiu(CMPRES, rd, Immediate(-value));
723 bgez(TMP1, l); 728 bgez(CMPRES, l);
724 } else { 729 } else {
725 LoadImmediate(TMP1, value); 730 LoadImmediate(CMPRES, value);
726 subu(TMP1, rd, TMP1); 731 subu(CMPRES, rd, CMPRES);
727 bgez(TMP1, l); 732 bgez(CMPRES, l);
728 } 733 }
729 } 734 }
730 735
731 void BranchGreaterEqual(Register rd, Register rs, Label* l) { 736 void BranchGreaterEqual(Register rd, Register rs, Label* l) {
732 subu(TMP1, rd, rs); 737 subu(CMPRES, rd, rs);
733 bgez(TMP1, l); 738 bgez(CMPRES, l);
734 } 739 }
735 740
736 void BranchLess(Register rd, int32_t value, Label* l) { 741 void BranchLess(Register rd, int32_t value, Label* l) {
737 if (Utils::IsInt(kImmBits, -value)) { 742 if (Utils::IsInt(kImmBits, -value)) {
738 addiu(TMP1, rd, Immediate(-value)); 743 addiu(CMPRES, rd, Immediate(-value));
739 bltz(TMP1, l); 744 bltz(CMPRES, l);
740 } else { 745 } else {
741 LoadImmediate(TMP1, value); 746 LoadImmediate(CMPRES, value);
742 subu(TMP1, rd, TMP1); 747 subu(CMPRES, rd, CMPRES);
743 bltz(TMP1, l); 748 bltz(CMPRES, l);
744 } 749 }
745 } 750 }
746 751
747 void BranchLess(Register rd, Register rs, Label* l) { 752 void BranchLess(Register rd, Register rs, Label* l) {
748 subu(TMP1, rd, rs); 753 subu(CMPRES, rd, rs);
749 bltz(TMP1, l); 754 bltz(CMPRES, l);
750 } 755 }
751 756
752 void BranchLessEqual(Register rd, int32_t value, Label* l) { 757 void BranchLessEqual(Register rd, int32_t value, Label* l) {
753 if (Utils::IsInt(kImmBits, -value)) { 758 if (Utils::IsInt(kImmBits, -value)) {
754 addiu(TMP1, rd, Immediate(-value)); 759 addiu(CMPRES, rd, Immediate(-value));
755 blez(TMP1, l); 760 blez(CMPRES, l);
756 } else { 761 } else {
757 LoadImmediate(TMP1, value); 762 LoadImmediate(CMPRES, value);
758 subu(TMP1, rd, TMP1); 763 subu(CMPRES, rd, CMPRES);
759 blez(TMP1, l); 764 blez(CMPRES, l);
760 } 765 }
761 } 766 }
762 767
763 void BranchLessEqual(Register rd, Register rs, Label* l) { 768 void BranchLessEqual(Register rd, Register rs, Label* l) {
764 subu(TMP1, rd, rs); 769 subu(CMPRES, rd, rs);
765 blez(TMP1, l); 770 blez(CMPRES, l);
766 } 771 }
767 772
768 void Push(Register rt) { 773 void Push(Register rt) {
769 addiu(SP, SP, Immediate(-kWordSize)); 774 addiu(SP, SP, Immediate(-kWordSize));
770 sw(rt, Address(SP)); 775 sw(rt, Address(SP));
771 } 776 }
772 777
773 void Pop(Register rt) { 778 void Pop(Register rt) {
774 lw(rt, Address(SP)); 779 lw(rt, Address(SP));
775 addiu(SP, SP, Immediate(kWordSize)); 780 addiu(SP, SP, Immediate(kWordSize));
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981 Register value, 986 Register value,
982 Label* no_update); 987 Label* no_update);
983 988
984 DISALLOW_ALLOCATION(); 989 DISALLOW_ALLOCATION();
985 DISALLOW_COPY_AND_ASSIGN(Assembler); 990 DISALLOW_COPY_AND_ASSIGN(Assembler);
986 }; 991 };
987 992
988 } // namespace dart 993 } // namespace dart
989 994
990 #endif // VM_ASSEMBLER_MIPS_H_ 995 #endif // VM_ASSEMBLER_MIPS_H_
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