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Issue 14246032: RecordWriteStubs on ARM need to save FP registers (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Review from Ulan Created 7 years, 8 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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830 str(ip, MemOperand(fp, ExitFrameConstants::kCodeOffset)); 830 str(ip, MemOperand(fp, ExitFrameConstants::kCodeOffset));
831 831
832 // Save the frame pointer and the context in top. 832 // Save the frame pointer and the context in top.
833 mov(ip, Operand(ExternalReference(Isolate::kCEntryFPAddress, isolate()))); 833 mov(ip, Operand(ExternalReference(Isolate::kCEntryFPAddress, isolate())));
834 str(fp, MemOperand(ip)); 834 str(fp, MemOperand(ip));
835 mov(ip, Operand(ExternalReference(Isolate::kContextAddress, isolate()))); 835 mov(ip, Operand(ExternalReference(Isolate::kContextAddress, isolate())));
836 str(cp, MemOperand(ip)); 836 str(cp, MemOperand(ip));
837 837
838 // Optionally save all double registers. 838 // Optionally save all double registers.
839 if (save_doubles) { 839 if (save_doubles) {
840 // Check CPU flags for number of registers, setting the Z condition flag. 840 SaveFPRegs(sp, ip);
841 CheckFor32DRegs(ip);
842
843 // Push registers d0-d15, and possibly d16-d31, on the stack.
844 // If d16-d31 are not pushed, decrease the stack pointer instead.
845 vstm(db_w, sp, d16, d31, ne);
846 sub(sp, sp, Operand(16 * kDoubleSize), LeaveCC, eq);
847 vstm(db_w, sp, d0, d15);
848 // Note that d0 will be accessible at 841 // Note that d0 will be accessible at
849 // fp - 2 * kPointerSize - DwVfpRegister::kMaxNumRegisters * kDoubleSize, 842 // fp - 2 * kPointerSize - DwVfpRegister::kMaxNumRegisters * kDoubleSize,
850 // since the sp slot and code slot were pushed after the fp. 843 // since the sp slot and code slot were pushed after the fp.
851 } 844 }
852 845
853 // Reserve place for the return address and stack space and align the frame 846 // Reserve place for the return address and stack space and align the frame
854 // preparing for calling the runtime function. 847 // preparing for calling the runtime function.
855 const int frame_alignment = MacroAssembler::ActivationFrameAlignment(); 848 const int frame_alignment = MacroAssembler::ActivationFrameAlignment();
856 sub(sp, sp, Operand((stack_space + 1) * kPointerSize)); 849 sub(sp, sp, Operand((stack_space + 1) * kPointerSize));
857 if (frame_alignment > 0) { 850 if (frame_alignment > 0) {
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898 891
899 892
900 void MacroAssembler::LeaveExitFrame(bool save_doubles, 893 void MacroAssembler::LeaveExitFrame(bool save_doubles,
901 Register argument_count) { 894 Register argument_count) {
902 // Optionally restore all double registers. 895 // Optionally restore all double registers.
903 if (save_doubles) { 896 if (save_doubles) {
904 // Calculate the stack location of the saved doubles and restore them. 897 // Calculate the stack location of the saved doubles and restore them.
905 const int offset = 2 * kPointerSize; 898 const int offset = 2 * kPointerSize;
906 sub(r3, fp, 899 sub(r3, fp,
907 Operand(offset + DwVfpRegister::kMaxNumRegisters * kDoubleSize)); 900 Operand(offset + DwVfpRegister::kMaxNumRegisters * kDoubleSize));
908 901 RestoreFPRegs(r3, ip);
909 // Check CPU flags for number of registers, setting the Z condition flag.
910 CheckFor32DRegs(ip);
911
912 // Pop registers d0-d15, and possibly d16-d31, from r3.
913 // If d16-d31 are not popped, increase r3 instead.
914 vldm(ia_w, r3, d0, d15);
915 vldm(ia_w, r3, d16, d31, ne);
916 add(r3, r3, Operand(16 * kDoubleSize), LeaveCC, eq);
917 } 902 }
918 903
919 // Clear top frame. 904 // Clear top frame.
920 mov(r3, Operand::Zero()); 905 mov(r3, Operand::Zero());
921 mov(ip, Operand(ExternalReference(Isolate::kCEntryFPAddress, isolate()))); 906 mov(ip, Operand(ExternalReference(Isolate::kCEntryFPAddress, isolate())));
922 str(r3, MemOperand(ip)); 907 str(r3, MemOperand(ip));
923 908
924 // Restore current context from top and clear it in debug mode. 909 // Restore current context from top and clear it in debug mode.
925 mov(ip, Operand(ExternalReference(Isolate::kContextAddress, isolate()))); 910 mov(ip, Operand(ExternalReference(Isolate::kContextAddress, isolate())));
926 ldr(cp, MemOperand(ip)); 911 ldr(cp, MemOperand(ip));
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3176 } 3161 }
3177 3162
3178 3163
3179 void MacroAssembler::CheckFor32DRegs(Register scratch) { 3164 void MacroAssembler::CheckFor32DRegs(Register scratch) {
3180 mov(scratch, Operand(ExternalReference::cpu_features())); 3165 mov(scratch, Operand(ExternalReference::cpu_features()));
3181 ldr(scratch, MemOperand(scratch)); 3166 ldr(scratch, MemOperand(scratch));
3182 tst(scratch, Operand(1u << VFP32DREGS)); 3167 tst(scratch, Operand(1u << VFP32DREGS));
3183 } 3168 }
3184 3169
3185 3170
3171 void MacroAssembler::SaveFPRegs(Register location, Register scratch) {
3172 CheckFor32DRegs(scratch);
3173 vstm(db_w, location, d16, d31, ne);
3174 sub(location, location, Operand(16 * kDoubleSize), LeaveCC, eq);
3175 vstm(db_w, location, d0, d15);
3176 }
3177
3178
3179 void MacroAssembler::RestoreFPRegs(Register location, Register scratch) {
3180 CheckFor32DRegs(scratch);
3181 vldm(ia_w, location, d0, d15);
3182 vldm(ia_w, location, d16, d31, ne);
3183 add(location, location, Operand(16 * kDoubleSize), LeaveCC, eq);
3184 }
3185
3186
3186 void MacroAssembler::JumpIfBothInstanceTypesAreNotSequentialAscii( 3187 void MacroAssembler::JumpIfBothInstanceTypesAreNotSequentialAscii(
3187 Register first, 3188 Register first,
3188 Register second, 3189 Register second,
3189 Register scratch1, 3190 Register scratch1,
3190 Register scratch2, 3191 Register scratch2,
3191 Label* failure) { 3192 Label* failure) {
3192 int kFlatAsciiStringMask = 3193 int kFlatAsciiStringMask =
3193 kIsNotStringMask | kStringEncodingMask | kStringRepresentationMask; 3194 kIsNotStringMask | kStringEncodingMask | kStringRepresentationMask;
3194 int kFlatAsciiStringTag = ASCII_STRING_TYPE; 3195 int kFlatAsciiStringTag = ASCII_STRING_TYPE;
3195 and_(scratch1, first, Operand(kFlatAsciiStringMask)); 3196 and_(scratch1, first, Operand(kFlatAsciiStringMask));
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3748 void CodePatcher::EmitCondition(Condition cond) { 3749 void CodePatcher::EmitCondition(Condition cond) {
3749 Instr instr = Assembler::instr_at(masm_.pc_); 3750 Instr instr = Assembler::instr_at(masm_.pc_);
3750 instr = (instr & ~kCondMask) | cond; 3751 instr = (instr & ~kCondMask) | cond;
3751 masm_.emit(instr); 3752 masm_.emit(instr);
3752 } 3753 }
3753 3754
3754 3755
3755 } } // namespace v8::internal 3756 } } // namespace v8::internal
3756 3757
3757 #endif // V8_TARGET_ARCH_ARM 3758 #endif // V8_TARGET_ARCH_ARM
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