[turbofan] Added the RoundInt64ToFloat64 instruction to TurboFan.

src/compiler/x64/code-generator-x64.cc

Index: src/compiler/x64/code-generator-x64.cc
diff --git a/src/compiler/x64/code-generator-x64.cc b/src/compiler/x64/code-generator-x64.cc
index 843013484fbcfaa71d30ef2dc26ec13a300a8cbb..071dc48337923543866065868c834d16b87df01d 100644
--- a/src/compiler/x64/code-generator-x64.cc
+++ b/src/compiler/x64/code-generator-x64.cc
@@ -939,6 +939,13 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
         __ Cvtlsi2sd(i.OutputDoubleRegister(), i.InputOperand(0));
       }
       break;
+    case kSSEInt64ToFloat64:
+      if (instr->InputAt(0)->IsRegister()) {
+        __ Cvtqsi2sd(i.OutputDoubleRegister(), i.InputRegister(0));

[Benedikt Meurer, 2015/10/30 09:42:08]

This is most likely not what you want, as you depend on the current rounding
mode. Intel manual says "When conversion is inexact, the value returned is
rounded according to the rounding control bits in the MXCSR register.".

[ahaas, 2015/11/02 10:35:37]

As discussed, we will use this instruction because it satisfies the definition
of the int-to-float conversion in the IEEE 754 standard. The rounding mode is
the same as for all other float64 instructions in v8, which is round-to-nearest.

+      } else {
+        __ Cvtqsi2sd(i.OutputDoubleRegister(), i.InputOperand(0));
+      }
+      break;
     case kSSEUint32ToFloat64:
       if (instr->InputAt(0)->IsRegister()) {
         __ movl(kScratchRegister, i.InputRegister(0));