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Issue 1424333002: [turbofan] Added the RoundInt64ToFloat64 instruction to TurboFan. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@BufferedRawMachineAssemblerTester
Patch Set: Fixed the type of RoundInt64ToFloat64 Created 5 years, 1 month ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #if V8_TARGET_ARCH_X64 5 #if V8_TARGET_ARCH_X64
6 6
7 #include "src/base/bits.h" 7 #include "src/base/bits.h"
8 #include "src/base/division-by-constant.h" 8 #include "src/base/division-by-constant.h"
9 #include "src/bootstrapper.h" 9 #include "src/bootstrapper.h"
10 #include "src/codegen.h" 10 #include "src/codegen.h"
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856 CpuFeatureScope scope(this, AVX); 856 CpuFeatureScope scope(this, AVX);
857 vxorpd(dst, dst, dst); 857 vxorpd(dst, dst, dst);
858 vcvtqsi2sd(dst, dst, src); 858 vcvtqsi2sd(dst, dst, src);
859 } else { 859 } else {
860 xorpd(dst, dst); 860 xorpd(dst, dst);
861 cvtqsi2sd(dst, src); 861 cvtqsi2sd(dst, src);
862 } 862 }
863 } 863 }
864 864
865 865
866 void MacroAssembler::Cvtqsi2sd(XMMRegister dst, const Operand& src) {
867 if (CpuFeatures::IsSupported(AVX)) {
868 CpuFeatureScope scope(this, AVX);
869 vxorpd(dst, dst, dst);
870 vcvtqsi2sd(dst, dst, src);
871 } else {
872 xorpd(dst, dst);
873 cvtqsi2sd(dst, src);
874 }
875 }
876
877
866 void MacroAssembler::Cvtsd2si(Register dst, XMMRegister src) { 878 void MacroAssembler::Cvtsd2si(Register dst, XMMRegister src) {
867 if (CpuFeatures::IsSupported(AVX)) { 879 if (CpuFeatures::IsSupported(AVX)) {
868 CpuFeatureScope scope(this, AVX); 880 CpuFeatureScope scope(this, AVX);
869 vcvtsd2si(dst, src); 881 vcvtsd2si(dst, src);
870 } else { 882 } else {
871 cvtsd2si(dst, src); 883 cvtsd2si(dst, src);
872 } 884 }
873 } 885 }
874 886
875 887
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5372 movl(rax, dividend); 5384 movl(rax, dividend);
5373 shrl(rax, Immediate(31)); 5385 shrl(rax, Immediate(31));
5374 addl(rdx, rax); 5386 addl(rdx, rax);
5375 } 5387 }
5376 5388
5377 5389
5378 } // namespace internal 5390 } // namespace internal
5379 } // namespace v8 5391 } // namespace v8
5380 5392
5381 #endif // V8_TARGET_ARCH_X64 5393 #endif // V8_TARGET_ARCH_X64
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