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Unified Diff: test/Transforms/NaCl/vector-canonicalization-binops.ll

Issue 1423873002: PNaCl: Add a vector type legalization pass. Base URL: https://chromium.googlesource.com/native_client/pnacl-llvm.git@master
Patch Set: Created 5 years, 2 months ago
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Index: test/Transforms/NaCl/vector-canonicalization-binops.ll
diff --git a/test/Transforms/NaCl/vector-canonicalization-binops.ll b/test/Transforms/NaCl/vector-canonicalization-binops.ll
new file mode 100644
index 0000000000000000000000000000000000000000..931cf5ed5093a6640b683019f1e63950fa2bcaf2
--- /dev/null
+++ b/test/Transforms/NaCl/vector-canonicalization-binops.ll
@@ -0,0 +1,9636 @@
+; RUN: opt -S -pnacl-vector-canonicalization %s | FileCheck %s
+
+; Auto-generated tests for all binary operations.
+
+target datalayout = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-p:32:32:32-v128:32:128"
+
+define <2 x float> @fadd_binop_2xfloat(<2 x float>, <2 x float>) {
+ %3 = fadd <2 x float> %0, %1
+ ret <2 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fadd_binop_2xfloat(<4 x float>, <4 x float>)
+; CHECK-NEXT: %3 = fadd <4 x float> %0, %1
+; CHECK-NEXT: ret <4 x float> %3
+
+define <2 x float> @fadd_binop_2xfloat_fast(<2 x float>, <2 x float>) {
+ %3 = fadd fast <2 x float> %0, %1
+ ret <2 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fadd_binop_2xfloat_fast(<4 x float>, <4 x float>)
+; CHECK-NEXT: %3 = fadd fast <4 x float> %0, %1
+; CHECK-NEXT: ret <4 x float> %3
+
+define <2 x double> @fadd_binop_2xdouble(<2 x double>, <2 x double>) {
+ %3 = fadd <2 x double> %0, %1
+ ret <2 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fadd_binop_2xdouble(<2 x double>, <2 x double>)
+; CHECK-NEXT: %3 = fadd <2 x double> %0, %1
+; CHECK-NEXT: ret <2 x double> %3
+
+define <2 x double> @fadd_binop_2xdouble_fast(<2 x double>, <2 x double>) {
+ %3 = fadd fast <2 x double> %0, %1
+ ret <2 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fadd_binop_2xdouble_fast(<2 x double>, <2 x double>)
+; CHECK-NEXT: %3 = fadd fast <2 x double> %0, %1
+; CHECK-NEXT: ret <2 x double> %3
+
+define <2 x float> @fsub_binop_2xfloat(<2 x float>, <2 x float>) {
+ %3 = fsub <2 x float> %0, %1
+ ret <2 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fsub_binop_2xfloat(<4 x float>, <4 x float>)
+; CHECK-NEXT: %3 = fsub <4 x float> %0, %1
+; CHECK-NEXT: ret <4 x float> %3
+
+define <2 x float> @fsub_binop_2xfloat_fast(<2 x float>, <2 x float>) {
+ %3 = fsub fast <2 x float> %0, %1
+ ret <2 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fsub_binop_2xfloat_fast(<4 x float>, <4 x float>)
+; CHECK-NEXT: %3 = fsub fast <4 x float> %0, %1
+; CHECK-NEXT: ret <4 x float> %3
+
+define <2 x double> @fsub_binop_2xdouble(<2 x double>, <2 x double>) {
+ %3 = fsub <2 x double> %0, %1
+ ret <2 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fsub_binop_2xdouble(<2 x double>, <2 x double>)
+; CHECK-NEXT: %3 = fsub <2 x double> %0, %1
+; CHECK-NEXT: ret <2 x double> %3
+
+define <2 x double> @fsub_binop_2xdouble_fast(<2 x double>, <2 x double>) {
+ %3 = fsub fast <2 x double> %0, %1
+ ret <2 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fsub_binop_2xdouble_fast(<2 x double>, <2 x double>)
+; CHECK-NEXT: %3 = fsub fast <2 x double> %0, %1
+; CHECK-NEXT: ret <2 x double> %3
+
+define <2 x float> @fmul_binop_2xfloat(<2 x float>, <2 x float>) {
+ %3 = fmul <2 x float> %0, %1
+ ret <2 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fmul_binop_2xfloat(<4 x float>, <4 x float>)
+; CHECK-NEXT: %3 = fmul <4 x float> %0, %1
+; CHECK-NEXT: ret <4 x float> %3
+
+define <2 x float> @fmul_binop_2xfloat_fast(<2 x float>, <2 x float>) {
+ %3 = fmul fast <2 x float> %0, %1
+ ret <2 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fmul_binop_2xfloat_fast(<4 x float>, <4 x float>)
+; CHECK-NEXT: %3 = fmul fast <4 x float> %0, %1
+; CHECK-NEXT: ret <4 x float> %3
+
+define <2 x double> @fmul_binop_2xdouble(<2 x double>, <2 x double>) {
+ %3 = fmul <2 x double> %0, %1
+ ret <2 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fmul_binop_2xdouble(<2 x double>, <2 x double>)
+; CHECK-NEXT: %3 = fmul <2 x double> %0, %1
+; CHECK-NEXT: ret <2 x double> %3
+
+define <2 x double> @fmul_binop_2xdouble_fast(<2 x double>, <2 x double>) {
+ %3 = fmul fast <2 x double> %0, %1
+ ret <2 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fmul_binop_2xdouble_fast(<2 x double>, <2 x double>)
+; CHECK-NEXT: %3 = fmul fast <2 x double> %0, %1
+; CHECK-NEXT: ret <2 x double> %3
+
+define <2 x float> @fdiv_binop_2xfloat(<2 x float>, <2 x float>) {
+ %3 = fdiv <2 x float> %0, %1
+ ret <2 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fdiv_binop_2xfloat(<4 x float>, <4 x float>)
+; CHECK-NEXT: %3 = fdiv <4 x float> %0, %1
+; CHECK-NEXT: ret <4 x float> %3
+
+define <2 x float> @fdiv_binop_2xfloat_fast(<2 x float>, <2 x float>) {
+ %3 = fdiv fast <2 x float> %0, %1
+ ret <2 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fdiv_binop_2xfloat_fast(<4 x float>, <4 x float>)
+; CHECK-NEXT: %3 = fdiv fast <4 x float> %0, %1
+; CHECK-NEXT: ret <4 x float> %3
+
+define <2 x double> @fdiv_binop_2xdouble(<2 x double>, <2 x double>) {
+ %3 = fdiv <2 x double> %0, %1
+ ret <2 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fdiv_binop_2xdouble(<2 x double>, <2 x double>)
+; CHECK-NEXT: %3 = fdiv <2 x double> %0, %1
+; CHECK-NEXT: ret <2 x double> %3
+
+define <2 x double> @fdiv_binop_2xdouble_fast(<2 x double>, <2 x double>) {
+ %3 = fdiv fast <2 x double> %0, %1
+ ret <2 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fdiv_binop_2xdouble_fast(<2 x double>, <2 x double>)
+; CHECK-NEXT: %3 = fdiv fast <2 x double> %0, %1
+; CHECK-NEXT: ret <2 x double> %3
+
+define <2 x float> @frem_binop_2xfloat(<2 x float>, <2 x float>) {
+ %3 = frem <2 x float> %0, %1
+ ret <2 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @frem_binop_2xfloat(<4 x float>, <4 x float>)
+; CHECK-NEXT: %3 = frem <4 x float> %0, %1
+; CHECK-NEXT: ret <4 x float> %3
+
+define <2 x float> @frem_binop_2xfloat_fast(<2 x float>, <2 x float>) {
+ %3 = frem fast <2 x float> %0, %1
+ ret <2 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @frem_binop_2xfloat_fast(<4 x float>, <4 x float>)
+; CHECK-NEXT: %3 = frem fast <4 x float> %0, %1
+; CHECK-NEXT: ret <4 x float> %3
+
+define <2 x double> @frem_binop_2xdouble(<2 x double>, <2 x double>) {
+ %3 = frem <2 x double> %0, %1
+ ret <2 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @frem_binop_2xdouble(<2 x double>, <2 x double>)
+; CHECK-NEXT: %3 = frem <2 x double> %0, %1
+; CHECK-NEXT: ret <2 x double> %3
+
+define <2 x double> @frem_binop_2xdouble_fast(<2 x double>, <2 x double>) {
+ %3 = frem fast <2 x double> %0, %1
+ ret <2 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @frem_binop_2xdouble_fast(<2 x double>, <2 x double>)
+; CHECK-NEXT: %3 = frem fast <2 x double> %0, %1
+; CHECK-NEXT: ret <2 x double> %3
+
+define <4 x float> @fadd_binop_4xfloat(<4 x float>, <4 x float>) {
+ %3 = fadd <4 x float> %0, %1
+ ret <4 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fadd_binop_4xfloat(<4 x float>, <4 x float>)
+; CHECK-NEXT: %3 = fadd <4 x float> %0, %1
+; CHECK-NEXT: ret <4 x float> %3
+
+define <4 x float> @fadd_binop_4xfloat_fast(<4 x float>, <4 x float>) {
+ %3 = fadd fast <4 x float> %0, %1
+ ret <4 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fadd_binop_4xfloat_fast(<4 x float>, <4 x float>)
+; CHECK-NEXT: %3 = fadd fast <4 x float> %0, %1
+; CHECK-NEXT: ret <4 x float> %3
+
+define <4 x double> @fadd_binop_4xdouble(<4 x double>, <4 x double>) {
+ %3 = fadd <4 x double> %0, %1
+ ret <4 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fadd_binop_4xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %6 = fadd <2 x double> %1, %3
+; CHECK-NEXT: %7 = fadd <2 x double> %2, %4
+; CHECK-NEXT: store <2 x double> %7, <2 x double>* %0, align 16
+; CHECK-NEXT: ret <2 x double> %6
+
+define <4 x double> @fadd_binop_4xdouble_fast(<4 x double>, <4 x double>) {
+ %3 = fadd fast <4 x double> %0, %1
+ ret <4 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fadd_binop_4xdouble_fast(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %6 = fadd fast <2 x double> %1, %3
+; CHECK-NEXT: %7 = fadd fast <2 x double> %2, %4
+; CHECK-NEXT: store <2 x double> %7, <2 x double>* %0, align 16
+; CHECK-NEXT: ret <2 x double> %6
+
+define <4 x float> @fsub_binop_4xfloat(<4 x float>, <4 x float>) {
+ %3 = fsub <4 x float> %0, %1
+ ret <4 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fsub_binop_4xfloat(<4 x float>, <4 x float>)
+; CHECK-NEXT: %3 = fsub <4 x float> %0, %1
+; CHECK-NEXT: ret <4 x float> %3
+
+define <4 x float> @fsub_binop_4xfloat_fast(<4 x float>, <4 x float>) {
+ %3 = fsub fast <4 x float> %0, %1
+ ret <4 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fsub_binop_4xfloat_fast(<4 x float>, <4 x float>)
+; CHECK-NEXT: %3 = fsub fast <4 x float> %0, %1
+; CHECK-NEXT: ret <4 x float> %3
+
+define <4 x double> @fsub_binop_4xdouble(<4 x double>, <4 x double>) {
+ %3 = fsub <4 x double> %0, %1
+ ret <4 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fsub_binop_4xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %6 = fsub <2 x double> %1, %3
+; CHECK-NEXT: %7 = fsub <2 x double> %2, %4
+; CHECK-NEXT: store <2 x double> %7, <2 x double>* %0, align 16
+; CHECK-NEXT: ret <2 x double> %6
+
+define <4 x double> @fsub_binop_4xdouble_fast(<4 x double>, <4 x double>) {
+ %3 = fsub fast <4 x double> %0, %1
+ ret <4 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fsub_binop_4xdouble_fast(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %6 = fsub fast <2 x double> %1, %3
+; CHECK-NEXT: %7 = fsub fast <2 x double> %2, %4
+; CHECK-NEXT: store <2 x double> %7, <2 x double>* %0, align 16
+; CHECK-NEXT: ret <2 x double> %6
+
+define <4 x float> @fmul_binop_4xfloat(<4 x float>, <4 x float>) {
+ %3 = fmul <4 x float> %0, %1
+ ret <4 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fmul_binop_4xfloat(<4 x float>, <4 x float>)
+; CHECK-NEXT: %3 = fmul <4 x float> %0, %1
+; CHECK-NEXT: ret <4 x float> %3
+
+define <4 x float> @fmul_binop_4xfloat_fast(<4 x float>, <4 x float>) {
+ %3 = fmul fast <4 x float> %0, %1
+ ret <4 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fmul_binop_4xfloat_fast(<4 x float>, <4 x float>)
+; CHECK-NEXT: %3 = fmul fast <4 x float> %0, %1
+; CHECK-NEXT: ret <4 x float> %3
+
+define <4 x double> @fmul_binop_4xdouble(<4 x double>, <4 x double>) {
+ %3 = fmul <4 x double> %0, %1
+ ret <4 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fmul_binop_4xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %6 = fmul <2 x double> %1, %3
+; CHECK-NEXT: %7 = fmul <2 x double> %2, %4
+; CHECK-NEXT: store <2 x double> %7, <2 x double>* %0, align 16
+; CHECK-NEXT: ret <2 x double> %6
+
+define <4 x double> @fmul_binop_4xdouble_fast(<4 x double>, <4 x double>) {
+ %3 = fmul fast <4 x double> %0, %1
+ ret <4 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fmul_binop_4xdouble_fast(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %6 = fmul fast <2 x double> %1, %3
+; CHECK-NEXT: %7 = fmul fast <2 x double> %2, %4
+; CHECK-NEXT: store <2 x double> %7, <2 x double>* %0, align 16
+; CHECK-NEXT: ret <2 x double> %6
+
+define <4 x float> @fdiv_binop_4xfloat(<4 x float>, <4 x float>) {
+ %3 = fdiv <4 x float> %0, %1
+ ret <4 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fdiv_binop_4xfloat(<4 x float>, <4 x float>)
+; CHECK-NEXT: %3 = fdiv <4 x float> %0, %1
+; CHECK-NEXT: ret <4 x float> %3
+
+define <4 x float> @fdiv_binop_4xfloat_fast(<4 x float>, <4 x float>) {
+ %3 = fdiv fast <4 x float> %0, %1
+ ret <4 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fdiv_binop_4xfloat_fast(<4 x float>, <4 x float>)
+; CHECK-NEXT: %3 = fdiv fast <4 x float> %0, %1
+; CHECK-NEXT: ret <4 x float> %3
+
+define <4 x double> @fdiv_binop_4xdouble(<4 x double>, <4 x double>) {
+ %3 = fdiv <4 x double> %0, %1
+ ret <4 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fdiv_binop_4xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %6 = fdiv <2 x double> %1, %3
+; CHECK-NEXT: %7 = fdiv <2 x double> %2, %4
+; CHECK-NEXT: store <2 x double> %7, <2 x double>* %0, align 16
+; CHECK-NEXT: ret <2 x double> %6
+
+define <4 x double> @fdiv_binop_4xdouble_fast(<4 x double>, <4 x double>) {
+ %3 = fdiv fast <4 x double> %0, %1
+ ret <4 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fdiv_binop_4xdouble_fast(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %6 = fdiv fast <2 x double> %1, %3
+; CHECK-NEXT: %7 = fdiv fast <2 x double> %2, %4
+; CHECK-NEXT: store <2 x double> %7, <2 x double>* %0, align 16
+; CHECK-NEXT: ret <2 x double> %6
+
+define <4 x float> @frem_binop_4xfloat(<4 x float>, <4 x float>) {
+ %3 = frem <4 x float> %0, %1
+ ret <4 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @frem_binop_4xfloat(<4 x float>, <4 x float>)
+; CHECK-NEXT: %3 = frem <4 x float> %0, %1
+; CHECK-NEXT: ret <4 x float> %3
+
+define <4 x float> @frem_binop_4xfloat_fast(<4 x float>, <4 x float>) {
+ %3 = frem fast <4 x float> %0, %1
+ ret <4 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @frem_binop_4xfloat_fast(<4 x float>, <4 x float>)
+; CHECK-NEXT: %3 = frem fast <4 x float> %0, %1
+; CHECK-NEXT: ret <4 x float> %3
+
+define <4 x double> @frem_binop_4xdouble(<4 x double>, <4 x double>) {
+ %3 = frem <4 x double> %0, %1
+ ret <4 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @frem_binop_4xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %6 = frem <2 x double> %1, %3
+; CHECK-NEXT: %7 = frem <2 x double> %2, %4
+; CHECK-NEXT: store <2 x double> %7, <2 x double>* %0, align 16
+; CHECK-NEXT: ret <2 x double> %6
+
+define <4 x double> @frem_binop_4xdouble_fast(<4 x double>, <4 x double>) {
+ %3 = frem fast <4 x double> %0, %1
+ ret <4 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @frem_binop_4xdouble_fast(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %6 = frem fast <2 x double> %1, %3
+; CHECK-NEXT: %7 = frem fast <2 x double> %2, %4
+; CHECK-NEXT: store <2 x double> %7, <2 x double>* %0, align 16
+; CHECK-NEXT: ret <2 x double> %6
+
+define <6 x float> @fadd_binop_6xfloat(<6 x float>, <6 x float>) {
+ %3 = fadd <6 x float> %0, %1
+ ret <6 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fadd_binop_6xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %6 = fadd <4 x float> %1, %3
+; CHECK-NEXT: %7 = fadd <4 x float> %2, %4
+; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %6
+
+define <6 x float> @fadd_binop_6xfloat_fast(<6 x float>, <6 x float>) {
+ %3 = fadd fast <6 x float> %0, %1
+ ret <6 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fadd_binop_6xfloat_fast(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %6 = fadd fast <4 x float> %1, %3
+; CHECK-NEXT: %7 = fadd fast <4 x float> %2, %4
+; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %6
+
+define <6 x double> @fadd_binop_6xdouble(<6 x double>, <6 x double>) {
+ %3 = fadd <6 x double> %0, %1
+ ret <6 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fadd_binop_6xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %9 = fadd <2 x double> %2, %5
+; CHECK-NEXT: %10 = fadd <2 x double> %3, %6
+; CHECK-NEXT: %11 = fadd <2 x double> %4, %7
+; CHECK-NEXT: store <2 x double> %10, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %11, <2 x double>* %1, align 16
+; CHECK-NEXT: ret <2 x double> %9
+
+define <6 x double> @fadd_binop_6xdouble_fast(<6 x double>, <6 x double>) {
+ %3 = fadd fast <6 x double> %0, %1
+ ret <6 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fadd_binop_6xdouble_fast(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %9 = fadd fast <2 x double> %2, %5
+; CHECK-NEXT: %10 = fadd fast <2 x double> %3, %6
+; CHECK-NEXT: %11 = fadd fast <2 x double> %4, %7
+; CHECK-NEXT: store <2 x double> %10, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %11, <2 x double>* %1, align 16
+; CHECK-NEXT: ret <2 x double> %9
+
+define <6 x float> @fsub_binop_6xfloat(<6 x float>, <6 x float>) {
+ %3 = fsub <6 x float> %0, %1
+ ret <6 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fsub_binop_6xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %6 = fsub <4 x float> %1, %3
+; CHECK-NEXT: %7 = fsub <4 x float> %2, %4
+; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %6
+
+define <6 x float> @fsub_binop_6xfloat_fast(<6 x float>, <6 x float>) {
+ %3 = fsub fast <6 x float> %0, %1
+ ret <6 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fsub_binop_6xfloat_fast(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %6 = fsub fast <4 x float> %1, %3
+; CHECK-NEXT: %7 = fsub fast <4 x float> %2, %4
+; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %6
+
+define <6 x double> @fsub_binop_6xdouble(<6 x double>, <6 x double>) {
+ %3 = fsub <6 x double> %0, %1
+ ret <6 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fsub_binop_6xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %9 = fsub <2 x double> %2, %5
+; CHECK-NEXT: %10 = fsub <2 x double> %3, %6
+; CHECK-NEXT: %11 = fsub <2 x double> %4, %7
+; CHECK-NEXT: store <2 x double> %10, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %11, <2 x double>* %1, align 16
+; CHECK-NEXT: ret <2 x double> %9
+
+define <6 x double> @fsub_binop_6xdouble_fast(<6 x double>, <6 x double>) {
+ %3 = fsub fast <6 x double> %0, %1
+ ret <6 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fsub_binop_6xdouble_fast(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %9 = fsub fast <2 x double> %2, %5
+; CHECK-NEXT: %10 = fsub fast <2 x double> %3, %6
+; CHECK-NEXT: %11 = fsub fast <2 x double> %4, %7
+; CHECK-NEXT: store <2 x double> %10, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %11, <2 x double>* %1, align 16
+; CHECK-NEXT: ret <2 x double> %9
+
+define <6 x float> @fmul_binop_6xfloat(<6 x float>, <6 x float>) {
+ %3 = fmul <6 x float> %0, %1
+ ret <6 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fmul_binop_6xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %6 = fmul <4 x float> %1, %3
+; CHECK-NEXT: %7 = fmul <4 x float> %2, %4
+; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %6
+
+define <6 x float> @fmul_binop_6xfloat_fast(<6 x float>, <6 x float>) {
+ %3 = fmul fast <6 x float> %0, %1
+ ret <6 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fmul_binop_6xfloat_fast(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %6 = fmul fast <4 x float> %1, %3
+; CHECK-NEXT: %7 = fmul fast <4 x float> %2, %4
+; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %6
+
+define <6 x double> @fmul_binop_6xdouble(<6 x double>, <6 x double>) {
+ %3 = fmul <6 x double> %0, %1
+ ret <6 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fmul_binop_6xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %9 = fmul <2 x double> %2, %5
+; CHECK-NEXT: %10 = fmul <2 x double> %3, %6
+; CHECK-NEXT: %11 = fmul <2 x double> %4, %7
+; CHECK-NEXT: store <2 x double> %10, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %11, <2 x double>* %1, align 16
+; CHECK-NEXT: ret <2 x double> %9
+
+define <6 x double> @fmul_binop_6xdouble_fast(<6 x double>, <6 x double>) {
+ %3 = fmul fast <6 x double> %0, %1
+ ret <6 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fmul_binop_6xdouble_fast(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %9 = fmul fast <2 x double> %2, %5
+; CHECK-NEXT: %10 = fmul fast <2 x double> %3, %6
+; CHECK-NEXT: %11 = fmul fast <2 x double> %4, %7
+; CHECK-NEXT: store <2 x double> %10, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %11, <2 x double>* %1, align 16
+; CHECK-NEXT: ret <2 x double> %9
+
+define <6 x float> @fdiv_binop_6xfloat(<6 x float>, <6 x float>) {
+ %3 = fdiv <6 x float> %0, %1
+ ret <6 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fdiv_binop_6xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %6 = fdiv <4 x float> %1, %3
+; CHECK-NEXT: %7 = fdiv <4 x float> %2, %4
+; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %6
+
+define <6 x float> @fdiv_binop_6xfloat_fast(<6 x float>, <6 x float>) {
+ %3 = fdiv fast <6 x float> %0, %1
+ ret <6 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fdiv_binop_6xfloat_fast(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %6 = fdiv fast <4 x float> %1, %3
+; CHECK-NEXT: %7 = fdiv fast <4 x float> %2, %4
+; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %6
+
+define <6 x double> @fdiv_binop_6xdouble(<6 x double>, <6 x double>) {
+ %3 = fdiv <6 x double> %0, %1
+ ret <6 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fdiv_binop_6xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %9 = fdiv <2 x double> %2, %5
+; CHECK-NEXT: %10 = fdiv <2 x double> %3, %6
+; CHECK-NEXT: %11 = fdiv <2 x double> %4, %7
+; CHECK-NEXT: store <2 x double> %10, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %11, <2 x double>* %1, align 16
+; CHECK-NEXT: ret <2 x double> %9
+
+define <6 x double> @fdiv_binop_6xdouble_fast(<6 x double>, <6 x double>) {
+ %3 = fdiv fast <6 x double> %0, %1
+ ret <6 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fdiv_binop_6xdouble_fast(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %9 = fdiv fast <2 x double> %2, %5
+; CHECK-NEXT: %10 = fdiv fast <2 x double> %3, %6
+; CHECK-NEXT: %11 = fdiv fast <2 x double> %4, %7
+; CHECK-NEXT: store <2 x double> %10, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %11, <2 x double>* %1, align 16
+; CHECK-NEXT: ret <2 x double> %9
+
+define <6 x float> @frem_binop_6xfloat(<6 x float>, <6 x float>) {
+ %3 = frem <6 x float> %0, %1
+ ret <6 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @frem_binop_6xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %6 = frem <4 x float> %1, %3
+; CHECK-NEXT: %7 = frem <4 x float> %2, %4
+; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %6
+
+define <6 x float> @frem_binop_6xfloat_fast(<6 x float>, <6 x float>) {
+ %3 = frem fast <6 x float> %0, %1
+ ret <6 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @frem_binop_6xfloat_fast(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %6 = frem fast <4 x float> %1, %3
+; CHECK-NEXT: %7 = frem fast <4 x float> %2, %4
+; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %6
+
+define <6 x double> @frem_binop_6xdouble(<6 x double>, <6 x double>) {
+ %3 = frem <6 x double> %0, %1
+ ret <6 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @frem_binop_6xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %9 = frem <2 x double> %2, %5
+; CHECK-NEXT: %10 = frem <2 x double> %3, %6
+; CHECK-NEXT: %11 = frem <2 x double> %4, %7
+; CHECK-NEXT: store <2 x double> %10, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %11, <2 x double>* %1, align 16
+; CHECK-NEXT: ret <2 x double> %9
+
+define <6 x double> @frem_binop_6xdouble_fast(<6 x double>, <6 x double>) {
+ %3 = frem fast <6 x double> %0, %1
+ ret <6 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @frem_binop_6xdouble_fast(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %9 = frem fast <2 x double> %2, %5
+; CHECK-NEXT: %10 = frem fast <2 x double> %3, %6
+; CHECK-NEXT: %11 = frem fast <2 x double> %4, %7
+; CHECK-NEXT: store <2 x double> %10, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %11, <2 x double>* %1, align 16
+; CHECK-NEXT: ret <2 x double> %9
+
+define <8 x float> @fadd_binop_8xfloat(<8 x float>, <8 x float>) {
+ %3 = fadd <8 x float> %0, %1
+ ret <8 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fadd_binop_8xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %6 = fadd <4 x float> %1, %3
+; CHECK-NEXT: %7 = fadd <4 x float> %2, %4
+; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %6
+
+define <8 x float> @fadd_binop_8xfloat_fast(<8 x float>, <8 x float>) {
+ %3 = fadd fast <8 x float> %0, %1
+ ret <8 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fadd_binop_8xfloat_fast(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %6 = fadd fast <4 x float> %1, %3
+; CHECK-NEXT: %7 = fadd fast <4 x float> %2, %4
+; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %6
+
+define <8 x double> @fadd_binop_8xdouble(<8 x double>, <8 x double>) {
+ %3 = fadd <8 x double> %0, %1
+ ret <8 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fadd_binop_8xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %12 = fadd <2 x double> %3, %7
+; CHECK-NEXT: %13 = fadd <2 x double> %4, %8
+; CHECK-NEXT: %14 = fadd <2 x double> %5, %9
+; CHECK-NEXT: %15 = fadd <2 x double> %6, %10
+; CHECK-NEXT: store <2 x double> %13, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %14, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %15, <2 x double>* %2, align 16
+; CHECK-NEXT: ret <2 x double> %12
+
+define <8 x double> @fadd_binop_8xdouble_fast(<8 x double>, <8 x double>) {
+ %3 = fadd fast <8 x double> %0, %1
+ ret <8 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fadd_binop_8xdouble_fast(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %12 = fadd fast <2 x double> %3, %7
+; CHECK-NEXT: %13 = fadd fast <2 x double> %4, %8
+; CHECK-NEXT: %14 = fadd fast <2 x double> %5, %9
+; CHECK-NEXT: %15 = fadd fast <2 x double> %6, %10
+; CHECK-NEXT: store <2 x double> %13, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %14, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %15, <2 x double>* %2, align 16
+; CHECK-NEXT: ret <2 x double> %12
+
+define <8 x float> @fsub_binop_8xfloat(<8 x float>, <8 x float>) {
+ %3 = fsub <8 x float> %0, %1
+ ret <8 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fsub_binop_8xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %6 = fsub <4 x float> %1, %3
+; CHECK-NEXT: %7 = fsub <4 x float> %2, %4
+; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %6
+
+define <8 x float> @fsub_binop_8xfloat_fast(<8 x float>, <8 x float>) {
+ %3 = fsub fast <8 x float> %0, %1
+ ret <8 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fsub_binop_8xfloat_fast(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %6 = fsub fast <4 x float> %1, %3
+; CHECK-NEXT: %7 = fsub fast <4 x float> %2, %4
+; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %6
+
+define <8 x double> @fsub_binop_8xdouble(<8 x double>, <8 x double>) {
+ %3 = fsub <8 x double> %0, %1
+ ret <8 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fsub_binop_8xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %12 = fsub <2 x double> %3, %7
+; CHECK-NEXT: %13 = fsub <2 x double> %4, %8
+; CHECK-NEXT: %14 = fsub <2 x double> %5, %9
+; CHECK-NEXT: %15 = fsub <2 x double> %6, %10
+; CHECK-NEXT: store <2 x double> %13, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %14, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %15, <2 x double>* %2, align 16
+; CHECK-NEXT: ret <2 x double> %12
+
+define <8 x double> @fsub_binop_8xdouble_fast(<8 x double>, <8 x double>) {
+ %3 = fsub fast <8 x double> %0, %1
+ ret <8 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fsub_binop_8xdouble_fast(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %12 = fsub fast <2 x double> %3, %7
+; CHECK-NEXT: %13 = fsub fast <2 x double> %4, %8
+; CHECK-NEXT: %14 = fsub fast <2 x double> %5, %9
+; CHECK-NEXT: %15 = fsub fast <2 x double> %6, %10
+; CHECK-NEXT: store <2 x double> %13, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %14, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %15, <2 x double>* %2, align 16
+; CHECK-NEXT: ret <2 x double> %12
+
+define <8 x float> @fmul_binop_8xfloat(<8 x float>, <8 x float>) {
+ %3 = fmul <8 x float> %0, %1
+ ret <8 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fmul_binop_8xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %6 = fmul <4 x float> %1, %3
+; CHECK-NEXT: %7 = fmul <4 x float> %2, %4
+; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %6
+
+define <8 x float> @fmul_binop_8xfloat_fast(<8 x float>, <8 x float>) {
+ %3 = fmul fast <8 x float> %0, %1
+ ret <8 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fmul_binop_8xfloat_fast(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %6 = fmul fast <4 x float> %1, %3
+; CHECK-NEXT: %7 = fmul fast <4 x float> %2, %4
+; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %6
+
+define <8 x double> @fmul_binop_8xdouble(<8 x double>, <8 x double>) {
+ %3 = fmul <8 x double> %0, %1
+ ret <8 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fmul_binop_8xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %12 = fmul <2 x double> %3, %7
+; CHECK-NEXT: %13 = fmul <2 x double> %4, %8
+; CHECK-NEXT: %14 = fmul <2 x double> %5, %9
+; CHECK-NEXT: %15 = fmul <2 x double> %6, %10
+; CHECK-NEXT: store <2 x double> %13, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %14, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %15, <2 x double>* %2, align 16
+; CHECK-NEXT: ret <2 x double> %12
+
+define <8 x double> @fmul_binop_8xdouble_fast(<8 x double>, <8 x double>) {
+ %3 = fmul fast <8 x double> %0, %1
+ ret <8 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fmul_binop_8xdouble_fast(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %12 = fmul fast <2 x double> %3, %7
+; CHECK-NEXT: %13 = fmul fast <2 x double> %4, %8
+; CHECK-NEXT: %14 = fmul fast <2 x double> %5, %9
+; CHECK-NEXT: %15 = fmul fast <2 x double> %6, %10
+; CHECK-NEXT: store <2 x double> %13, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %14, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %15, <2 x double>* %2, align 16
+; CHECK-NEXT: ret <2 x double> %12
+
+define <8 x float> @fdiv_binop_8xfloat(<8 x float>, <8 x float>) {
+ %3 = fdiv <8 x float> %0, %1
+ ret <8 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fdiv_binop_8xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %6 = fdiv <4 x float> %1, %3
+; CHECK-NEXT: %7 = fdiv <4 x float> %2, %4
+; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %6
+
+define <8 x float> @fdiv_binop_8xfloat_fast(<8 x float>, <8 x float>) {
+ %3 = fdiv fast <8 x float> %0, %1
+ ret <8 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fdiv_binop_8xfloat_fast(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %6 = fdiv fast <4 x float> %1, %3
+; CHECK-NEXT: %7 = fdiv fast <4 x float> %2, %4
+; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %6
+
+define <8 x double> @fdiv_binop_8xdouble(<8 x double>, <8 x double>) {
+ %3 = fdiv <8 x double> %0, %1
+ ret <8 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fdiv_binop_8xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %12 = fdiv <2 x double> %3, %7
+; CHECK-NEXT: %13 = fdiv <2 x double> %4, %8
+; CHECK-NEXT: %14 = fdiv <2 x double> %5, %9
+; CHECK-NEXT: %15 = fdiv <2 x double> %6, %10
+; CHECK-NEXT: store <2 x double> %13, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %14, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %15, <2 x double>* %2, align 16
+; CHECK-NEXT: ret <2 x double> %12
+
+define <8 x double> @fdiv_binop_8xdouble_fast(<8 x double>, <8 x double>) {
+ %3 = fdiv fast <8 x double> %0, %1
+ ret <8 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fdiv_binop_8xdouble_fast(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %12 = fdiv fast <2 x double> %3, %7
+; CHECK-NEXT: %13 = fdiv fast <2 x double> %4, %8
+; CHECK-NEXT: %14 = fdiv fast <2 x double> %5, %9
+; CHECK-NEXT: %15 = fdiv fast <2 x double> %6, %10
+; CHECK-NEXT: store <2 x double> %13, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %14, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %15, <2 x double>* %2, align 16
+; CHECK-NEXT: ret <2 x double> %12
+
+define <8 x float> @frem_binop_8xfloat(<8 x float>, <8 x float>) {
+ %3 = frem <8 x float> %0, %1
+ ret <8 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @frem_binop_8xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %6 = frem <4 x float> %1, %3
+; CHECK-NEXT: %7 = frem <4 x float> %2, %4
+; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %6
+
+define <8 x float> @frem_binop_8xfloat_fast(<8 x float>, <8 x float>) {
+ %3 = frem fast <8 x float> %0, %1
+ ret <8 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @frem_binop_8xfloat_fast(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %6 = frem fast <4 x float> %1, %3
+; CHECK-NEXT: %7 = frem fast <4 x float> %2, %4
+; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16
+; CHECK-NEXT: ret <4 x float> %6
+
+define <8 x double> @frem_binop_8xdouble(<8 x double>, <8 x double>) {
+ %3 = frem <8 x double> %0, %1
+ ret <8 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @frem_binop_8xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %12 = frem <2 x double> %3, %7
+; CHECK-NEXT: %13 = frem <2 x double> %4, %8
+; CHECK-NEXT: %14 = frem <2 x double> %5, %9
+; CHECK-NEXT: %15 = frem <2 x double> %6, %10
+; CHECK-NEXT: store <2 x double> %13, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %14, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %15, <2 x double>* %2, align 16
+; CHECK-NEXT: ret <2 x double> %12
+
+define <8 x double> @frem_binop_8xdouble_fast(<8 x double>, <8 x double>) {
+ %3 = frem fast <8 x double> %0, %1
+ ret <8 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @frem_binop_8xdouble_fast(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %12 = frem fast <2 x double> %3, %7
+; CHECK-NEXT: %13 = frem fast <2 x double> %4, %8
+; CHECK-NEXT: %14 = frem fast <2 x double> %5, %9
+; CHECK-NEXT: %15 = frem fast <2 x double> %6, %10
+; CHECK-NEXT: store <2 x double> %13, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %14, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %15, <2 x double>* %2, align 16
+; CHECK-NEXT: ret <2 x double> %12
+
+define <12 x float> @fadd_binop_12xfloat(<12 x float>, <12 x float>) {
+ %3 = fadd <12 x float> %0, %1
+ ret <12 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fadd_binop_12xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %9 = fadd <4 x float> %2, %5
+; CHECK-NEXT: %10 = fadd <4 x float> %3, %6
+; CHECK-NEXT: %11 = fadd <4 x float> %4, %7
+; CHECK-NEXT: store <4 x float> %10, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %11, <4 x float>* %1, align 16
+; CHECK-NEXT: ret <4 x float> %9
+
+define <12 x float> @fadd_binop_12xfloat_fast(<12 x float>, <12 x float>) {
+ %3 = fadd fast <12 x float> %0, %1
+ ret <12 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fadd_binop_12xfloat_fast(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %9 = fadd fast <4 x float> %2, %5
+; CHECK-NEXT: %10 = fadd fast <4 x float> %3, %6
+; CHECK-NEXT: %11 = fadd fast <4 x float> %4, %7
+; CHECK-NEXT: store <4 x float> %10, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %11, <4 x float>* %1, align 16
+; CHECK-NEXT: ret <4 x float> %9
+
+define <12 x double> @fadd_binop_12xdouble(<12 x double>, <12 x double>) {
+ %3 = fadd <12 x double> %0, %1
+ ret <12 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fadd_binop_12xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %18 = fadd <2 x double> %5, %11
+; CHECK-NEXT: %19 = fadd <2 x double> %6, %12
+; CHECK-NEXT: %20 = fadd <2 x double> %7, %13
+; CHECK-NEXT: %21 = fadd <2 x double> %8, %14
+; CHECK-NEXT: %22 = fadd <2 x double> %9, %15
+; CHECK-NEXT: %23 = fadd <2 x double> %10, %16
+; CHECK-NEXT: store <2 x double> %19, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %20, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %21, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %22, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %23, <2 x double>* %4, align 16
+; CHECK-NEXT: ret <2 x double> %18
+
+define <12 x double> @fadd_binop_12xdouble_fast(<12 x double>, <12 x double>) {
+ %3 = fadd fast <12 x double> %0, %1
+ ret <12 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fadd_binop_12xdouble_fast(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %18 = fadd fast <2 x double> %5, %11
+; CHECK-NEXT: %19 = fadd fast <2 x double> %6, %12
+; CHECK-NEXT: %20 = fadd fast <2 x double> %7, %13
+; CHECK-NEXT: %21 = fadd fast <2 x double> %8, %14
+; CHECK-NEXT: %22 = fadd fast <2 x double> %9, %15
+; CHECK-NEXT: %23 = fadd fast <2 x double> %10, %16
+; CHECK-NEXT: store <2 x double> %19, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %20, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %21, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %22, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %23, <2 x double>* %4, align 16
+; CHECK-NEXT: ret <2 x double> %18
+
+define <12 x float> @fsub_binop_12xfloat(<12 x float>, <12 x float>) {
+ %3 = fsub <12 x float> %0, %1
+ ret <12 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fsub_binop_12xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %9 = fsub <4 x float> %2, %5
+; CHECK-NEXT: %10 = fsub <4 x float> %3, %6
+; CHECK-NEXT: %11 = fsub <4 x float> %4, %7
+; CHECK-NEXT: store <4 x float> %10, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %11, <4 x float>* %1, align 16
+; CHECK-NEXT: ret <4 x float> %9
+
+define <12 x float> @fsub_binop_12xfloat_fast(<12 x float>, <12 x float>) {
+ %3 = fsub fast <12 x float> %0, %1
+ ret <12 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fsub_binop_12xfloat_fast(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %9 = fsub fast <4 x float> %2, %5
+; CHECK-NEXT: %10 = fsub fast <4 x float> %3, %6
+; CHECK-NEXT: %11 = fsub fast <4 x float> %4, %7
+; CHECK-NEXT: store <4 x float> %10, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %11, <4 x float>* %1, align 16
+; CHECK-NEXT: ret <4 x float> %9
+
+define <12 x double> @fsub_binop_12xdouble(<12 x double>, <12 x double>) {
+ %3 = fsub <12 x double> %0, %1
+ ret <12 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fsub_binop_12xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %18 = fsub <2 x double> %5, %11
+; CHECK-NEXT: %19 = fsub <2 x double> %6, %12
+; CHECK-NEXT: %20 = fsub <2 x double> %7, %13
+; CHECK-NEXT: %21 = fsub <2 x double> %8, %14
+; CHECK-NEXT: %22 = fsub <2 x double> %9, %15
+; CHECK-NEXT: %23 = fsub <2 x double> %10, %16
+; CHECK-NEXT: store <2 x double> %19, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %20, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %21, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %22, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %23, <2 x double>* %4, align 16
+; CHECK-NEXT: ret <2 x double> %18
+
+define <12 x double> @fsub_binop_12xdouble_fast(<12 x double>, <12 x double>) {
+ %3 = fsub fast <12 x double> %0, %1
+ ret <12 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fsub_binop_12xdouble_fast(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %18 = fsub fast <2 x double> %5, %11
+; CHECK-NEXT: %19 = fsub fast <2 x double> %6, %12
+; CHECK-NEXT: %20 = fsub fast <2 x double> %7, %13
+; CHECK-NEXT: %21 = fsub fast <2 x double> %8, %14
+; CHECK-NEXT: %22 = fsub fast <2 x double> %9, %15
+; CHECK-NEXT: %23 = fsub fast <2 x double> %10, %16
+; CHECK-NEXT: store <2 x double> %19, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %20, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %21, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %22, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %23, <2 x double>* %4, align 16
+; CHECK-NEXT: ret <2 x double> %18
+
+define <12 x float> @fmul_binop_12xfloat(<12 x float>, <12 x float>) {
+ %3 = fmul <12 x float> %0, %1
+ ret <12 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fmul_binop_12xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %9 = fmul <4 x float> %2, %5
+; CHECK-NEXT: %10 = fmul <4 x float> %3, %6
+; CHECK-NEXT: %11 = fmul <4 x float> %4, %7
+; CHECK-NEXT: store <4 x float> %10, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %11, <4 x float>* %1, align 16
+; CHECK-NEXT: ret <4 x float> %9
+
+define <12 x float> @fmul_binop_12xfloat_fast(<12 x float>, <12 x float>) {
+ %3 = fmul fast <12 x float> %0, %1
+ ret <12 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fmul_binop_12xfloat_fast(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %9 = fmul fast <4 x float> %2, %5
+; CHECK-NEXT: %10 = fmul fast <4 x float> %3, %6
+; CHECK-NEXT: %11 = fmul fast <4 x float> %4, %7
+; CHECK-NEXT: store <4 x float> %10, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %11, <4 x float>* %1, align 16
+; CHECK-NEXT: ret <4 x float> %9
+
+define <12 x double> @fmul_binop_12xdouble(<12 x double>, <12 x double>) {
+ %3 = fmul <12 x double> %0, %1
+ ret <12 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fmul_binop_12xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %18 = fmul <2 x double> %5, %11
+; CHECK-NEXT: %19 = fmul <2 x double> %6, %12
+; CHECK-NEXT: %20 = fmul <2 x double> %7, %13
+; CHECK-NEXT: %21 = fmul <2 x double> %8, %14
+; CHECK-NEXT: %22 = fmul <2 x double> %9, %15
+; CHECK-NEXT: %23 = fmul <2 x double> %10, %16
+; CHECK-NEXT: store <2 x double> %19, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %20, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %21, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %22, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %23, <2 x double>* %4, align 16
+; CHECK-NEXT: ret <2 x double> %18
+
+define <12 x double> @fmul_binop_12xdouble_fast(<12 x double>, <12 x double>) {
+ %3 = fmul fast <12 x double> %0, %1
+ ret <12 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fmul_binop_12xdouble_fast(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %18 = fmul fast <2 x double> %5, %11
+; CHECK-NEXT: %19 = fmul fast <2 x double> %6, %12
+; CHECK-NEXT: %20 = fmul fast <2 x double> %7, %13
+; CHECK-NEXT: %21 = fmul fast <2 x double> %8, %14
+; CHECK-NEXT: %22 = fmul fast <2 x double> %9, %15
+; CHECK-NEXT: %23 = fmul fast <2 x double> %10, %16
+; CHECK-NEXT: store <2 x double> %19, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %20, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %21, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %22, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %23, <2 x double>* %4, align 16
+; CHECK-NEXT: ret <2 x double> %18
+
+define <12 x float> @fdiv_binop_12xfloat(<12 x float>, <12 x float>) {
+ %3 = fdiv <12 x float> %0, %1
+ ret <12 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fdiv_binop_12xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %9 = fdiv <4 x float> %2, %5
+; CHECK-NEXT: %10 = fdiv <4 x float> %3, %6
+; CHECK-NEXT: %11 = fdiv <4 x float> %4, %7
+; CHECK-NEXT: store <4 x float> %10, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %11, <4 x float>* %1, align 16
+; CHECK-NEXT: ret <4 x float> %9
+
+define <12 x float> @fdiv_binop_12xfloat_fast(<12 x float>, <12 x float>) {
+ %3 = fdiv fast <12 x float> %0, %1
+ ret <12 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fdiv_binop_12xfloat_fast(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %9 = fdiv fast <4 x float> %2, %5
+; CHECK-NEXT: %10 = fdiv fast <4 x float> %3, %6
+; CHECK-NEXT: %11 = fdiv fast <4 x float> %4, %7
+; CHECK-NEXT: store <4 x float> %10, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %11, <4 x float>* %1, align 16
+; CHECK-NEXT: ret <4 x float> %9
+
+define <12 x double> @fdiv_binop_12xdouble(<12 x double>, <12 x double>) {
+ %3 = fdiv <12 x double> %0, %1
+ ret <12 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fdiv_binop_12xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %18 = fdiv <2 x double> %5, %11
+; CHECK-NEXT: %19 = fdiv <2 x double> %6, %12
+; CHECK-NEXT: %20 = fdiv <2 x double> %7, %13
+; CHECK-NEXT: %21 = fdiv <2 x double> %8, %14
+; CHECK-NEXT: %22 = fdiv <2 x double> %9, %15
+; CHECK-NEXT: %23 = fdiv <2 x double> %10, %16
+; CHECK-NEXT: store <2 x double> %19, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %20, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %21, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %22, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %23, <2 x double>* %4, align 16
+; CHECK-NEXT: ret <2 x double> %18
+
+define <12 x double> @fdiv_binop_12xdouble_fast(<12 x double>, <12 x double>) {
+ %3 = fdiv fast <12 x double> %0, %1
+ ret <12 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fdiv_binop_12xdouble_fast(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %18 = fdiv fast <2 x double> %5, %11
+; CHECK-NEXT: %19 = fdiv fast <2 x double> %6, %12
+; CHECK-NEXT: %20 = fdiv fast <2 x double> %7, %13
+; CHECK-NEXT: %21 = fdiv fast <2 x double> %8, %14
+; CHECK-NEXT: %22 = fdiv fast <2 x double> %9, %15
+; CHECK-NEXT: %23 = fdiv fast <2 x double> %10, %16
+; CHECK-NEXT: store <2 x double> %19, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %20, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %21, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %22, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %23, <2 x double>* %4, align 16
+; CHECK-NEXT: ret <2 x double> %18
+
+define <12 x float> @frem_binop_12xfloat(<12 x float>, <12 x float>) {
+ %3 = frem <12 x float> %0, %1
+ ret <12 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @frem_binop_12xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %9 = frem <4 x float> %2, %5
+; CHECK-NEXT: %10 = frem <4 x float> %3, %6
+; CHECK-NEXT: %11 = frem <4 x float> %4, %7
+; CHECK-NEXT: store <4 x float> %10, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %11, <4 x float>* %1, align 16
+; CHECK-NEXT: ret <4 x float> %9
+
+define <12 x float> @frem_binop_12xfloat_fast(<12 x float>, <12 x float>) {
+ %3 = frem fast <12 x float> %0, %1
+ ret <12 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @frem_binop_12xfloat_fast(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %9 = frem fast <4 x float> %2, %5
+; CHECK-NEXT: %10 = frem fast <4 x float> %3, %6
+; CHECK-NEXT: %11 = frem fast <4 x float> %4, %7
+; CHECK-NEXT: store <4 x float> %10, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %11, <4 x float>* %1, align 16
+; CHECK-NEXT: ret <4 x float> %9
+
+define <12 x double> @frem_binop_12xdouble(<12 x double>, <12 x double>) {
+ %3 = frem <12 x double> %0, %1
+ ret <12 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @frem_binop_12xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %18 = frem <2 x double> %5, %11
+; CHECK-NEXT: %19 = frem <2 x double> %6, %12
+; CHECK-NEXT: %20 = frem <2 x double> %7, %13
+; CHECK-NEXT: %21 = frem <2 x double> %8, %14
+; CHECK-NEXT: %22 = frem <2 x double> %9, %15
+; CHECK-NEXT: %23 = frem <2 x double> %10, %16
+; CHECK-NEXT: store <2 x double> %19, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %20, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %21, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %22, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %23, <2 x double>* %4, align 16
+; CHECK-NEXT: ret <2 x double> %18
+
+define <12 x double> @frem_binop_12xdouble_fast(<12 x double>, <12 x double>) {
+ %3 = frem fast <12 x double> %0, %1
+ ret <12 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @frem_binop_12xdouble_fast(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %18 = frem fast <2 x double> %5, %11
+; CHECK-NEXT: %19 = frem fast <2 x double> %6, %12
+; CHECK-NEXT: %20 = frem fast <2 x double> %7, %13
+; CHECK-NEXT: %21 = frem fast <2 x double> %8, %14
+; CHECK-NEXT: %22 = frem fast <2 x double> %9, %15
+; CHECK-NEXT: %23 = frem fast <2 x double> %10, %16
+; CHECK-NEXT: store <2 x double> %19, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %20, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %21, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %22, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %23, <2 x double>* %4, align 16
+; CHECK-NEXT: ret <2 x double> %18
+
+define <16 x float> @fadd_binop_16xfloat(<16 x float>, <16 x float>) {
+ %3 = fadd <16 x float> %0, %1
+ ret <16 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fadd_binop_16xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %12 = fadd <4 x float> %3, %7
+; CHECK-NEXT: %13 = fadd <4 x float> %4, %8
+; CHECK-NEXT: %14 = fadd <4 x float> %5, %9
+; CHECK-NEXT: %15 = fadd <4 x float> %6, %10
+; CHECK-NEXT: store <4 x float> %13, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %14, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %15, <4 x float>* %2, align 16
+; CHECK-NEXT: ret <4 x float> %12
+
+define <16 x float> @fadd_binop_16xfloat_fast(<16 x float>, <16 x float>) {
+ %3 = fadd fast <16 x float> %0, %1
+ ret <16 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fadd_binop_16xfloat_fast(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %12 = fadd fast <4 x float> %3, %7
+; CHECK-NEXT: %13 = fadd fast <4 x float> %4, %8
+; CHECK-NEXT: %14 = fadd fast <4 x float> %5, %9
+; CHECK-NEXT: %15 = fadd fast <4 x float> %6, %10
+; CHECK-NEXT: store <4 x float> %13, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %14, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %15, <4 x float>* %2, align 16
+; CHECK-NEXT: ret <4 x float> %12
+
+define <16 x double> @fadd_binop_16xdouble(<16 x double>, <16 x double>) {
+ %3 = fadd <16 x double> %0, %1
+ ret <16 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fadd_binop_16xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %24 = fadd <2 x double> %7, %15
+; CHECK-NEXT: %25 = fadd <2 x double> %8, %16
+; CHECK-NEXT: %26 = fadd <2 x double> %9, %17
+; CHECK-NEXT: %27 = fadd <2 x double> %10, %18
+; CHECK-NEXT: %28 = fadd <2 x double> %11, %19
+; CHECK-NEXT: %29 = fadd <2 x double> %12, %20
+; CHECK-NEXT: %30 = fadd <2 x double> %13, %21
+; CHECK-NEXT: %31 = fadd <2 x double> %14, %22
+; CHECK-NEXT: store <2 x double> %25, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %26, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %27, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %28, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %29, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %30, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %31, <2 x double>* %6, align 16
+; CHECK-NEXT: ret <2 x double> %24
+
+define <16 x double> @fadd_binop_16xdouble_fast(<16 x double>, <16 x double>) {
+ %3 = fadd fast <16 x double> %0, %1
+ ret <16 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fadd_binop_16xdouble_fast(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %24 = fadd fast <2 x double> %7, %15
+; CHECK-NEXT: %25 = fadd fast <2 x double> %8, %16
+; CHECK-NEXT: %26 = fadd fast <2 x double> %9, %17
+; CHECK-NEXT: %27 = fadd fast <2 x double> %10, %18
+; CHECK-NEXT: %28 = fadd fast <2 x double> %11, %19
+; CHECK-NEXT: %29 = fadd fast <2 x double> %12, %20
+; CHECK-NEXT: %30 = fadd fast <2 x double> %13, %21
+; CHECK-NEXT: %31 = fadd fast <2 x double> %14, %22
+; CHECK-NEXT: store <2 x double> %25, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %26, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %27, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %28, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %29, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %30, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %31, <2 x double>* %6, align 16
+; CHECK-NEXT: ret <2 x double> %24
+
+define <16 x float> @fsub_binop_16xfloat(<16 x float>, <16 x float>) {
+ %3 = fsub <16 x float> %0, %1
+ ret <16 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fsub_binop_16xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %12 = fsub <4 x float> %3, %7
+; CHECK-NEXT: %13 = fsub <4 x float> %4, %8
+; CHECK-NEXT: %14 = fsub <4 x float> %5, %9
+; CHECK-NEXT: %15 = fsub <4 x float> %6, %10
+; CHECK-NEXT: store <4 x float> %13, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %14, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %15, <4 x float>* %2, align 16
+; CHECK-NEXT: ret <4 x float> %12
+
+define <16 x float> @fsub_binop_16xfloat_fast(<16 x float>, <16 x float>) {
+ %3 = fsub fast <16 x float> %0, %1
+ ret <16 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fsub_binop_16xfloat_fast(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %12 = fsub fast <4 x float> %3, %7
+; CHECK-NEXT: %13 = fsub fast <4 x float> %4, %8
+; CHECK-NEXT: %14 = fsub fast <4 x float> %5, %9
+; CHECK-NEXT: %15 = fsub fast <4 x float> %6, %10
+; CHECK-NEXT: store <4 x float> %13, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %14, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %15, <4 x float>* %2, align 16
+; CHECK-NEXT: ret <4 x float> %12
+
+define <16 x double> @fsub_binop_16xdouble(<16 x double>, <16 x double>) {
+ %3 = fsub <16 x double> %0, %1
+ ret <16 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fsub_binop_16xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %24 = fsub <2 x double> %7, %15
+; CHECK-NEXT: %25 = fsub <2 x double> %8, %16
+; CHECK-NEXT: %26 = fsub <2 x double> %9, %17
+; CHECK-NEXT: %27 = fsub <2 x double> %10, %18
+; CHECK-NEXT: %28 = fsub <2 x double> %11, %19
+; CHECK-NEXT: %29 = fsub <2 x double> %12, %20
+; CHECK-NEXT: %30 = fsub <2 x double> %13, %21
+; CHECK-NEXT: %31 = fsub <2 x double> %14, %22
+; CHECK-NEXT: store <2 x double> %25, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %26, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %27, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %28, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %29, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %30, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %31, <2 x double>* %6, align 16
+; CHECK-NEXT: ret <2 x double> %24
+
+define <16 x double> @fsub_binop_16xdouble_fast(<16 x double>, <16 x double>) {
+ %3 = fsub fast <16 x double> %0, %1
+ ret <16 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fsub_binop_16xdouble_fast(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %24 = fsub fast <2 x double> %7, %15
+; CHECK-NEXT: %25 = fsub fast <2 x double> %8, %16
+; CHECK-NEXT: %26 = fsub fast <2 x double> %9, %17
+; CHECK-NEXT: %27 = fsub fast <2 x double> %10, %18
+; CHECK-NEXT: %28 = fsub fast <2 x double> %11, %19
+; CHECK-NEXT: %29 = fsub fast <2 x double> %12, %20
+; CHECK-NEXT: %30 = fsub fast <2 x double> %13, %21
+; CHECK-NEXT: %31 = fsub fast <2 x double> %14, %22
+; CHECK-NEXT: store <2 x double> %25, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %26, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %27, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %28, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %29, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %30, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %31, <2 x double>* %6, align 16
+; CHECK-NEXT: ret <2 x double> %24
+
+define <16 x float> @fmul_binop_16xfloat(<16 x float>, <16 x float>) {
+ %3 = fmul <16 x float> %0, %1
+ ret <16 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fmul_binop_16xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %12 = fmul <4 x float> %3, %7
+; CHECK-NEXT: %13 = fmul <4 x float> %4, %8
+; CHECK-NEXT: %14 = fmul <4 x float> %5, %9
+; CHECK-NEXT: %15 = fmul <4 x float> %6, %10
+; CHECK-NEXT: store <4 x float> %13, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %14, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %15, <4 x float>* %2, align 16
+; CHECK-NEXT: ret <4 x float> %12
+
+define <16 x float> @fmul_binop_16xfloat_fast(<16 x float>, <16 x float>) {
+ %3 = fmul fast <16 x float> %0, %1
+ ret <16 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fmul_binop_16xfloat_fast(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %12 = fmul fast <4 x float> %3, %7
+; CHECK-NEXT: %13 = fmul fast <4 x float> %4, %8
+; CHECK-NEXT: %14 = fmul fast <4 x float> %5, %9
+; CHECK-NEXT: %15 = fmul fast <4 x float> %6, %10
+; CHECK-NEXT: store <4 x float> %13, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %14, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %15, <4 x float>* %2, align 16
+; CHECK-NEXT: ret <4 x float> %12
+
+define <16 x double> @fmul_binop_16xdouble(<16 x double>, <16 x double>) {
+ %3 = fmul <16 x double> %0, %1
+ ret <16 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fmul_binop_16xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %24 = fmul <2 x double> %7, %15
+; CHECK-NEXT: %25 = fmul <2 x double> %8, %16
+; CHECK-NEXT: %26 = fmul <2 x double> %9, %17
+; CHECK-NEXT: %27 = fmul <2 x double> %10, %18
+; CHECK-NEXT: %28 = fmul <2 x double> %11, %19
+; CHECK-NEXT: %29 = fmul <2 x double> %12, %20
+; CHECK-NEXT: %30 = fmul <2 x double> %13, %21
+; CHECK-NEXT: %31 = fmul <2 x double> %14, %22
+; CHECK-NEXT: store <2 x double> %25, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %26, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %27, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %28, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %29, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %30, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %31, <2 x double>* %6, align 16
+; CHECK-NEXT: ret <2 x double> %24
+
+define <16 x double> @fmul_binop_16xdouble_fast(<16 x double>, <16 x double>) {
+ %3 = fmul fast <16 x double> %0, %1
+ ret <16 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fmul_binop_16xdouble_fast(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %24 = fmul fast <2 x double> %7, %15
+; CHECK-NEXT: %25 = fmul fast <2 x double> %8, %16
+; CHECK-NEXT: %26 = fmul fast <2 x double> %9, %17
+; CHECK-NEXT: %27 = fmul fast <2 x double> %10, %18
+; CHECK-NEXT: %28 = fmul fast <2 x double> %11, %19
+; CHECK-NEXT: %29 = fmul fast <2 x double> %12, %20
+; CHECK-NEXT: %30 = fmul fast <2 x double> %13, %21
+; CHECK-NEXT: %31 = fmul fast <2 x double> %14, %22
+; CHECK-NEXT: store <2 x double> %25, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %26, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %27, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %28, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %29, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %30, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %31, <2 x double>* %6, align 16
+; CHECK-NEXT: ret <2 x double> %24
+
+define <16 x float> @fdiv_binop_16xfloat(<16 x float>, <16 x float>) {
+ %3 = fdiv <16 x float> %0, %1
+ ret <16 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fdiv_binop_16xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %12 = fdiv <4 x float> %3, %7
+; CHECK-NEXT: %13 = fdiv <4 x float> %4, %8
+; CHECK-NEXT: %14 = fdiv <4 x float> %5, %9
+; CHECK-NEXT: %15 = fdiv <4 x float> %6, %10
+; CHECK-NEXT: store <4 x float> %13, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %14, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %15, <4 x float>* %2, align 16
+; CHECK-NEXT: ret <4 x float> %12
+
+define <16 x float> @fdiv_binop_16xfloat_fast(<16 x float>, <16 x float>) {
+ %3 = fdiv fast <16 x float> %0, %1
+ ret <16 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fdiv_binop_16xfloat_fast(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %12 = fdiv fast <4 x float> %3, %7
+; CHECK-NEXT: %13 = fdiv fast <4 x float> %4, %8
+; CHECK-NEXT: %14 = fdiv fast <4 x float> %5, %9
+; CHECK-NEXT: %15 = fdiv fast <4 x float> %6, %10
+; CHECK-NEXT: store <4 x float> %13, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %14, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %15, <4 x float>* %2, align 16
+; CHECK-NEXT: ret <4 x float> %12
+
+define <16 x double> @fdiv_binop_16xdouble(<16 x double>, <16 x double>) {
+ %3 = fdiv <16 x double> %0, %1
+ ret <16 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fdiv_binop_16xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %24 = fdiv <2 x double> %7, %15
+; CHECK-NEXT: %25 = fdiv <2 x double> %8, %16
+; CHECK-NEXT: %26 = fdiv <2 x double> %9, %17
+; CHECK-NEXT: %27 = fdiv <2 x double> %10, %18
+; CHECK-NEXT: %28 = fdiv <2 x double> %11, %19
+; CHECK-NEXT: %29 = fdiv <2 x double> %12, %20
+; CHECK-NEXT: %30 = fdiv <2 x double> %13, %21
+; CHECK-NEXT: %31 = fdiv <2 x double> %14, %22
+; CHECK-NEXT: store <2 x double> %25, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %26, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %27, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %28, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %29, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %30, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %31, <2 x double>* %6, align 16
+; CHECK-NEXT: ret <2 x double> %24
+
+define <16 x double> @fdiv_binop_16xdouble_fast(<16 x double>, <16 x double>) {
+ %3 = fdiv fast <16 x double> %0, %1
+ ret <16 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fdiv_binop_16xdouble_fast(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %24 = fdiv fast <2 x double> %7, %15
+; CHECK-NEXT: %25 = fdiv fast <2 x double> %8, %16
+; CHECK-NEXT: %26 = fdiv fast <2 x double> %9, %17
+; CHECK-NEXT: %27 = fdiv fast <2 x double> %10, %18
+; CHECK-NEXT: %28 = fdiv fast <2 x double> %11, %19
+; CHECK-NEXT: %29 = fdiv fast <2 x double> %12, %20
+; CHECK-NEXT: %30 = fdiv fast <2 x double> %13, %21
+; CHECK-NEXT: %31 = fdiv fast <2 x double> %14, %22
+; CHECK-NEXT: store <2 x double> %25, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %26, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %27, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %28, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %29, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %30, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %31, <2 x double>* %6, align 16
+; CHECK-NEXT: ret <2 x double> %24
+
+define <16 x float> @frem_binop_16xfloat(<16 x float>, <16 x float>) {
+ %3 = frem <16 x float> %0, %1
+ ret <16 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @frem_binop_16xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %12 = frem <4 x float> %3, %7
+; CHECK-NEXT: %13 = frem <4 x float> %4, %8
+; CHECK-NEXT: %14 = frem <4 x float> %5, %9
+; CHECK-NEXT: %15 = frem <4 x float> %6, %10
+; CHECK-NEXT: store <4 x float> %13, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %14, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %15, <4 x float>* %2, align 16
+; CHECK-NEXT: ret <4 x float> %12
+
+define <16 x float> @frem_binop_16xfloat_fast(<16 x float>, <16 x float>) {
+ %3 = frem fast <16 x float> %0, %1
+ ret <16 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @frem_binop_16xfloat_fast(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %12 = frem fast <4 x float> %3, %7
+; CHECK-NEXT: %13 = frem fast <4 x float> %4, %8
+; CHECK-NEXT: %14 = frem fast <4 x float> %5, %9
+; CHECK-NEXT: %15 = frem fast <4 x float> %6, %10
+; CHECK-NEXT: store <4 x float> %13, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %14, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %15, <4 x float>* %2, align 16
+; CHECK-NEXT: ret <4 x float> %12
+
+define <16 x double> @frem_binop_16xdouble(<16 x double>, <16 x double>) {
+ %3 = frem <16 x double> %0, %1
+ ret <16 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @frem_binop_16xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %24 = frem <2 x double> %7, %15
+; CHECK-NEXT: %25 = frem <2 x double> %8, %16
+; CHECK-NEXT: %26 = frem <2 x double> %9, %17
+; CHECK-NEXT: %27 = frem <2 x double> %10, %18
+; CHECK-NEXT: %28 = frem <2 x double> %11, %19
+; CHECK-NEXT: %29 = frem <2 x double> %12, %20
+; CHECK-NEXT: %30 = frem <2 x double> %13, %21
+; CHECK-NEXT: %31 = frem <2 x double> %14, %22
+; CHECK-NEXT: store <2 x double> %25, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %26, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %27, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %28, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %29, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %30, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %31, <2 x double>* %6, align 16
+; CHECK-NEXT: ret <2 x double> %24
+
+define <16 x double> @frem_binop_16xdouble_fast(<16 x double>, <16 x double>) {
+ %3 = frem fast <16 x double> %0, %1
+ ret <16 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @frem_binop_16xdouble_fast(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %24 = frem fast <2 x double> %7, %15
+; CHECK-NEXT: %25 = frem fast <2 x double> %8, %16
+; CHECK-NEXT: %26 = frem fast <2 x double> %9, %17
+; CHECK-NEXT: %27 = frem fast <2 x double> %10, %18
+; CHECK-NEXT: %28 = frem fast <2 x double> %11, %19
+; CHECK-NEXT: %29 = frem fast <2 x double> %12, %20
+; CHECK-NEXT: %30 = frem fast <2 x double> %13, %21
+; CHECK-NEXT: %31 = frem fast <2 x double> %14, %22
+; CHECK-NEXT: store <2 x double> %25, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %26, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %27, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %28, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %29, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %30, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %31, <2 x double>* %6, align 16
+; CHECK-NEXT: ret <2 x double> %24
+
+define <20 x float> @fadd_binop_20xfloat(<20 x float>, <20 x float>) {
+ %3 = fadd <20 x float> %0, %1
+ ret <20 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fadd_binop_20xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %15 = fadd <4 x float> %4, %9
+; CHECK-NEXT: %16 = fadd <4 x float> %5, %10
+; CHECK-NEXT: %17 = fadd <4 x float> %6, %11
+; CHECK-NEXT: %18 = fadd <4 x float> %7, %12
+; CHECK-NEXT: %19 = fadd <4 x float> %8, %13
+; CHECK-NEXT: store <4 x float> %16, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %17, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %18, <4 x float>* %2, align 16
+; CHECK-NEXT: store <4 x float> %19, <4 x float>* %3, align 16
+; CHECK-NEXT: ret <4 x float> %15
+
+define <20 x float> @fadd_binop_20xfloat_fast(<20 x float>, <20 x float>) {
+ %3 = fadd fast <20 x float> %0, %1
+ ret <20 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fadd_binop_20xfloat_fast(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %15 = fadd fast <4 x float> %4, %9
+; CHECK-NEXT: %16 = fadd fast <4 x float> %5, %10
+; CHECK-NEXT: %17 = fadd fast <4 x float> %6, %11
+; CHECK-NEXT: %18 = fadd fast <4 x float> %7, %12
+; CHECK-NEXT: %19 = fadd fast <4 x float> %8, %13
+; CHECK-NEXT: store <4 x float> %16, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %17, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %18, <4 x float>* %2, align 16
+; CHECK-NEXT: store <4 x float> %19, <4 x float>* %3, align 16
+; CHECK-NEXT: ret <4 x float> %15
+
+define <20 x double> @fadd_binop_20xdouble(<20 x double>, <20 x double>) {
+ %3 = fadd <20 x double> %0, %1
+ ret <20 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fadd_binop_20xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %30 = fadd <2 x double> %9, %19
+; CHECK-NEXT: %31 = fadd <2 x double> %10, %20
+; CHECK-NEXT: %32 = fadd <2 x double> %11, %21
+; CHECK-NEXT: %33 = fadd <2 x double> %12, %22
+; CHECK-NEXT: %34 = fadd <2 x double> %13, %23
+; CHECK-NEXT: %35 = fadd <2 x double> %14, %24
+; CHECK-NEXT: %36 = fadd <2 x double> %15, %25
+; CHECK-NEXT: %37 = fadd <2 x double> %16, %26
+; CHECK-NEXT: %38 = fadd <2 x double> %17, %27
+; CHECK-NEXT: %39 = fadd <2 x double> %18, %28
+; CHECK-NEXT: store <2 x double> %31, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %32, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %33, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %34, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %35, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %36, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %37, <2 x double>* %6, align 16
+; CHECK-NEXT: store <2 x double> %38, <2 x double>* %7, align 16
+; CHECK-NEXT: store <2 x double> %39, <2 x double>* %8, align 16
+; CHECK-NEXT: ret <2 x double> %30
+
+define <20 x double> @fadd_binop_20xdouble_fast(<20 x double>, <20 x double>) {
+ %3 = fadd fast <20 x double> %0, %1
+ ret <20 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fadd_binop_20xdouble_fast(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %30 = fadd fast <2 x double> %9, %19
+; CHECK-NEXT: %31 = fadd fast <2 x double> %10, %20
+; CHECK-NEXT: %32 = fadd fast <2 x double> %11, %21
+; CHECK-NEXT: %33 = fadd fast <2 x double> %12, %22
+; CHECK-NEXT: %34 = fadd fast <2 x double> %13, %23
+; CHECK-NEXT: %35 = fadd fast <2 x double> %14, %24
+; CHECK-NEXT: %36 = fadd fast <2 x double> %15, %25
+; CHECK-NEXT: %37 = fadd fast <2 x double> %16, %26
+; CHECK-NEXT: %38 = fadd fast <2 x double> %17, %27
+; CHECK-NEXT: %39 = fadd fast <2 x double> %18, %28
+; CHECK-NEXT: store <2 x double> %31, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %32, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %33, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %34, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %35, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %36, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %37, <2 x double>* %6, align 16
+; CHECK-NEXT: store <2 x double> %38, <2 x double>* %7, align 16
+; CHECK-NEXT: store <2 x double> %39, <2 x double>* %8, align 16
+; CHECK-NEXT: ret <2 x double> %30
+
+define <20 x float> @fsub_binop_20xfloat(<20 x float>, <20 x float>) {
+ %3 = fsub <20 x float> %0, %1
+ ret <20 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fsub_binop_20xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %15 = fsub <4 x float> %4, %9
+; CHECK-NEXT: %16 = fsub <4 x float> %5, %10
+; CHECK-NEXT: %17 = fsub <4 x float> %6, %11
+; CHECK-NEXT: %18 = fsub <4 x float> %7, %12
+; CHECK-NEXT: %19 = fsub <4 x float> %8, %13
+; CHECK-NEXT: store <4 x float> %16, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %17, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %18, <4 x float>* %2, align 16
+; CHECK-NEXT: store <4 x float> %19, <4 x float>* %3, align 16
+; CHECK-NEXT: ret <4 x float> %15
+
+define <20 x float> @fsub_binop_20xfloat_fast(<20 x float>, <20 x float>) {
+ %3 = fsub fast <20 x float> %0, %1
+ ret <20 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fsub_binop_20xfloat_fast(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %15 = fsub fast <4 x float> %4, %9
+; CHECK-NEXT: %16 = fsub fast <4 x float> %5, %10
+; CHECK-NEXT: %17 = fsub fast <4 x float> %6, %11
+; CHECK-NEXT: %18 = fsub fast <4 x float> %7, %12
+; CHECK-NEXT: %19 = fsub fast <4 x float> %8, %13
+; CHECK-NEXT: store <4 x float> %16, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %17, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %18, <4 x float>* %2, align 16
+; CHECK-NEXT: store <4 x float> %19, <4 x float>* %3, align 16
+; CHECK-NEXT: ret <4 x float> %15
+
+define <20 x double> @fsub_binop_20xdouble(<20 x double>, <20 x double>) {
+ %3 = fsub <20 x double> %0, %1
+ ret <20 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fsub_binop_20xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %30 = fsub <2 x double> %9, %19
+; CHECK-NEXT: %31 = fsub <2 x double> %10, %20
+; CHECK-NEXT: %32 = fsub <2 x double> %11, %21
+; CHECK-NEXT: %33 = fsub <2 x double> %12, %22
+; CHECK-NEXT: %34 = fsub <2 x double> %13, %23
+; CHECK-NEXT: %35 = fsub <2 x double> %14, %24
+; CHECK-NEXT: %36 = fsub <2 x double> %15, %25
+; CHECK-NEXT: %37 = fsub <2 x double> %16, %26
+; CHECK-NEXT: %38 = fsub <2 x double> %17, %27
+; CHECK-NEXT: %39 = fsub <2 x double> %18, %28
+; CHECK-NEXT: store <2 x double> %31, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %32, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %33, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %34, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %35, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %36, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %37, <2 x double>* %6, align 16
+; CHECK-NEXT: store <2 x double> %38, <2 x double>* %7, align 16
+; CHECK-NEXT: store <2 x double> %39, <2 x double>* %8, align 16
+; CHECK-NEXT: ret <2 x double> %30
+
+define <20 x double> @fsub_binop_20xdouble_fast(<20 x double>, <20 x double>) {
+ %3 = fsub fast <20 x double> %0, %1
+ ret <20 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fsub_binop_20xdouble_fast(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %30 = fsub fast <2 x double> %9, %19
+; CHECK-NEXT: %31 = fsub fast <2 x double> %10, %20
+; CHECK-NEXT: %32 = fsub fast <2 x double> %11, %21
+; CHECK-NEXT: %33 = fsub fast <2 x double> %12, %22
+; CHECK-NEXT: %34 = fsub fast <2 x double> %13, %23
+; CHECK-NEXT: %35 = fsub fast <2 x double> %14, %24
+; CHECK-NEXT: %36 = fsub fast <2 x double> %15, %25
+; CHECK-NEXT: %37 = fsub fast <2 x double> %16, %26
+; CHECK-NEXT: %38 = fsub fast <2 x double> %17, %27
+; CHECK-NEXT: %39 = fsub fast <2 x double> %18, %28
+; CHECK-NEXT: store <2 x double> %31, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %32, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %33, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %34, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %35, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %36, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %37, <2 x double>* %6, align 16
+; CHECK-NEXT: store <2 x double> %38, <2 x double>* %7, align 16
+; CHECK-NEXT: store <2 x double> %39, <2 x double>* %8, align 16
+; CHECK-NEXT: ret <2 x double> %30
+
+define <20 x float> @fmul_binop_20xfloat(<20 x float>, <20 x float>) {
+ %3 = fmul <20 x float> %0, %1
+ ret <20 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fmul_binop_20xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %15 = fmul <4 x float> %4, %9
+; CHECK-NEXT: %16 = fmul <4 x float> %5, %10
+; CHECK-NEXT: %17 = fmul <4 x float> %6, %11
+; CHECK-NEXT: %18 = fmul <4 x float> %7, %12
+; CHECK-NEXT: %19 = fmul <4 x float> %8, %13
+; CHECK-NEXT: store <4 x float> %16, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %17, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %18, <4 x float>* %2, align 16
+; CHECK-NEXT: store <4 x float> %19, <4 x float>* %3, align 16
+; CHECK-NEXT: ret <4 x float> %15
+
+define <20 x float> @fmul_binop_20xfloat_fast(<20 x float>, <20 x float>) {
+ %3 = fmul fast <20 x float> %0, %1
+ ret <20 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fmul_binop_20xfloat_fast(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %15 = fmul fast <4 x float> %4, %9
+; CHECK-NEXT: %16 = fmul fast <4 x float> %5, %10
+; CHECK-NEXT: %17 = fmul fast <4 x float> %6, %11
+; CHECK-NEXT: %18 = fmul fast <4 x float> %7, %12
+; CHECK-NEXT: %19 = fmul fast <4 x float> %8, %13
+; CHECK-NEXT: store <4 x float> %16, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %17, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %18, <4 x float>* %2, align 16
+; CHECK-NEXT: store <4 x float> %19, <4 x float>* %3, align 16
+; CHECK-NEXT: ret <4 x float> %15
+
+define <20 x double> @fmul_binop_20xdouble(<20 x double>, <20 x double>) {
+ %3 = fmul <20 x double> %0, %1
+ ret <20 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fmul_binop_20xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %30 = fmul <2 x double> %9, %19
+; CHECK-NEXT: %31 = fmul <2 x double> %10, %20
+; CHECK-NEXT: %32 = fmul <2 x double> %11, %21
+; CHECK-NEXT: %33 = fmul <2 x double> %12, %22
+; CHECK-NEXT: %34 = fmul <2 x double> %13, %23
+; CHECK-NEXT: %35 = fmul <2 x double> %14, %24
+; CHECK-NEXT: %36 = fmul <2 x double> %15, %25
+; CHECK-NEXT: %37 = fmul <2 x double> %16, %26
+; CHECK-NEXT: %38 = fmul <2 x double> %17, %27
+; CHECK-NEXT: %39 = fmul <2 x double> %18, %28
+; CHECK-NEXT: store <2 x double> %31, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %32, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %33, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %34, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %35, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %36, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %37, <2 x double>* %6, align 16
+; CHECK-NEXT: store <2 x double> %38, <2 x double>* %7, align 16
+; CHECK-NEXT: store <2 x double> %39, <2 x double>* %8, align 16
+; CHECK-NEXT: ret <2 x double> %30
+
+define <20 x double> @fmul_binop_20xdouble_fast(<20 x double>, <20 x double>) {
+ %3 = fmul fast <20 x double> %0, %1
+ ret <20 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fmul_binop_20xdouble_fast(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %30 = fmul fast <2 x double> %9, %19
+; CHECK-NEXT: %31 = fmul fast <2 x double> %10, %20
+; CHECK-NEXT: %32 = fmul fast <2 x double> %11, %21
+; CHECK-NEXT: %33 = fmul fast <2 x double> %12, %22
+; CHECK-NEXT: %34 = fmul fast <2 x double> %13, %23
+; CHECK-NEXT: %35 = fmul fast <2 x double> %14, %24
+; CHECK-NEXT: %36 = fmul fast <2 x double> %15, %25
+; CHECK-NEXT: %37 = fmul fast <2 x double> %16, %26
+; CHECK-NEXT: %38 = fmul fast <2 x double> %17, %27
+; CHECK-NEXT: %39 = fmul fast <2 x double> %18, %28
+; CHECK-NEXT: store <2 x double> %31, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %32, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %33, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %34, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %35, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %36, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %37, <2 x double>* %6, align 16
+; CHECK-NEXT: store <2 x double> %38, <2 x double>* %7, align 16
+; CHECK-NEXT: store <2 x double> %39, <2 x double>* %8, align 16
+; CHECK-NEXT: ret <2 x double> %30
+
+define <20 x float> @fdiv_binop_20xfloat(<20 x float>, <20 x float>) {
+ %3 = fdiv <20 x float> %0, %1
+ ret <20 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fdiv_binop_20xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %15 = fdiv <4 x float> %4, %9
+; CHECK-NEXT: %16 = fdiv <4 x float> %5, %10
+; CHECK-NEXT: %17 = fdiv <4 x float> %6, %11
+; CHECK-NEXT: %18 = fdiv <4 x float> %7, %12
+; CHECK-NEXT: %19 = fdiv <4 x float> %8, %13
+; CHECK-NEXT: store <4 x float> %16, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %17, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %18, <4 x float>* %2, align 16
+; CHECK-NEXT: store <4 x float> %19, <4 x float>* %3, align 16
+; CHECK-NEXT: ret <4 x float> %15
+
+define <20 x float> @fdiv_binop_20xfloat_fast(<20 x float>, <20 x float>) {
+ %3 = fdiv fast <20 x float> %0, %1
+ ret <20 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @fdiv_binop_20xfloat_fast(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %15 = fdiv fast <4 x float> %4, %9
+; CHECK-NEXT: %16 = fdiv fast <4 x float> %5, %10
+; CHECK-NEXT: %17 = fdiv fast <4 x float> %6, %11
+; CHECK-NEXT: %18 = fdiv fast <4 x float> %7, %12
+; CHECK-NEXT: %19 = fdiv fast <4 x float> %8, %13
+; CHECK-NEXT: store <4 x float> %16, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %17, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %18, <4 x float>* %2, align 16
+; CHECK-NEXT: store <4 x float> %19, <4 x float>* %3, align 16
+; CHECK-NEXT: ret <4 x float> %15
+
+define <20 x double> @fdiv_binop_20xdouble(<20 x double>, <20 x double>) {
+ %3 = fdiv <20 x double> %0, %1
+ ret <20 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fdiv_binop_20xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %30 = fdiv <2 x double> %9, %19
+; CHECK-NEXT: %31 = fdiv <2 x double> %10, %20
+; CHECK-NEXT: %32 = fdiv <2 x double> %11, %21
+; CHECK-NEXT: %33 = fdiv <2 x double> %12, %22
+; CHECK-NEXT: %34 = fdiv <2 x double> %13, %23
+; CHECK-NEXT: %35 = fdiv <2 x double> %14, %24
+; CHECK-NEXT: %36 = fdiv <2 x double> %15, %25
+; CHECK-NEXT: %37 = fdiv <2 x double> %16, %26
+; CHECK-NEXT: %38 = fdiv <2 x double> %17, %27
+; CHECK-NEXT: %39 = fdiv <2 x double> %18, %28
+; CHECK-NEXT: store <2 x double> %31, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %32, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %33, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %34, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %35, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %36, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %37, <2 x double>* %6, align 16
+; CHECK-NEXT: store <2 x double> %38, <2 x double>* %7, align 16
+; CHECK-NEXT: store <2 x double> %39, <2 x double>* %8, align 16
+; CHECK-NEXT: ret <2 x double> %30
+
+define <20 x double> @fdiv_binop_20xdouble_fast(<20 x double>, <20 x double>) {
+ %3 = fdiv fast <20 x double> %0, %1
+ ret <20 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @fdiv_binop_20xdouble_fast(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %30 = fdiv fast <2 x double> %9, %19
+; CHECK-NEXT: %31 = fdiv fast <2 x double> %10, %20
+; CHECK-NEXT: %32 = fdiv fast <2 x double> %11, %21
+; CHECK-NEXT: %33 = fdiv fast <2 x double> %12, %22
+; CHECK-NEXT: %34 = fdiv fast <2 x double> %13, %23
+; CHECK-NEXT: %35 = fdiv fast <2 x double> %14, %24
+; CHECK-NEXT: %36 = fdiv fast <2 x double> %15, %25
+; CHECK-NEXT: %37 = fdiv fast <2 x double> %16, %26
+; CHECK-NEXT: %38 = fdiv fast <2 x double> %17, %27
+; CHECK-NEXT: %39 = fdiv fast <2 x double> %18, %28
+; CHECK-NEXT: store <2 x double> %31, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %32, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %33, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %34, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %35, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %36, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %37, <2 x double>* %6, align 16
+; CHECK-NEXT: store <2 x double> %38, <2 x double>* %7, align 16
+; CHECK-NEXT: store <2 x double> %39, <2 x double>* %8, align 16
+; CHECK-NEXT: ret <2 x double> %30
+
+define <20 x float> @frem_binop_20xfloat(<20 x float>, <20 x float>) {
+ %3 = frem <20 x float> %0, %1
+ ret <20 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @frem_binop_20xfloat(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %15 = frem <4 x float> %4, %9
+; CHECK-NEXT: %16 = frem <4 x float> %5, %10
+; CHECK-NEXT: %17 = frem <4 x float> %6, %11
+; CHECK-NEXT: %18 = frem <4 x float> %7, %12
+; CHECK-NEXT: %19 = frem <4 x float> %8, %13
+; CHECK-NEXT: store <4 x float> %16, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %17, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %18, <4 x float>* %2, align 16
+; CHECK-NEXT: store <4 x float> %19, <4 x float>* %3, align 16
+; CHECK-NEXT: ret <4 x float> %15
+
+define <20 x float> @frem_binop_20xfloat_fast(<20 x float>, <20 x float>) {
+ %3 = frem fast <20 x float> %0, %1
+ ret <20 x float> %3
+}
+; CHECK-LABEL: define <4 x float> @frem_binop_20xfloat_fast(<4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)
+; CHECK-NEXT: %15 = frem fast <4 x float> %4, %9
+; CHECK-NEXT: %16 = frem fast <4 x float> %5, %10
+; CHECK-NEXT: %17 = frem fast <4 x float> %6, %11
+; CHECK-NEXT: %18 = frem fast <4 x float> %7, %12
+; CHECK-NEXT: %19 = frem fast <4 x float> %8, %13
+; CHECK-NEXT: store <4 x float> %16, <4 x float>* %0, align 16
+; CHECK-NEXT: store <4 x float> %17, <4 x float>* %1, align 16
+; CHECK-NEXT: store <4 x float> %18, <4 x float>* %2, align 16
+; CHECK-NEXT: store <4 x float> %19, <4 x float>* %3, align 16
+; CHECK-NEXT: ret <4 x float> %15
+
+define <20 x double> @frem_binop_20xdouble(<20 x double>, <20 x double>) {
+ %3 = frem <20 x double> %0, %1
+ ret <20 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @frem_binop_20xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %30 = frem <2 x double> %9, %19
+; CHECK-NEXT: %31 = frem <2 x double> %10, %20
+; CHECK-NEXT: %32 = frem <2 x double> %11, %21
+; CHECK-NEXT: %33 = frem <2 x double> %12, %22
+; CHECK-NEXT: %34 = frem <2 x double> %13, %23
+; CHECK-NEXT: %35 = frem <2 x double> %14, %24
+; CHECK-NEXT: %36 = frem <2 x double> %15, %25
+; CHECK-NEXT: %37 = frem <2 x double> %16, %26
+; CHECK-NEXT: %38 = frem <2 x double> %17, %27
+; CHECK-NEXT: %39 = frem <2 x double> %18, %28
+; CHECK-NEXT: store <2 x double> %31, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %32, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %33, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %34, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %35, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %36, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %37, <2 x double>* %6, align 16
+; CHECK-NEXT: store <2 x double> %38, <2 x double>* %7, align 16
+; CHECK-NEXT: store <2 x double> %39, <2 x double>* %8, align 16
+; CHECK-NEXT: ret <2 x double> %30
+
+define <20 x double> @frem_binop_20xdouble_fast(<20 x double>, <20 x double>) {
+ %3 = frem fast <20 x double> %0, %1
+ ret <20 x double> %3
+}
+; CHECK-LABEL: define <2 x double> @frem_binop_20xdouble_fast(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)
+; CHECK-NEXT: %30 = frem fast <2 x double> %9, %19
+; CHECK-NEXT: %31 = frem fast <2 x double> %10, %20
+; CHECK-NEXT: %32 = frem fast <2 x double> %11, %21
+; CHECK-NEXT: %33 = frem fast <2 x double> %12, %22
+; CHECK-NEXT: %34 = frem fast <2 x double> %13, %23
+; CHECK-NEXT: %35 = frem fast <2 x double> %14, %24
+; CHECK-NEXT: %36 = frem fast <2 x double> %15, %25
+; CHECK-NEXT: %37 = frem fast <2 x double> %16, %26
+; CHECK-NEXT: %38 = frem fast <2 x double> %17, %27
+; CHECK-NEXT: %39 = frem fast <2 x double> %18, %28
+; CHECK-NEXT: store <2 x double> %31, <2 x double>* %0, align 16
+; CHECK-NEXT: store <2 x double> %32, <2 x double>* %1, align 16
+; CHECK-NEXT: store <2 x double> %33, <2 x double>* %2, align 16
+; CHECK-NEXT: store <2 x double> %34, <2 x double>* %3, align 16
+; CHECK-NEXT: store <2 x double> %35, <2 x double>* %4, align 16
+; CHECK-NEXT: store <2 x double> %36, <2 x double>* %5, align 16
+; CHECK-NEXT: store <2 x double> %37, <2 x double>* %6, align 16
+; CHECK-NEXT: store <2 x double> %38, <2 x double>* %7, align 16
+; CHECK-NEXT: store <2 x double> %39, <2 x double>* %8, align 16
+; CHECK-NEXT: ret <2 x double> %30
+
+define <2 x i8> @add_binop_2xi8_nuw(<2 x i8>, <2 x i8>) {
+ %3 = add nuw <2 x i8> %0, %1
+ ret <2 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @add_binop_2xi8_nuw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = add nuw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <2 x i8> @add_binop_2xi8_nsw(<2 x i8>, <2 x i8>) {
+ %3 = add nsw <2 x i8> %0, %1
+ ret <2 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @add_binop_2xi8_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = add nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <2 x i8> @add_binop_2xi8_nuw_nsw(<2 x i8>, <2 x i8>) {
+ %3 = add nuw nsw <2 x i8> %0, %1
+ ret <2 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @add_binop_2xi8_nuw_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = add nuw nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <2 x i8> @sub_binop_2xi8_nuw(<2 x i8>, <2 x i8>) {
+ %3 = sub nuw <2 x i8> %0, %1
+ ret <2 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @sub_binop_2xi8_nuw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = sub nuw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <2 x i8> @sub_binop_2xi8_nsw(<2 x i8>, <2 x i8>) {
+ %3 = sub nsw <2 x i8> %0, %1
+ ret <2 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @sub_binop_2xi8_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = sub nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <2 x i8> @sub_binop_2xi8_nuw_nsw(<2 x i8>, <2 x i8>) {
+ %3 = sub nuw nsw <2 x i8> %0, %1
+ ret <2 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @sub_binop_2xi8_nuw_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = sub nuw nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <2 x i8> @mul_binop_2xi8_nuw(<2 x i8>, <2 x i8>) {
+ %3 = mul nuw <2 x i8> %0, %1
+ ret <2 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @mul_binop_2xi8_nuw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = mul nuw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <2 x i8> @mul_binop_2xi8_nsw(<2 x i8>, <2 x i8>) {
+ %3 = mul nsw <2 x i8> %0, %1
+ ret <2 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @mul_binop_2xi8_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = mul nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <2 x i8> @mul_binop_2xi8_nuw_nsw(<2 x i8>, <2 x i8>) {
+ %3 = mul nuw nsw <2 x i8> %0, %1
+ ret <2 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @mul_binop_2xi8_nuw_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = mul nuw nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <2 x i8> @shl_binop_2xi8_nuw(<2 x i8>, <2 x i8>) {
+ %3 = shl nuw <2 x i8> %0, %1
+ ret <2 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @shl_binop_2xi8_nuw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = shl nuw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <2 x i8> @shl_binop_2xi8_nsw(<2 x i8>, <2 x i8>) {
+ %3 = shl nsw <2 x i8> %0, %1
+ ret <2 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @shl_binop_2xi8_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = shl nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <2 x i8> @shl_binop_2xi8_nuw_nsw(<2 x i8>, <2 x i8>) {
+ %3 = shl nuw nsw <2 x i8> %0, %1
+ ret <2 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @shl_binop_2xi8_nuw_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = shl nuw nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <2 x i8> @udiv_binop_2xi8(<2 x i8>, <2 x i8>) {
+ %3 = udiv <2 x i8> %0, %1
+ ret <2 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @udiv_binop_2xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = udiv <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <2 x i8> @udiv_binop_2xi8_exact(<2 x i8>, <2 x i8>) {
+ %3 = udiv exact <2 x i8> %0, %1
+ ret <2 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @udiv_binop_2xi8_exact(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = udiv exact <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <2 x i8> @sdiv_binop_2xi8(<2 x i8>, <2 x i8>) {
+ %3 = sdiv <2 x i8> %0, %1
+ ret <2 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @sdiv_binop_2xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = sdiv <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <2 x i8> @sdiv_binop_2xi8_exact(<2 x i8>, <2 x i8>) {
+ %3 = sdiv exact <2 x i8> %0, %1
+ ret <2 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @sdiv_binop_2xi8_exact(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = sdiv exact <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <2 x i8> @lshr_binop_2xi8(<2 x i8>, <2 x i8>) {
+ %3 = lshr <2 x i8> %0, %1
+ ret <2 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @lshr_binop_2xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = lshr <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <2 x i8> @lshr_binop_2xi8_exact(<2 x i8>, <2 x i8>) {
+ %3 = lshr exact <2 x i8> %0, %1
+ ret <2 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @lshr_binop_2xi8_exact(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = lshr exact <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <2 x i8> @ashr_binop_2xi8(<2 x i8>, <2 x i8>) {
+ %3 = ashr <2 x i8> %0, %1
+ ret <2 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @ashr_binop_2xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = ashr <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <2 x i8> @ashr_binop_2xi8_exact(<2 x i8>, <2 x i8>) {
+ %3 = ashr exact <2 x i8> %0, %1
+ ret <2 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @ashr_binop_2xi8_exact(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = ashr exact <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <2 x i8> @and_binop_2xi8(<2 x i8>, <2 x i8>) {
+ %3 = and <2 x i8> %0, %1
+ ret <2 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @and_binop_2xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = and <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <2 x i8> @xor_binop_2xi8(<2 x i8>, <2 x i8>) {
+ %3 = xor <2 x i8> %0, %1
+ ret <2 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @xor_binop_2xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = xor <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <2 x i8> @or_binop_2xi8(<2 x i8>, <2 x i8>) {
+ %3 = or <2 x i8> %0, %1
+ ret <2 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @or_binop_2xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = or <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <2 x i8> @urem_binop_2xi8(<2 x i8>, <2 x i8>) {
+ %3 = urem <2 x i8> %0, %1
+ ret <2 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @urem_binop_2xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = urem <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <2 x i8> @srem_binop_2xi8(<2 x i8>, <2 x i8>) {
+ %3 = srem <2 x i8> %0, %1
+ ret <2 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @srem_binop_2xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = srem <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <2 x i16> @add_binop_2xi16_nuw(<2 x i16>, <2 x i16>) {
+ %3 = add nuw <2 x i16> %0, %1
+ ret <2 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @add_binop_2xi16_nuw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = add nuw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <2 x i16> @add_binop_2xi16_nsw(<2 x i16>, <2 x i16>) {
+ %3 = add nsw <2 x i16> %0, %1
+ ret <2 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @add_binop_2xi16_nsw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = add nsw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <2 x i16> @add_binop_2xi16_nuw_nsw(<2 x i16>, <2 x i16>) {
+ %3 = add nuw nsw <2 x i16> %0, %1
+ ret <2 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @add_binop_2xi16_nuw_nsw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = add nuw nsw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <2 x i16> @sub_binop_2xi16_nuw(<2 x i16>, <2 x i16>) {
+ %3 = sub nuw <2 x i16> %0, %1
+ ret <2 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @sub_binop_2xi16_nuw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = sub nuw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <2 x i16> @sub_binop_2xi16_nsw(<2 x i16>, <2 x i16>) {
+ %3 = sub nsw <2 x i16> %0, %1
+ ret <2 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @sub_binop_2xi16_nsw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = sub nsw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <2 x i16> @sub_binop_2xi16_nuw_nsw(<2 x i16>, <2 x i16>) {
+ %3 = sub nuw nsw <2 x i16> %0, %1
+ ret <2 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @sub_binop_2xi16_nuw_nsw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = sub nuw nsw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <2 x i16> @mul_binop_2xi16_nuw(<2 x i16>, <2 x i16>) {
+ %3 = mul nuw <2 x i16> %0, %1
+ ret <2 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @mul_binop_2xi16_nuw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = mul nuw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <2 x i16> @mul_binop_2xi16_nsw(<2 x i16>, <2 x i16>) {
+ %3 = mul nsw <2 x i16> %0, %1
+ ret <2 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @mul_binop_2xi16_nsw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = mul nsw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <2 x i16> @mul_binop_2xi16_nuw_nsw(<2 x i16>, <2 x i16>) {
+ %3 = mul nuw nsw <2 x i16> %0, %1
+ ret <2 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @mul_binop_2xi16_nuw_nsw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = mul nuw nsw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <2 x i16> @shl_binop_2xi16_nuw(<2 x i16>, <2 x i16>) {
+ %3 = shl nuw <2 x i16> %0, %1
+ ret <2 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @shl_binop_2xi16_nuw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = shl nuw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <2 x i16> @shl_binop_2xi16_nsw(<2 x i16>, <2 x i16>) {
+ %3 = shl nsw <2 x i16> %0, %1
+ ret <2 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @shl_binop_2xi16_nsw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = shl nsw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <2 x i16> @shl_binop_2xi16_nuw_nsw(<2 x i16>, <2 x i16>) {
+ %3 = shl nuw nsw <2 x i16> %0, %1
+ ret <2 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @shl_binop_2xi16_nuw_nsw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = shl nuw nsw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <2 x i16> @udiv_binop_2xi16(<2 x i16>, <2 x i16>) {
+ %3 = udiv <2 x i16> %0, %1
+ ret <2 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @udiv_binop_2xi16(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = udiv <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <2 x i16> @udiv_binop_2xi16_exact(<2 x i16>, <2 x i16>) {
+ %3 = udiv exact <2 x i16> %0, %1
+ ret <2 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @udiv_binop_2xi16_exact(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = udiv exact <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <2 x i16> @sdiv_binop_2xi16(<2 x i16>, <2 x i16>) {
+ %3 = sdiv <2 x i16> %0, %1
+ ret <2 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @sdiv_binop_2xi16(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = sdiv <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <2 x i16> @sdiv_binop_2xi16_exact(<2 x i16>, <2 x i16>) {
+ %3 = sdiv exact <2 x i16> %0, %1
+ ret <2 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @sdiv_binop_2xi16_exact(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = sdiv exact <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <2 x i16> @lshr_binop_2xi16(<2 x i16>, <2 x i16>) {
+ %3 = lshr <2 x i16> %0, %1
+ ret <2 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @lshr_binop_2xi16(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = lshr <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <2 x i16> @lshr_binop_2xi16_exact(<2 x i16>, <2 x i16>) {
+ %3 = lshr exact <2 x i16> %0, %1
+ ret <2 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @lshr_binop_2xi16_exact(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = lshr exact <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <2 x i16> @ashr_binop_2xi16(<2 x i16>, <2 x i16>) {
+ %3 = ashr <2 x i16> %0, %1
+ ret <2 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @ashr_binop_2xi16(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = ashr <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <2 x i16> @ashr_binop_2xi16_exact(<2 x i16>, <2 x i16>) {
+ %3 = ashr exact <2 x i16> %0, %1
+ ret <2 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @ashr_binop_2xi16_exact(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = ashr exact <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <2 x i16> @and_binop_2xi16(<2 x i16>, <2 x i16>) {
+ %3 = and <2 x i16> %0, %1
+ ret <2 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @and_binop_2xi16(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = and <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <2 x i16> @xor_binop_2xi16(<2 x i16>, <2 x i16>) {
+ %3 = xor <2 x i16> %0, %1
+ ret <2 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @xor_binop_2xi16(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = xor <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <2 x i16> @or_binop_2xi16(<2 x i16>, <2 x i16>) {
+ %3 = or <2 x i16> %0, %1
+ ret <2 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @or_binop_2xi16(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = or <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <2 x i16> @urem_binop_2xi16(<2 x i16>, <2 x i16>) {
+ %3 = urem <2 x i16> %0, %1
+ ret <2 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @urem_binop_2xi16(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = urem <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <2 x i16> @srem_binop_2xi16(<2 x i16>, <2 x i16>) {
+ %3 = srem <2 x i16> %0, %1
+ ret <2 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @srem_binop_2xi16(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = srem <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <2 x i32> @add_binop_2xi32_nuw(<2 x i32>, <2 x i32>) {
+ %3 = add nuw <2 x i32> %0, %1
+ ret <2 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @add_binop_2xi32_nuw(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = add nuw <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <2 x i32> @add_binop_2xi32_nsw(<2 x i32>, <2 x i32>) {
+ %3 = add nsw <2 x i32> %0, %1
+ ret <2 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @add_binop_2xi32_nsw(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = add nsw <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <2 x i32> @add_binop_2xi32_nuw_nsw(<2 x i32>, <2 x i32>) {
+ %3 = add nuw nsw <2 x i32> %0, %1
+ ret <2 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @add_binop_2xi32_nuw_nsw(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = add nuw nsw <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <2 x i32> @sub_binop_2xi32_nuw(<2 x i32>, <2 x i32>) {
+ %3 = sub nuw <2 x i32> %0, %1
+ ret <2 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @sub_binop_2xi32_nuw(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = sub nuw <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <2 x i32> @sub_binop_2xi32_nsw(<2 x i32>, <2 x i32>) {
+ %3 = sub nsw <2 x i32> %0, %1
+ ret <2 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @sub_binop_2xi32_nsw(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = sub nsw <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <2 x i32> @sub_binop_2xi32_nuw_nsw(<2 x i32>, <2 x i32>) {
+ %3 = sub nuw nsw <2 x i32> %0, %1
+ ret <2 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @sub_binop_2xi32_nuw_nsw(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = sub nuw nsw <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <2 x i32> @mul_binop_2xi32_nuw(<2 x i32>, <2 x i32>) {
+ %3 = mul nuw <2 x i32> %0, %1
+ ret <2 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @mul_binop_2xi32_nuw(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = mul nuw <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <2 x i32> @mul_binop_2xi32_nsw(<2 x i32>, <2 x i32>) {
+ %3 = mul nsw <2 x i32> %0, %1
+ ret <2 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @mul_binop_2xi32_nsw(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = mul nsw <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <2 x i32> @mul_binop_2xi32_nuw_nsw(<2 x i32>, <2 x i32>) {
+ %3 = mul nuw nsw <2 x i32> %0, %1
+ ret <2 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @mul_binop_2xi32_nuw_nsw(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = mul nuw nsw <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <2 x i32> @shl_binop_2xi32_nuw(<2 x i32>, <2 x i32>) {
+ %3 = shl nuw <2 x i32> %0, %1
+ ret <2 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @shl_binop_2xi32_nuw(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = shl nuw <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <2 x i32> @shl_binop_2xi32_nsw(<2 x i32>, <2 x i32>) {
+ %3 = shl nsw <2 x i32> %0, %1
+ ret <2 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @shl_binop_2xi32_nsw(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = shl nsw <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <2 x i32> @shl_binop_2xi32_nuw_nsw(<2 x i32>, <2 x i32>) {
+ %3 = shl nuw nsw <2 x i32> %0, %1
+ ret <2 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @shl_binop_2xi32_nuw_nsw(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = shl nuw nsw <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <2 x i32> @udiv_binop_2xi32(<2 x i32>, <2 x i32>) {
+ %3 = udiv <2 x i32> %0, %1
+ ret <2 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @udiv_binop_2xi32(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = udiv <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <2 x i32> @udiv_binop_2xi32_exact(<2 x i32>, <2 x i32>) {
+ %3 = udiv exact <2 x i32> %0, %1
+ ret <2 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @udiv_binop_2xi32_exact(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = udiv exact <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <2 x i32> @sdiv_binop_2xi32(<2 x i32>, <2 x i32>) {
+ %3 = sdiv <2 x i32> %0, %1
+ ret <2 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @sdiv_binop_2xi32(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = sdiv <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <2 x i32> @sdiv_binop_2xi32_exact(<2 x i32>, <2 x i32>) {
+ %3 = sdiv exact <2 x i32> %0, %1
+ ret <2 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @sdiv_binop_2xi32_exact(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = sdiv exact <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <2 x i32> @lshr_binop_2xi32(<2 x i32>, <2 x i32>) {
+ %3 = lshr <2 x i32> %0, %1
+ ret <2 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @lshr_binop_2xi32(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = lshr <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <2 x i32> @lshr_binop_2xi32_exact(<2 x i32>, <2 x i32>) {
+ %3 = lshr exact <2 x i32> %0, %1
+ ret <2 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @lshr_binop_2xi32_exact(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = lshr exact <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <2 x i32> @ashr_binop_2xi32(<2 x i32>, <2 x i32>) {
+ %3 = ashr <2 x i32> %0, %1
+ ret <2 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @ashr_binop_2xi32(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = ashr <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <2 x i32> @ashr_binop_2xi32_exact(<2 x i32>, <2 x i32>) {
+ %3 = ashr exact <2 x i32> %0, %1
+ ret <2 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @ashr_binop_2xi32_exact(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = ashr exact <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <2 x i32> @and_binop_2xi32(<2 x i32>, <2 x i32>) {
+ %3 = and <2 x i32> %0, %1
+ ret <2 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @and_binop_2xi32(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = and <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <2 x i32> @xor_binop_2xi32(<2 x i32>, <2 x i32>) {
+ %3 = xor <2 x i32> %0, %1
+ ret <2 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @xor_binop_2xi32(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = xor <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <2 x i32> @or_binop_2xi32(<2 x i32>, <2 x i32>) {
+ %3 = or <2 x i32> %0, %1
+ ret <2 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @or_binop_2xi32(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = or <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <2 x i32> @urem_binop_2xi32(<2 x i32>, <2 x i32>) {
+ %3 = urem <2 x i32> %0, %1
+ ret <2 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @urem_binop_2xi32(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = urem <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <2 x i32> @srem_binop_2xi32(<2 x i32>, <2 x i32>) {
+ %3 = srem <2 x i32> %0, %1
+ ret <2 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @srem_binop_2xi32(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = srem <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <2 x i64> @add_binop_2xi64_nuw(<2 x i64>, <2 x i64>) {
+ %3 = add nuw <2 x i64> %0, %1
+ ret <2 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @add_binop_2xi64_nuw(<2 x i64>, <2 x i64>)
+; CHECK-NEXT: %3 = add nuw <2 x i64> %0, %1
+; CHECK-NEXT: ret <2 x i64> %3
+
+define <2 x i64> @add_binop_2xi64_nsw(<2 x i64>, <2 x i64>) {
+ %3 = add nsw <2 x i64> %0, %1
+ ret <2 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @add_binop_2xi64_nsw(<2 x i64>, <2 x i64>)
+; CHECK-NEXT: %3 = add nsw <2 x i64> %0, %1
+; CHECK-NEXT: ret <2 x i64> %3
+
+define <2 x i64> @add_binop_2xi64_nuw_nsw(<2 x i64>, <2 x i64>) {
+ %3 = add nuw nsw <2 x i64> %0, %1
+ ret <2 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @add_binop_2xi64_nuw_nsw(<2 x i64>, <2 x i64>)
+; CHECK-NEXT: %3 = add nuw nsw <2 x i64> %0, %1
+; CHECK-NEXT: ret <2 x i64> %3
+
+define <2 x i64> @sub_binop_2xi64_nuw(<2 x i64>, <2 x i64>) {
+ %3 = sub nuw <2 x i64> %0, %1
+ ret <2 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @sub_binop_2xi64_nuw(<2 x i64>, <2 x i64>)
+; CHECK-NEXT: %3 = sub nuw <2 x i64> %0, %1
+; CHECK-NEXT: ret <2 x i64> %3
+
+define <2 x i64> @sub_binop_2xi64_nsw(<2 x i64>, <2 x i64>) {
+ %3 = sub nsw <2 x i64> %0, %1
+ ret <2 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @sub_binop_2xi64_nsw(<2 x i64>, <2 x i64>)
+; CHECK-NEXT: %3 = sub nsw <2 x i64> %0, %1
+; CHECK-NEXT: ret <2 x i64> %3
+
+define <2 x i64> @sub_binop_2xi64_nuw_nsw(<2 x i64>, <2 x i64>) {
+ %3 = sub nuw nsw <2 x i64> %0, %1
+ ret <2 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @sub_binop_2xi64_nuw_nsw(<2 x i64>, <2 x i64>)
+; CHECK-NEXT: %3 = sub nuw nsw <2 x i64> %0, %1
+; CHECK-NEXT: ret <2 x i64> %3
+
+define <2 x i64> @mul_binop_2xi64_nuw(<2 x i64>, <2 x i64>) {
+ %3 = mul nuw <2 x i64> %0, %1
+ ret <2 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @mul_binop_2xi64_nuw(<2 x i64>, <2 x i64>)
+; CHECK-NEXT: %3 = mul nuw <2 x i64> %0, %1
+; CHECK-NEXT: ret <2 x i64> %3
+
+define <2 x i64> @mul_binop_2xi64_nsw(<2 x i64>, <2 x i64>) {
+ %3 = mul nsw <2 x i64> %0, %1
+ ret <2 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @mul_binop_2xi64_nsw(<2 x i64>, <2 x i64>)
+; CHECK-NEXT: %3 = mul nsw <2 x i64> %0, %1
+; CHECK-NEXT: ret <2 x i64> %3
+
+define <2 x i64> @mul_binop_2xi64_nuw_nsw(<2 x i64>, <2 x i64>) {
+ %3 = mul nuw nsw <2 x i64> %0, %1
+ ret <2 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @mul_binop_2xi64_nuw_nsw(<2 x i64>, <2 x i64>)
+; CHECK-NEXT: %3 = mul nuw nsw <2 x i64> %0, %1
+; CHECK-NEXT: ret <2 x i64> %3
+
+define <2 x i64> @shl_binop_2xi64_nuw(<2 x i64>, <2 x i64>) {
+ %3 = shl nuw <2 x i64> %0, %1
+ ret <2 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @shl_binop_2xi64_nuw(<2 x i64>, <2 x i64>)
+; CHECK-NEXT: %3 = shl nuw <2 x i64> %0, %1
+; CHECK-NEXT: ret <2 x i64> %3
+
+define <2 x i64> @shl_binop_2xi64_nsw(<2 x i64>, <2 x i64>) {
+ %3 = shl nsw <2 x i64> %0, %1
+ ret <2 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @shl_binop_2xi64_nsw(<2 x i64>, <2 x i64>)
+; CHECK-NEXT: %3 = shl nsw <2 x i64> %0, %1
+; CHECK-NEXT: ret <2 x i64> %3
+
+define <2 x i64> @shl_binop_2xi64_nuw_nsw(<2 x i64>, <2 x i64>) {
+ %3 = shl nuw nsw <2 x i64> %0, %1
+ ret <2 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @shl_binop_2xi64_nuw_nsw(<2 x i64>, <2 x i64>)
+; CHECK-NEXT: %3 = shl nuw nsw <2 x i64> %0, %1
+; CHECK-NEXT: ret <2 x i64> %3
+
+define <2 x i64> @udiv_binop_2xi64(<2 x i64>, <2 x i64>) {
+ %3 = udiv <2 x i64> %0, %1
+ ret <2 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @udiv_binop_2xi64(<2 x i64>, <2 x i64>)
+; CHECK-NEXT: %3 = udiv <2 x i64> %0, %1
+; CHECK-NEXT: ret <2 x i64> %3
+
+define <2 x i64> @udiv_binop_2xi64_exact(<2 x i64>, <2 x i64>) {
+ %3 = udiv exact <2 x i64> %0, %1
+ ret <2 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @udiv_binop_2xi64_exact(<2 x i64>, <2 x i64>)
+; CHECK-NEXT: %3 = udiv exact <2 x i64> %0, %1
+; CHECK-NEXT: ret <2 x i64> %3
+
+define <2 x i64> @sdiv_binop_2xi64(<2 x i64>, <2 x i64>) {
+ %3 = sdiv <2 x i64> %0, %1
+ ret <2 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @sdiv_binop_2xi64(<2 x i64>, <2 x i64>)
+; CHECK-NEXT: %3 = sdiv <2 x i64> %0, %1
+; CHECK-NEXT: ret <2 x i64> %3
+
+define <2 x i64> @sdiv_binop_2xi64_exact(<2 x i64>, <2 x i64>) {
+ %3 = sdiv exact <2 x i64> %0, %1
+ ret <2 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @sdiv_binop_2xi64_exact(<2 x i64>, <2 x i64>)
+; CHECK-NEXT: %3 = sdiv exact <2 x i64> %0, %1
+; CHECK-NEXT: ret <2 x i64> %3
+
+define <2 x i64> @lshr_binop_2xi64(<2 x i64>, <2 x i64>) {
+ %3 = lshr <2 x i64> %0, %1
+ ret <2 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @lshr_binop_2xi64(<2 x i64>, <2 x i64>)
+; CHECK-NEXT: %3 = lshr <2 x i64> %0, %1
+; CHECK-NEXT: ret <2 x i64> %3
+
+define <2 x i64> @lshr_binop_2xi64_exact(<2 x i64>, <2 x i64>) {
+ %3 = lshr exact <2 x i64> %0, %1
+ ret <2 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @lshr_binop_2xi64_exact(<2 x i64>, <2 x i64>)
+; CHECK-NEXT: %3 = lshr exact <2 x i64> %0, %1
+; CHECK-NEXT: ret <2 x i64> %3
+
+define <2 x i64> @ashr_binop_2xi64(<2 x i64>, <2 x i64>) {
+ %3 = ashr <2 x i64> %0, %1
+ ret <2 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @ashr_binop_2xi64(<2 x i64>, <2 x i64>)
+; CHECK-NEXT: %3 = ashr <2 x i64> %0, %1
+; CHECK-NEXT: ret <2 x i64> %3
+
+define <2 x i64> @ashr_binop_2xi64_exact(<2 x i64>, <2 x i64>) {
+ %3 = ashr exact <2 x i64> %0, %1
+ ret <2 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @ashr_binop_2xi64_exact(<2 x i64>, <2 x i64>)
+; CHECK-NEXT: %3 = ashr exact <2 x i64> %0, %1
+; CHECK-NEXT: ret <2 x i64> %3
+
+define <2 x i64> @and_binop_2xi64(<2 x i64>, <2 x i64>) {
+ %3 = and <2 x i64> %0, %1
+ ret <2 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @and_binop_2xi64(<2 x i64>, <2 x i64>)
+; CHECK-NEXT: %3 = and <2 x i64> %0, %1
+; CHECK-NEXT: ret <2 x i64> %3
+
+define <2 x i64> @xor_binop_2xi64(<2 x i64>, <2 x i64>) {
+ %3 = xor <2 x i64> %0, %1
+ ret <2 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @xor_binop_2xi64(<2 x i64>, <2 x i64>)
+; CHECK-NEXT: %3 = xor <2 x i64> %0, %1
+; CHECK-NEXT: ret <2 x i64> %3
+
+define <2 x i64> @or_binop_2xi64(<2 x i64>, <2 x i64>) {
+ %3 = or <2 x i64> %0, %1
+ ret <2 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @or_binop_2xi64(<2 x i64>, <2 x i64>)
+; CHECK-NEXT: %3 = or <2 x i64> %0, %1
+; CHECK-NEXT: ret <2 x i64> %3
+
+define <2 x i64> @urem_binop_2xi64(<2 x i64>, <2 x i64>) {
+ %3 = urem <2 x i64> %0, %1
+ ret <2 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @urem_binop_2xi64(<2 x i64>, <2 x i64>)
+; CHECK-NEXT: %3 = urem <2 x i64> %0, %1
+; CHECK-NEXT: ret <2 x i64> %3
+
+define <2 x i64> @srem_binop_2xi64(<2 x i64>, <2 x i64>) {
+ %3 = srem <2 x i64> %0, %1
+ ret <2 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @srem_binop_2xi64(<2 x i64>, <2 x i64>)
+; CHECK-NEXT: %3 = srem <2 x i64> %0, %1
+; CHECK-NEXT: ret <2 x i64> %3
+
+define <4 x i8> @add_binop_4xi8_nuw(<4 x i8>, <4 x i8>) {
+ %3 = add nuw <4 x i8> %0, %1
+ ret <4 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @add_binop_4xi8_nuw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = add nuw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <4 x i8> @add_binop_4xi8_nsw(<4 x i8>, <4 x i8>) {
+ %3 = add nsw <4 x i8> %0, %1
+ ret <4 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @add_binop_4xi8_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = add nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <4 x i8> @add_binop_4xi8_nuw_nsw(<4 x i8>, <4 x i8>) {
+ %3 = add nuw nsw <4 x i8> %0, %1
+ ret <4 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @add_binop_4xi8_nuw_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = add nuw nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <4 x i8> @sub_binop_4xi8_nuw(<4 x i8>, <4 x i8>) {
+ %3 = sub nuw <4 x i8> %0, %1
+ ret <4 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @sub_binop_4xi8_nuw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = sub nuw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <4 x i8> @sub_binop_4xi8_nsw(<4 x i8>, <4 x i8>) {
+ %3 = sub nsw <4 x i8> %0, %1
+ ret <4 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @sub_binop_4xi8_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = sub nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <4 x i8> @sub_binop_4xi8_nuw_nsw(<4 x i8>, <4 x i8>) {
+ %3 = sub nuw nsw <4 x i8> %0, %1
+ ret <4 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @sub_binop_4xi8_nuw_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = sub nuw nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <4 x i8> @mul_binop_4xi8_nuw(<4 x i8>, <4 x i8>) {
+ %3 = mul nuw <4 x i8> %0, %1
+ ret <4 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @mul_binop_4xi8_nuw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = mul nuw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <4 x i8> @mul_binop_4xi8_nsw(<4 x i8>, <4 x i8>) {
+ %3 = mul nsw <4 x i8> %0, %1
+ ret <4 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @mul_binop_4xi8_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = mul nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <4 x i8> @mul_binop_4xi8_nuw_nsw(<4 x i8>, <4 x i8>) {
+ %3 = mul nuw nsw <4 x i8> %0, %1
+ ret <4 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @mul_binop_4xi8_nuw_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = mul nuw nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <4 x i8> @shl_binop_4xi8_nuw(<4 x i8>, <4 x i8>) {
+ %3 = shl nuw <4 x i8> %0, %1
+ ret <4 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @shl_binop_4xi8_nuw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = shl nuw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <4 x i8> @shl_binop_4xi8_nsw(<4 x i8>, <4 x i8>) {
+ %3 = shl nsw <4 x i8> %0, %1
+ ret <4 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @shl_binop_4xi8_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = shl nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <4 x i8> @shl_binop_4xi8_nuw_nsw(<4 x i8>, <4 x i8>) {
+ %3 = shl nuw nsw <4 x i8> %0, %1
+ ret <4 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @shl_binop_4xi8_nuw_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = shl nuw nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <4 x i8> @udiv_binop_4xi8(<4 x i8>, <4 x i8>) {
+ %3 = udiv <4 x i8> %0, %1
+ ret <4 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @udiv_binop_4xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = udiv <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <4 x i8> @udiv_binop_4xi8_exact(<4 x i8>, <4 x i8>) {
+ %3 = udiv exact <4 x i8> %0, %1
+ ret <4 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @udiv_binop_4xi8_exact(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = udiv exact <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <4 x i8> @sdiv_binop_4xi8(<4 x i8>, <4 x i8>) {
+ %3 = sdiv <4 x i8> %0, %1
+ ret <4 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @sdiv_binop_4xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = sdiv <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <4 x i8> @sdiv_binop_4xi8_exact(<4 x i8>, <4 x i8>) {
+ %3 = sdiv exact <4 x i8> %0, %1
+ ret <4 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @sdiv_binop_4xi8_exact(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = sdiv exact <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <4 x i8> @lshr_binop_4xi8(<4 x i8>, <4 x i8>) {
+ %3 = lshr <4 x i8> %0, %1
+ ret <4 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @lshr_binop_4xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = lshr <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <4 x i8> @lshr_binop_4xi8_exact(<4 x i8>, <4 x i8>) {
+ %3 = lshr exact <4 x i8> %0, %1
+ ret <4 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @lshr_binop_4xi8_exact(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = lshr exact <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <4 x i8> @ashr_binop_4xi8(<4 x i8>, <4 x i8>) {
+ %3 = ashr <4 x i8> %0, %1
+ ret <4 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @ashr_binop_4xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = ashr <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <4 x i8> @ashr_binop_4xi8_exact(<4 x i8>, <4 x i8>) {
+ %3 = ashr exact <4 x i8> %0, %1
+ ret <4 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @ashr_binop_4xi8_exact(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = ashr exact <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <4 x i8> @and_binop_4xi8(<4 x i8>, <4 x i8>) {
+ %3 = and <4 x i8> %0, %1
+ ret <4 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @and_binop_4xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = and <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <4 x i8> @xor_binop_4xi8(<4 x i8>, <4 x i8>) {
+ %3 = xor <4 x i8> %0, %1
+ ret <4 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @xor_binop_4xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = xor <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <4 x i8> @or_binop_4xi8(<4 x i8>, <4 x i8>) {
+ %3 = or <4 x i8> %0, %1
+ ret <4 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @or_binop_4xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = or <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <4 x i8> @urem_binop_4xi8(<4 x i8>, <4 x i8>) {
+ %3 = urem <4 x i8> %0, %1
+ ret <4 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @urem_binop_4xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = urem <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <4 x i8> @srem_binop_4xi8(<4 x i8>, <4 x i8>) {
+ %3 = srem <4 x i8> %0, %1
+ ret <4 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @srem_binop_4xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = srem <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <4 x i16> @add_binop_4xi16_nuw(<4 x i16>, <4 x i16>) {
+ %3 = add nuw <4 x i16> %0, %1
+ ret <4 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @add_binop_4xi16_nuw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = add nuw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <4 x i16> @add_binop_4xi16_nsw(<4 x i16>, <4 x i16>) {
+ %3 = add nsw <4 x i16> %0, %1
+ ret <4 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @add_binop_4xi16_nsw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = add nsw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <4 x i16> @add_binop_4xi16_nuw_nsw(<4 x i16>, <4 x i16>) {
+ %3 = add nuw nsw <4 x i16> %0, %1
+ ret <4 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @add_binop_4xi16_nuw_nsw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = add nuw nsw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <4 x i16> @sub_binop_4xi16_nuw(<4 x i16>, <4 x i16>) {
+ %3 = sub nuw <4 x i16> %0, %1
+ ret <4 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @sub_binop_4xi16_nuw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = sub nuw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <4 x i16> @sub_binop_4xi16_nsw(<4 x i16>, <4 x i16>) {
+ %3 = sub nsw <4 x i16> %0, %1
+ ret <4 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @sub_binop_4xi16_nsw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = sub nsw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <4 x i16> @sub_binop_4xi16_nuw_nsw(<4 x i16>, <4 x i16>) {
+ %3 = sub nuw nsw <4 x i16> %0, %1
+ ret <4 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @sub_binop_4xi16_nuw_nsw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = sub nuw nsw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <4 x i16> @mul_binop_4xi16_nuw(<4 x i16>, <4 x i16>) {
+ %3 = mul nuw <4 x i16> %0, %1
+ ret <4 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @mul_binop_4xi16_nuw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = mul nuw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <4 x i16> @mul_binop_4xi16_nsw(<4 x i16>, <4 x i16>) {
+ %3 = mul nsw <4 x i16> %0, %1
+ ret <4 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @mul_binop_4xi16_nsw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = mul nsw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <4 x i16> @mul_binop_4xi16_nuw_nsw(<4 x i16>, <4 x i16>) {
+ %3 = mul nuw nsw <4 x i16> %0, %1
+ ret <4 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @mul_binop_4xi16_nuw_nsw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = mul nuw nsw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <4 x i16> @shl_binop_4xi16_nuw(<4 x i16>, <4 x i16>) {
+ %3 = shl nuw <4 x i16> %0, %1
+ ret <4 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @shl_binop_4xi16_nuw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = shl nuw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <4 x i16> @shl_binop_4xi16_nsw(<4 x i16>, <4 x i16>) {
+ %3 = shl nsw <4 x i16> %0, %1
+ ret <4 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @shl_binop_4xi16_nsw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = shl nsw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <4 x i16> @shl_binop_4xi16_nuw_nsw(<4 x i16>, <4 x i16>) {
+ %3 = shl nuw nsw <4 x i16> %0, %1
+ ret <4 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @shl_binop_4xi16_nuw_nsw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = shl nuw nsw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <4 x i16> @udiv_binop_4xi16(<4 x i16>, <4 x i16>) {
+ %3 = udiv <4 x i16> %0, %1
+ ret <4 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @udiv_binop_4xi16(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = udiv <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <4 x i16> @udiv_binop_4xi16_exact(<4 x i16>, <4 x i16>) {
+ %3 = udiv exact <4 x i16> %0, %1
+ ret <4 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @udiv_binop_4xi16_exact(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = udiv exact <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <4 x i16> @sdiv_binop_4xi16(<4 x i16>, <4 x i16>) {
+ %3 = sdiv <4 x i16> %0, %1
+ ret <4 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @sdiv_binop_4xi16(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = sdiv <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <4 x i16> @sdiv_binop_4xi16_exact(<4 x i16>, <4 x i16>) {
+ %3 = sdiv exact <4 x i16> %0, %1
+ ret <4 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @sdiv_binop_4xi16_exact(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = sdiv exact <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <4 x i16> @lshr_binop_4xi16(<4 x i16>, <4 x i16>) {
+ %3 = lshr <4 x i16> %0, %1
+ ret <4 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @lshr_binop_4xi16(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = lshr <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <4 x i16> @lshr_binop_4xi16_exact(<4 x i16>, <4 x i16>) {
+ %3 = lshr exact <4 x i16> %0, %1
+ ret <4 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @lshr_binop_4xi16_exact(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = lshr exact <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <4 x i16> @ashr_binop_4xi16(<4 x i16>, <4 x i16>) {
+ %3 = ashr <4 x i16> %0, %1
+ ret <4 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @ashr_binop_4xi16(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = ashr <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <4 x i16> @ashr_binop_4xi16_exact(<4 x i16>, <4 x i16>) {
+ %3 = ashr exact <4 x i16> %0, %1
+ ret <4 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @ashr_binop_4xi16_exact(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = ashr exact <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <4 x i16> @and_binop_4xi16(<4 x i16>, <4 x i16>) {
+ %3 = and <4 x i16> %0, %1
+ ret <4 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @and_binop_4xi16(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = and <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <4 x i16> @xor_binop_4xi16(<4 x i16>, <4 x i16>) {
+ %3 = xor <4 x i16> %0, %1
+ ret <4 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @xor_binop_4xi16(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = xor <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <4 x i16> @or_binop_4xi16(<4 x i16>, <4 x i16>) {
+ %3 = or <4 x i16> %0, %1
+ ret <4 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @or_binop_4xi16(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = or <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <4 x i16> @urem_binop_4xi16(<4 x i16>, <4 x i16>) {
+ %3 = urem <4 x i16> %0, %1
+ ret <4 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @urem_binop_4xi16(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = urem <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <4 x i16> @srem_binop_4xi16(<4 x i16>, <4 x i16>) {
+ %3 = srem <4 x i16> %0, %1
+ ret <4 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @srem_binop_4xi16(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = srem <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <4 x i32> @add_binop_4xi32_nuw(<4 x i32>, <4 x i32>) {
+ %3 = add nuw <4 x i32> %0, %1
+ ret <4 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @add_binop_4xi32_nuw(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = add nuw <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <4 x i32> @add_binop_4xi32_nsw(<4 x i32>, <4 x i32>) {
+ %3 = add nsw <4 x i32> %0, %1
+ ret <4 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @add_binop_4xi32_nsw(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = add nsw <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <4 x i32> @add_binop_4xi32_nuw_nsw(<4 x i32>, <4 x i32>) {
+ %3 = add nuw nsw <4 x i32> %0, %1
+ ret <4 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @add_binop_4xi32_nuw_nsw(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = add nuw nsw <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <4 x i32> @sub_binop_4xi32_nuw(<4 x i32>, <4 x i32>) {
+ %3 = sub nuw <4 x i32> %0, %1
+ ret <4 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @sub_binop_4xi32_nuw(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = sub nuw <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <4 x i32> @sub_binop_4xi32_nsw(<4 x i32>, <4 x i32>) {
+ %3 = sub nsw <4 x i32> %0, %1
+ ret <4 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @sub_binop_4xi32_nsw(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = sub nsw <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <4 x i32> @sub_binop_4xi32_nuw_nsw(<4 x i32>, <4 x i32>) {
+ %3 = sub nuw nsw <4 x i32> %0, %1
+ ret <4 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @sub_binop_4xi32_nuw_nsw(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = sub nuw nsw <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <4 x i32> @mul_binop_4xi32_nuw(<4 x i32>, <4 x i32>) {
+ %3 = mul nuw <4 x i32> %0, %1
+ ret <4 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @mul_binop_4xi32_nuw(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = mul nuw <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <4 x i32> @mul_binop_4xi32_nsw(<4 x i32>, <4 x i32>) {
+ %3 = mul nsw <4 x i32> %0, %1
+ ret <4 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @mul_binop_4xi32_nsw(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = mul nsw <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <4 x i32> @mul_binop_4xi32_nuw_nsw(<4 x i32>, <4 x i32>) {
+ %3 = mul nuw nsw <4 x i32> %0, %1
+ ret <4 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @mul_binop_4xi32_nuw_nsw(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = mul nuw nsw <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <4 x i32> @shl_binop_4xi32_nuw(<4 x i32>, <4 x i32>) {
+ %3 = shl nuw <4 x i32> %0, %1
+ ret <4 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @shl_binop_4xi32_nuw(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = shl nuw <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <4 x i32> @shl_binop_4xi32_nsw(<4 x i32>, <4 x i32>) {
+ %3 = shl nsw <4 x i32> %0, %1
+ ret <4 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @shl_binop_4xi32_nsw(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = shl nsw <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <4 x i32> @shl_binop_4xi32_nuw_nsw(<4 x i32>, <4 x i32>) {
+ %3 = shl nuw nsw <4 x i32> %0, %1
+ ret <4 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @shl_binop_4xi32_nuw_nsw(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = shl nuw nsw <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <4 x i32> @udiv_binop_4xi32(<4 x i32>, <4 x i32>) {
+ %3 = udiv <4 x i32> %0, %1
+ ret <4 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @udiv_binop_4xi32(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = udiv <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <4 x i32> @udiv_binop_4xi32_exact(<4 x i32>, <4 x i32>) {
+ %3 = udiv exact <4 x i32> %0, %1
+ ret <4 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @udiv_binop_4xi32_exact(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = udiv exact <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <4 x i32> @sdiv_binop_4xi32(<4 x i32>, <4 x i32>) {
+ %3 = sdiv <4 x i32> %0, %1
+ ret <4 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @sdiv_binop_4xi32(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = sdiv <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <4 x i32> @sdiv_binop_4xi32_exact(<4 x i32>, <4 x i32>) {
+ %3 = sdiv exact <4 x i32> %0, %1
+ ret <4 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @sdiv_binop_4xi32_exact(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = sdiv exact <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <4 x i32> @lshr_binop_4xi32(<4 x i32>, <4 x i32>) {
+ %3 = lshr <4 x i32> %0, %1
+ ret <4 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @lshr_binop_4xi32(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = lshr <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <4 x i32> @lshr_binop_4xi32_exact(<4 x i32>, <4 x i32>) {
+ %3 = lshr exact <4 x i32> %0, %1
+ ret <4 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @lshr_binop_4xi32_exact(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = lshr exact <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <4 x i32> @ashr_binop_4xi32(<4 x i32>, <4 x i32>) {
+ %3 = ashr <4 x i32> %0, %1
+ ret <4 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @ashr_binop_4xi32(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = ashr <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <4 x i32> @ashr_binop_4xi32_exact(<4 x i32>, <4 x i32>) {
+ %3 = ashr exact <4 x i32> %0, %1
+ ret <4 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @ashr_binop_4xi32_exact(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = ashr exact <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <4 x i32> @and_binop_4xi32(<4 x i32>, <4 x i32>) {
+ %3 = and <4 x i32> %0, %1
+ ret <4 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @and_binop_4xi32(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = and <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <4 x i32> @xor_binop_4xi32(<4 x i32>, <4 x i32>) {
+ %3 = xor <4 x i32> %0, %1
+ ret <4 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @xor_binop_4xi32(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = xor <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <4 x i32> @or_binop_4xi32(<4 x i32>, <4 x i32>) {
+ %3 = or <4 x i32> %0, %1
+ ret <4 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @or_binop_4xi32(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = or <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <4 x i32> @urem_binop_4xi32(<4 x i32>, <4 x i32>) {
+ %3 = urem <4 x i32> %0, %1
+ ret <4 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @urem_binop_4xi32(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = urem <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <4 x i32> @srem_binop_4xi32(<4 x i32>, <4 x i32>) {
+ %3 = srem <4 x i32> %0, %1
+ ret <4 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @srem_binop_4xi32(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: %3 = srem <4 x i32> %0, %1
+; CHECK-NEXT: ret <4 x i32> %3
+
+define <4 x i64> @add_binop_4xi64_nuw(<4 x i64>, <4 x i64>) {
+ %3 = add nuw <4 x i64> %0, %1
+ ret <4 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @add_binop_4xi64_nuw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %6 = add nuw <2 x i64> %1, %3
+; CHECK-NEXT: %7 = add nuw <2 x i64> %2, %4
+; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16
+; CHECK-NEXT: ret <2 x i64> %6
+
+define <4 x i64> @add_binop_4xi64_nsw(<4 x i64>, <4 x i64>) {
+ %3 = add nsw <4 x i64> %0, %1
+ ret <4 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @add_binop_4xi64_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %6 = add nsw <2 x i64> %1, %3
+; CHECK-NEXT: %7 = add nsw <2 x i64> %2, %4
+; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16
+; CHECK-NEXT: ret <2 x i64> %6
+
+define <4 x i64> @add_binop_4xi64_nuw_nsw(<4 x i64>, <4 x i64>) {
+ %3 = add nuw nsw <4 x i64> %0, %1
+ ret <4 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @add_binop_4xi64_nuw_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %6 = add nuw nsw <2 x i64> %1, %3
+; CHECK-NEXT: %7 = add nuw nsw <2 x i64> %2, %4
+; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16
+; CHECK-NEXT: ret <2 x i64> %6
+
+define <4 x i64> @sub_binop_4xi64_nuw(<4 x i64>, <4 x i64>) {
+ %3 = sub nuw <4 x i64> %0, %1
+ ret <4 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @sub_binop_4xi64_nuw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %6 = sub nuw <2 x i64> %1, %3
+; CHECK-NEXT: %7 = sub nuw <2 x i64> %2, %4
+; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16
+; CHECK-NEXT: ret <2 x i64> %6
+
+define <4 x i64> @sub_binop_4xi64_nsw(<4 x i64>, <4 x i64>) {
+ %3 = sub nsw <4 x i64> %0, %1
+ ret <4 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @sub_binop_4xi64_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %6 = sub nsw <2 x i64> %1, %3
+; CHECK-NEXT: %7 = sub nsw <2 x i64> %2, %4
+; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16
+; CHECK-NEXT: ret <2 x i64> %6
+
+define <4 x i64> @sub_binop_4xi64_nuw_nsw(<4 x i64>, <4 x i64>) {
+ %3 = sub nuw nsw <4 x i64> %0, %1
+ ret <4 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @sub_binop_4xi64_nuw_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %6 = sub nuw nsw <2 x i64> %1, %3
+; CHECK-NEXT: %7 = sub nuw nsw <2 x i64> %2, %4
+; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16
+; CHECK-NEXT: ret <2 x i64> %6
+
+define <4 x i64> @mul_binop_4xi64_nuw(<4 x i64>, <4 x i64>) {
+ %3 = mul nuw <4 x i64> %0, %1
+ ret <4 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @mul_binop_4xi64_nuw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %6 = mul nuw <2 x i64> %1, %3
+; CHECK-NEXT: %7 = mul nuw <2 x i64> %2, %4
+; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16
+; CHECK-NEXT: ret <2 x i64> %6
+
+define <4 x i64> @mul_binop_4xi64_nsw(<4 x i64>, <4 x i64>) {
+ %3 = mul nsw <4 x i64> %0, %1
+ ret <4 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @mul_binop_4xi64_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %6 = mul nsw <2 x i64> %1, %3
+; CHECK-NEXT: %7 = mul nsw <2 x i64> %2, %4
+; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16
+; CHECK-NEXT: ret <2 x i64> %6
+
+define <4 x i64> @mul_binop_4xi64_nuw_nsw(<4 x i64>, <4 x i64>) {
+ %3 = mul nuw nsw <4 x i64> %0, %1
+ ret <4 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @mul_binop_4xi64_nuw_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %6 = mul nuw nsw <2 x i64> %1, %3
+; CHECK-NEXT: %7 = mul nuw nsw <2 x i64> %2, %4
+; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16
+; CHECK-NEXT: ret <2 x i64> %6
+
+define <4 x i64> @shl_binop_4xi64_nuw(<4 x i64>, <4 x i64>) {
+ %3 = shl nuw <4 x i64> %0, %1
+ ret <4 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @shl_binop_4xi64_nuw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %6 = shl nuw <2 x i64> %1, %3
+; CHECK-NEXT: %7 = shl nuw <2 x i64> %2, %4
+; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16
+; CHECK-NEXT: ret <2 x i64> %6
+
+define <4 x i64> @shl_binop_4xi64_nsw(<4 x i64>, <4 x i64>) {
+ %3 = shl nsw <4 x i64> %0, %1
+ ret <4 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @shl_binop_4xi64_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %6 = shl nsw <2 x i64> %1, %3
+; CHECK-NEXT: %7 = shl nsw <2 x i64> %2, %4
+; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16
+; CHECK-NEXT: ret <2 x i64> %6
+
+define <4 x i64> @shl_binop_4xi64_nuw_nsw(<4 x i64>, <4 x i64>) {
+ %3 = shl nuw nsw <4 x i64> %0, %1
+ ret <4 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @shl_binop_4xi64_nuw_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %6 = shl nuw nsw <2 x i64> %1, %3
+; CHECK-NEXT: %7 = shl nuw nsw <2 x i64> %2, %4
+; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16
+; CHECK-NEXT: ret <2 x i64> %6
+
+define <4 x i64> @udiv_binop_4xi64(<4 x i64>, <4 x i64>) {
+ %3 = udiv <4 x i64> %0, %1
+ ret <4 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @udiv_binop_4xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %6 = udiv <2 x i64> %1, %3
+; CHECK-NEXT: %7 = udiv <2 x i64> %2, %4
+; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16
+; CHECK-NEXT: ret <2 x i64> %6
+
+define <4 x i64> @udiv_binop_4xi64_exact(<4 x i64>, <4 x i64>) {
+ %3 = udiv exact <4 x i64> %0, %1
+ ret <4 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @udiv_binop_4xi64_exact(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %6 = udiv exact <2 x i64> %1, %3
+; CHECK-NEXT: %7 = udiv exact <2 x i64> %2, %4
+; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16
+; CHECK-NEXT: ret <2 x i64> %6
+
+define <4 x i64> @sdiv_binop_4xi64(<4 x i64>, <4 x i64>) {
+ %3 = sdiv <4 x i64> %0, %1
+ ret <4 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @sdiv_binop_4xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %6 = sdiv <2 x i64> %1, %3
+; CHECK-NEXT: %7 = sdiv <2 x i64> %2, %4
+; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16
+; CHECK-NEXT: ret <2 x i64> %6
+
+define <4 x i64> @sdiv_binop_4xi64_exact(<4 x i64>, <4 x i64>) {
+ %3 = sdiv exact <4 x i64> %0, %1
+ ret <4 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @sdiv_binop_4xi64_exact(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %6 = sdiv exact <2 x i64> %1, %3
+; CHECK-NEXT: %7 = sdiv exact <2 x i64> %2, %4
+; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16
+; CHECK-NEXT: ret <2 x i64> %6
+
+define <4 x i64> @lshr_binop_4xi64(<4 x i64>, <4 x i64>) {
+ %3 = lshr <4 x i64> %0, %1
+ ret <4 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @lshr_binop_4xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %6 = lshr <2 x i64> %1, %3
+; CHECK-NEXT: %7 = lshr <2 x i64> %2, %4
+; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16
+; CHECK-NEXT: ret <2 x i64> %6
+
+define <4 x i64> @lshr_binop_4xi64_exact(<4 x i64>, <4 x i64>) {
+ %3 = lshr exact <4 x i64> %0, %1
+ ret <4 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @lshr_binop_4xi64_exact(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %6 = lshr exact <2 x i64> %1, %3
+; CHECK-NEXT: %7 = lshr exact <2 x i64> %2, %4
+; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16
+; CHECK-NEXT: ret <2 x i64> %6
+
+define <4 x i64> @ashr_binop_4xi64(<4 x i64>, <4 x i64>) {
+ %3 = ashr <4 x i64> %0, %1
+ ret <4 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @ashr_binop_4xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %6 = ashr <2 x i64> %1, %3
+; CHECK-NEXT: %7 = ashr <2 x i64> %2, %4
+; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16
+; CHECK-NEXT: ret <2 x i64> %6
+
+define <4 x i64> @ashr_binop_4xi64_exact(<4 x i64>, <4 x i64>) {
+ %3 = ashr exact <4 x i64> %0, %1
+ ret <4 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @ashr_binop_4xi64_exact(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %6 = ashr exact <2 x i64> %1, %3
+; CHECK-NEXT: %7 = ashr exact <2 x i64> %2, %4
+; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16
+; CHECK-NEXT: ret <2 x i64> %6
+
+define <4 x i64> @and_binop_4xi64(<4 x i64>, <4 x i64>) {
+ %3 = and <4 x i64> %0, %1
+ ret <4 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @and_binop_4xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %6 = and <2 x i64> %1, %3
+; CHECK-NEXT: %7 = and <2 x i64> %2, %4
+; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16
+; CHECK-NEXT: ret <2 x i64> %6
+
+define <4 x i64> @xor_binop_4xi64(<4 x i64>, <4 x i64>) {
+ %3 = xor <4 x i64> %0, %1
+ ret <4 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @xor_binop_4xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %6 = xor <2 x i64> %1, %3
+; CHECK-NEXT: %7 = xor <2 x i64> %2, %4
+; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16
+; CHECK-NEXT: ret <2 x i64> %6
+
+define <4 x i64> @or_binop_4xi64(<4 x i64>, <4 x i64>) {
+ %3 = or <4 x i64> %0, %1
+ ret <4 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @or_binop_4xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %6 = or <2 x i64> %1, %3
+; CHECK-NEXT: %7 = or <2 x i64> %2, %4
+; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16
+; CHECK-NEXT: ret <2 x i64> %6
+
+define <4 x i64> @urem_binop_4xi64(<4 x i64>, <4 x i64>) {
+ %3 = urem <4 x i64> %0, %1
+ ret <4 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @urem_binop_4xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %6 = urem <2 x i64> %1, %3
+; CHECK-NEXT: %7 = urem <2 x i64> %2, %4
+; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16
+; CHECK-NEXT: ret <2 x i64> %6
+
+define <4 x i64> @srem_binop_4xi64(<4 x i64>, <4 x i64>) {
+ %3 = srem <4 x i64> %0, %1
+ ret <4 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @srem_binop_4xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %6 = srem <2 x i64> %1, %3
+; CHECK-NEXT: %7 = srem <2 x i64> %2, %4
+; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16
+; CHECK-NEXT: ret <2 x i64> %6
+
+define <6 x i8> @add_binop_6xi8_nuw(<6 x i8>, <6 x i8>) {
+ %3 = add nuw <6 x i8> %0, %1
+ ret <6 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @add_binop_6xi8_nuw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = add nuw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <6 x i8> @add_binop_6xi8_nsw(<6 x i8>, <6 x i8>) {
+ %3 = add nsw <6 x i8> %0, %1
+ ret <6 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @add_binop_6xi8_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = add nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <6 x i8> @add_binop_6xi8_nuw_nsw(<6 x i8>, <6 x i8>) {
+ %3 = add nuw nsw <6 x i8> %0, %1
+ ret <6 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @add_binop_6xi8_nuw_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = add nuw nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <6 x i8> @sub_binop_6xi8_nuw(<6 x i8>, <6 x i8>) {
+ %3 = sub nuw <6 x i8> %0, %1
+ ret <6 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @sub_binop_6xi8_nuw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = sub nuw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <6 x i8> @sub_binop_6xi8_nsw(<6 x i8>, <6 x i8>) {
+ %3 = sub nsw <6 x i8> %0, %1
+ ret <6 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @sub_binop_6xi8_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = sub nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <6 x i8> @sub_binop_6xi8_nuw_nsw(<6 x i8>, <6 x i8>) {
+ %3 = sub nuw nsw <6 x i8> %0, %1
+ ret <6 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @sub_binop_6xi8_nuw_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = sub nuw nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <6 x i8> @mul_binop_6xi8_nuw(<6 x i8>, <6 x i8>) {
+ %3 = mul nuw <6 x i8> %0, %1
+ ret <6 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @mul_binop_6xi8_nuw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = mul nuw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <6 x i8> @mul_binop_6xi8_nsw(<6 x i8>, <6 x i8>) {
+ %3 = mul nsw <6 x i8> %0, %1
+ ret <6 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @mul_binop_6xi8_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = mul nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <6 x i8> @mul_binop_6xi8_nuw_nsw(<6 x i8>, <6 x i8>) {
+ %3 = mul nuw nsw <6 x i8> %0, %1
+ ret <6 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @mul_binop_6xi8_nuw_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = mul nuw nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <6 x i8> @shl_binop_6xi8_nuw(<6 x i8>, <6 x i8>) {
+ %3 = shl nuw <6 x i8> %0, %1
+ ret <6 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @shl_binop_6xi8_nuw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = shl nuw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <6 x i8> @shl_binop_6xi8_nsw(<6 x i8>, <6 x i8>) {
+ %3 = shl nsw <6 x i8> %0, %1
+ ret <6 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @shl_binop_6xi8_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = shl nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <6 x i8> @shl_binop_6xi8_nuw_nsw(<6 x i8>, <6 x i8>) {
+ %3 = shl nuw nsw <6 x i8> %0, %1
+ ret <6 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @shl_binop_6xi8_nuw_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = shl nuw nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <6 x i8> @udiv_binop_6xi8(<6 x i8>, <6 x i8>) {
+ %3 = udiv <6 x i8> %0, %1
+ ret <6 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @udiv_binop_6xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = udiv <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <6 x i8> @udiv_binop_6xi8_exact(<6 x i8>, <6 x i8>) {
+ %3 = udiv exact <6 x i8> %0, %1
+ ret <6 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @udiv_binop_6xi8_exact(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = udiv exact <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <6 x i8> @sdiv_binop_6xi8(<6 x i8>, <6 x i8>) {
+ %3 = sdiv <6 x i8> %0, %1
+ ret <6 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @sdiv_binop_6xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = sdiv <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <6 x i8> @sdiv_binop_6xi8_exact(<6 x i8>, <6 x i8>) {
+ %3 = sdiv exact <6 x i8> %0, %1
+ ret <6 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @sdiv_binop_6xi8_exact(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = sdiv exact <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <6 x i8> @lshr_binop_6xi8(<6 x i8>, <6 x i8>) {
+ %3 = lshr <6 x i8> %0, %1
+ ret <6 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @lshr_binop_6xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = lshr <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <6 x i8> @lshr_binop_6xi8_exact(<6 x i8>, <6 x i8>) {
+ %3 = lshr exact <6 x i8> %0, %1
+ ret <6 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @lshr_binop_6xi8_exact(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = lshr exact <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <6 x i8> @ashr_binop_6xi8(<6 x i8>, <6 x i8>) {
+ %3 = ashr <6 x i8> %0, %1
+ ret <6 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @ashr_binop_6xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = ashr <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <6 x i8> @ashr_binop_6xi8_exact(<6 x i8>, <6 x i8>) {
+ %3 = ashr exact <6 x i8> %0, %1
+ ret <6 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @ashr_binop_6xi8_exact(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = ashr exact <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <6 x i8> @and_binop_6xi8(<6 x i8>, <6 x i8>) {
+ %3 = and <6 x i8> %0, %1
+ ret <6 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @and_binop_6xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = and <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <6 x i8> @xor_binop_6xi8(<6 x i8>, <6 x i8>) {
+ %3 = xor <6 x i8> %0, %1
+ ret <6 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @xor_binop_6xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = xor <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <6 x i8> @or_binop_6xi8(<6 x i8>, <6 x i8>) {
+ %3 = or <6 x i8> %0, %1
+ ret <6 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @or_binop_6xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = or <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <6 x i8> @urem_binop_6xi8(<6 x i8>, <6 x i8>) {
+ %3 = urem <6 x i8> %0, %1
+ ret <6 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @urem_binop_6xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = urem <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <6 x i8> @srem_binop_6xi8(<6 x i8>, <6 x i8>) {
+ %3 = srem <6 x i8> %0, %1
+ ret <6 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @srem_binop_6xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = srem <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <6 x i16> @add_binop_6xi16_nuw(<6 x i16>, <6 x i16>) {
+ %3 = add nuw <6 x i16> %0, %1
+ ret <6 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @add_binop_6xi16_nuw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = add nuw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <6 x i16> @add_binop_6xi16_nsw(<6 x i16>, <6 x i16>) {
+ %3 = add nsw <6 x i16> %0, %1
+ ret <6 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @add_binop_6xi16_nsw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = add nsw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <6 x i16> @add_binop_6xi16_nuw_nsw(<6 x i16>, <6 x i16>) {
+ %3 = add nuw nsw <6 x i16> %0, %1
+ ret <6 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @add_binop_6xi16_nuw_nsw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = add nuw nsw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <6 x i16> @sub_binop_6xi16_nuw(<6 x i16>, <6 x i16>) {
+ %3 = sub nuw <6 x i16> %0, %1
+ ret <6 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @sub_binop_6xi16_nuw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = sub nuw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <6 x i16> @sub_binop_6xi16_nsw(<6 x i16>, <6 x i16>) {
+ %3 = sub nsw <6 x i16> %0, %1
+ ret <6 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @sub_binop_6xi16_nsw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = sub nsw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <6 x i16> @sub_binop_6xi16_nuw_nsw(<6 x i16>, <6 x i16>) {
+ %3 = sub nuw nsw <6 x i16> %0, %1
+ ret <6 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @sub_binop_6xi16_nuw_nsw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = sub nuw nsw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <6 x i16> @mul_binop_6xi16_nuw(<6 x i16>, <6 x i16>) {
+ %3 = mul nuw <6 x i16> %0, %1
+ ret <6 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @mul_binop_6xi16_nuw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = mul nuw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <6 x i16> @mul_binop_6xi16_nsw(<6 x i16>, <6 x i16>) {
+ %3 = mul nsw <6 x i16> %0, %1
+ ret <6 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @mul_binop_6xi16_nsw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = mul nsw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <6 x i16> @mul_binop_6xi16_nuw_nsw(<6 x i16>, <6 x i16>) {
+ %3 = mul nuw nsw <6 x i16> %0, %1
+ ret <6 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @mul_binop_6xi16_nuw_nsw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = mul nuw nsw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <6 x i16> @shl_binop_6xi16_nuw(<6 x i16>, <6 x i16>) {
+ %3 = shl nuw <6 x i16> %0, %1
+ ret <6 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @shl_binop_6xi16_nuw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = shl nuw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <6 x i16> @shl_binop_6xi16_nsw(<6 x i16>, <6 x i16>) {
+ %3 = shl nsw <6 x i16> %0, %1
+ ret <6 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @shl_binop_6xi16_nsw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = shl nsw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <6 x i16> @shl_binop_6xi16_nuw_nsw(<6 x i16>, <6 x i16>) {
+ %3 = shl nuw nsw <6 x i16> %0, %1
+ ret <6 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @shl_binop_6xi16_nuw_nsw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = shl nuw nsw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <6 x i16> @udiv_binop_6xi16(<6 x i16>, <6 x i16>) {
+ %3 = udiv <6 x i16> %0, %1
+ ret <6 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @udiv_binop_6xi16(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = udiv <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <6 x i16> @udiv_binop_6xi16_exact(<6 x i16>, <6 x i16>) {
+ %3 = udiv exact <6 x i16> %0, %1
+ ret <6 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @udiv_binop_6xi16_exact(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = udiv exact <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <6 x i16> @sdiv_binop_6xi16(<6 x i16>, <6 x i16>) {
+ %3 = sdiv <6 x i16> %0, %1
+ ret <6 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @sdiv_binop_6xi16(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = sdiv <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <6 x i16> @sdiv_binop_6xi16_exact(<6 x i16>, <6 x i16>) {
+ %3 = sdiv exact <6 x i16> %0, %1
+ ret <6 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @sdiv_binop_6xi16_exact(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = sdiv exact <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <6 x i16> @lshr_binop_6xi16(<6 x i16>, <6 x i16>) {
+ %3 = lshr <6 x i16> %0, %1
+ ret <6 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @lshr_binop_6xi16(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = lshr <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <6 x i16> @lshr_binop_6xi16_exact(<6 x i16>, <6 x i16>) {
+ %3 = lshr exact <6 x i16> %0, %1
+ ret <6 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @lshr_binop_6xi16_exact(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = lshr exact <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <6 x i16> @ashr_binop_6xi16(<6 x i16>, <6 x i16>) {
+ %3 = ashr <6 x i16> %0, %1
+ ret <6 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @ashr_binop_6xi16(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = ashr <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <6 x i16> @ashr_binop_6xi16_exact(<6 x i16>, <6 x i16>) {
+ %3 = ashr exact <6 x i16> %0, %1
+ ret <6 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @ashr_binop_6xi16_exact(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = ashr exact <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <6 x i16> @and_binop_6xi16(<6 x i16>, <6 x i16>) {
+ %3 = and <6 x i16> %0, %1
+ ret <6 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @and_binop_6xi16(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = and <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <6 x i16> @xor_binop_6xi16(<6 x i16>, <6 x i16>) {
+ %3 = xor <6 x i16> %0, %1
+ ret <6 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @xor_binop_6xi16(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = xor <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <6 x i16> @or_binop_6xi16(<6 x i16>, <6 x i16>) {
+ %3 = or <6 x i16> %0, %1
+ ret <6 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @or_binop_6xi16(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = or <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <6 x i16> @urem_binop_6xi16(<6 x i16>, <6 x i16>) {
+ %3 = urem <6 x i16> %0, %1
+ ret <6 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @urem_binop_6xi16(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = urem <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <6 x i16> @srem_binop_6xi16(<6 x i16>, <6 x i16>) {
+ %3 = srem <6 x i16> %0, %1
+ ret <6 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @srem_binop_6xi16(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = srem <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <6 x i32> @add_binop_6xi32_nuw(<6 x i32>, <6 x i32>) {
+ %3 = add nuw <6 x i32> %0, %1
+ ret <6 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @add_binop_6xi32_nuw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = add nuw <4 x i32> %1, %3
+; CHECK-NEXT: %7 = add nuw <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <6 x i32> @add_binop_6xi32_nsw(<6 x i32>, <6 x i32>) {
+ %3 = add nsw <6 x i32> %0, %1
+ ret <6 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @add_binop_6xi32_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = add nsw <4 x i32> %1, %3
+; CHECK-NEXT: %7 = add nsw <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <6 x i32> @add_binop_6xi32_nuw_nsw(<6 x i32>, <6 x i32>) {
+ %3 = add nuw nsw <6 x i32> %0, %1
+ ret <6 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @add_binop_6xi32_nuw_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = add nuw nsw <4 x i32> %1, %3
+; CHECK-NEXT: %7 = add nuw nsw <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <6 x i32> @sub_binop_6xi32_nuw(<6 x i32>, <6 x i32>) {
+ %3 = sub nuw <6 x i32> %0, %1
+ ret <6 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @sub_binop_6xi32_nuw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = sub nuw <4 x i32> %1, %3
+; CHECK-NEXT: %7 = sub nuw <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <6 x i32> @sub_binop_6xi32_nsw(<6 x i32>, <6 x i32>) {
+ %3 = sub nsw <6 x i32> %0, %1
+ ret <6 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @sub_binop_6xi32_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = sub nsw <4 x i32> %1, %3
+; CHECK-NEXT: %7 = sub nsw <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <6 x i32> @sub_binop_6xi32_nuw_nsw(<6 x i32>, <6 x i32>) {
+ %3 = sub nuw nsw <6 x i32> %0, %1
+ ret <6 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @sub_binop_6xi32_nuw_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = sub nuw nsw <4 x i32> %1, %3
+; CHECK-NEXT: %7 = sub nuw nsw <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <6 x i32> @mul_binop_6xi32_nuw(<6 x i32>, <6 x i32>) {
+ %3 = mul nuw <6 x i32> %0, %1
+ ret <6 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @mul_binop_6xi32_nuw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = mul nuw <4 x i32> %1, %3
+; CHECK-NEXT: %7 = mul nuw <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <6 x i32> @mul_binop_6xi32_nsw(<6 x i32>, <6 x i32>) {
+ %3 = mul nsw <6 x i32> %0, %1
+ ret <6 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @mul_binop_6xi32_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = mul nsw <4 x i32> %1, %3
+; CHECK-NEXT: %7 = mul nsw <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <6 x i32> @mul_binop_6xi32_nuw_nsw(<6 x i32>, <6 x i32>) {
+ %3 = mul nuw nsw <6 x i32> %0, %1
+ ret <6 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @mul_binop_6xi32_nuw_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = mul nuw nsw <4 x i32> %1, %3
+; CHECK-NEXT: %7 = mul nuw nsw <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <6 x i32> @shl_binop_6xi32_nuw(<6 x i32>, <6 x i32>) {
+ %3 = shl nuw <6 x i32> %0, %1
+ ret <6 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @shl_binop_6xi32_nuw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = shl nuw <4 x i32> %1, %3
+; CHECK-NEXT: %7 = shl nuw <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <6 x i32> @shl_binop_6xi32_nsw(<6 x i32>, <6 x i32>) {
+ %3 = shl nsw <6 x i32> %0, %1
+ ret <6 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @shl_binop_6xi32_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = shl nsw <4 x i32> %1, %3
+; CHECK-NEXT: %7 = shl nsw <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <6 x i32> @shl_binop_6xi32_nuw_nsw(<6 x i32>, <6 x i32>) {
+ %3 = shl nuw nsw <6 x i32> %0, %1
+ ret <6 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @shl_binop_6xi32_nuw_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = shl nuw nsw <4 x i32> %1, %3
+; CHECK-NEXT: %7 = shl nuw nsw <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <6 x i32> @udiv_binop_6xi32(<6 x i32>, <6 x i32>) {
+ %3 = udiv <6 x i32> %0, %1
+ ret <6 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @udiv_binop_6xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = udiv <4 x i32> %1, %3
+; CHECK-NEXT: %7 = udiv <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <6 x i32> @udiv_binop_6xi32_exact(<6 x i32>, <6 x i32>) {
+ %3 = udiv exact <6 x i32> %0, %1
+ ret <6 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @udiv_binop_6xi32_exact(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = udiv exact <4 x i32> %1, %3
+; CHECK-NEXT: %7 = udiv exact <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <6 x i32> @sdiv_binop_6xi32(<6 x i32>, <6 x i32>) {
+ %3 = sdiv <6 x i32> %0, %1
+ ret <6 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @sdiv_binop_6xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = sdiv <4 x i32> %1, %3
+; CHECK-NEXT: %7 = sdiv <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <6 x i32> @sdiv_binop_6xi32_exact(<6 x i32>, <6 x i32>) {
+ %3 = sdiv exact <6 x i32> %0, %1
+ ret <6 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @sdiv_binop_6xi32_exact(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = sdiv exact <4 x i32> %1, %3
+; CHECK-NEXT: %7 = sdiv exact <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <6 x i32> @lshr_binop_6xi32(<6 x i32>, <6 x i32>) {
+ %3 = lshr <6 x i32> %0, %1
+ ret <6 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @lshr_binop_6xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = lshr <4 x i32> %1, %3
+; CHECK-NEXT: %7 = lshr <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <6 x i32> @lshr_binop_6xi32_exact(<6 x i32>, <6 x i32>) {
+ %3 = lshr exact <6 x i32> %0, %1
+ ret <6 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @lshr_binop_6xi32_exact(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = lshr exact <4 x i32> %1, %3
+; CHECK-NEXT: %7 = lshr exact <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <6 x i32> @ashr_binop_6xi32(<6 x i32>, <6 x i32>) {
+ %3 = ashr <6 x i32> %0, %1
+ ret <6 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @ashr_binop_6xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = ashr <4 x i32> %1, %3
+; CHECK-NEXT: %7 = ashr <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <6 x i32> @ashr_binop_6xi32_exact(<6 x i32>, <6 x i32>) {
+ %3 = ashr exact <6 x i32> %0, %1
+ ret <6 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @ashr_binop_6xi32_exact(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = ashr exact <4 x i32> %1, %3
+; CHECK-NEXT: %7 = ashr exact <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <6 x i32> @and_binop_6xi32(<6 x i32>, <6 x i32>) {
+ %3 = and <6 x i32> %0, %1
+ ret <6 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @and_binop_6xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = and <4 x i32> %1, %3
+; CHECK-NEXT: %7 = and <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <6 x i32> @xor_binop_6xi32(<6 x i32>, <6 x i32>) {
+ %3 = xor <6 x i32> %0, %1
+ ret <6 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @xor_binop_6xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = xor <4 x i32> %1, %3
+; CHECK-NEXT: %7 = xor <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <6 x i32> @or_binop_6xi32(<6 x i32>, <6 x i32>) {
+ %3 = or <6 x i32> %0, %1
+ ret <6 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @or_binop_6xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = or <4 x i32> %1, %3
+; CHECK-NEXT: %7 = or <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <6 x i32> @urem_binop_6xi32(<6 x i32>, <6 x i32>) {
+ %3 = urem <6 x i32> %0, %1
+ ret <6 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @urem_binop_6xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = urem <4 x i32> %1, %3
+; CHECK-NEXT: %7 = urem <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <6 x i32> @srem_binop_6xi32(<6 x i32>, <6 x i32>) {
+ %3 = srem <6 x i32> %0, %1
+ ret <6 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @srem_binop_6xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = srem <4 x i32> %1, %3
+; CHECK-NEXT: %7 = srem <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <6 x i64> @add_binop_6xi64_nuw(<6 x i64>, <6 x i64>) {
+ %3 = add nuw <6 x i64> %0, %1
+ ret <6 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @add_binop_6xi64_nuw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %9 = add nuw <2 x i64> %2, %5
+; CHECK-NEXT: %10 = add nuw <2 x i64> %3, %6
+; CHECK-NEXT: %11 = add nuw <2 x i64> %4, %7
+; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16
+; CHECK-NEXT: ret <2 x i64> %9
+
+define <6 x i64> @add_binop_6xi64_nsw(<6 x i64>, <6 x i64>) {
+ %3 = add nsw <6 x i64> %0, %1
+ ret <6 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @add_binop_6xi64_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %9 = add nsw <2 x i64> %2, %5
+; CHECK-NEXT: %10 = add nsw <2 x i64> %3, %6
+; CHECK-NEXT: %11 = add nsw <2 x i64> %4, %7
+; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16
+; CHECK-NEXT: ret <2 x i64> %9
+
+define <6 x i64> @add_binop_6xi64_nuw_nsw(<6 x i64>, <6 x i64>) {
+ %3 = add nuw nsw <6 x i64> %0, %1
+ ret <6 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @add_binop_6xi64_nuw_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %9 = add nuw nsw <2 x i64> %2, %5
+; CHECK-NEXT: %10 = add nuw nsw <2 x i64> %3, %6
+; CHECK-NEXT: %11 = add nuw nsw <2 x i64> %4, %7
+; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16
+; CHECK-NEXT: ret <2 x i64> %9
+
+define <6 x i64> @sub_binop_6xi64_nuw(<6 x i64>, <6 x i64>) {
+ %3 = sub nuw <6 x i64> %0, %1
+ ret <6 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @sub_binop_6xi64_nuw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %9 = sub nuw <2 x i64> %2, %5
+; CHECK-NEXT: %10 = sub nuw <2 x i64> %3, %6
+; CHECK-NEXT: %11 = sub nuw <2 x i64> %4, %7
+; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16
+; CHECK-NEXT: ret <2 x i64> %9
+
+define <6 x i64> @sub_binop_6xi64_nsw(<6 x i64>, <6 x i64>) {
+ %3 = sub nsw <6 x i64> %0, %1
+ ret <6 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @sub_binop_6xi64_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %9 = sub nsw <2 x i64> %2, %5
+; CHECK-NEXT: %10 = sub nsw <2 x i64> %3, %6
+; CHECK-NEXT: %11 = sub nsw <2 x i64> %4, %7
+; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16
+; CHECK-NEXT: ret <2 x i64> %9
+
+define <6 x i64> @sub_binop_6xi64_nuw_nsw(<6 x i64>, <6 x i64>) {
+ %3 = sub nuw nsw <6 x i64> %0, %1
+ ret <6 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @sub_binop_6xi64_nuw_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %9 = sub nuw nsw <2 x i64> %2, %5
+; CHECK-NEXT: %10 = sub nuw nsw <2 x i64> %3, %6
+; CHECK-NEXT: %11 = sub nuw nsw <2 x i64> %4, %7
+; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16
+; CHECK-NEXT: ret <2 x i64> %9
+
+define <6 x i64> @mul_binop_6xi64_nuw(<6 x i64>, <6 x i64>) {
+ %3 = mul nuw <6 x i64> %0, %1
+ ret <6 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @mul_binop_6xi64_nuw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %9 = mul nuw <2 x i64> %2, %5
+; CHECK-NEXT: %10 = mul nuw <2 x i64> %3, %6
+; CHECK-NEXT: %11 = mul nuw <2 x i64> %4, %7
+; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16
+; CHECK-NEXT: ret <2 x i64> %9
+
+define <6 x i64> @mul_binop_6xi64_nsw(<6 x i64>, <6 x i64>) {
+ %3 = mul nsw <6 x i64> %0, %1
+ ret <6 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @mul_binop_6xi64_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %9 = mul nsw <2 x i64> %2, %5
+; CHECK-NEXT: %10 = mul nsw <2 x i64> %3, %6
+; CHECK-NEXT: %11 = mul nsw <2 x i64> %4, %7
+; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16
+; CHECK-NEXT: ret <2 x i64> %9
+
+define <6 x i64> @mul_binop_6xi64_nuw_nsw(<6 x i64>, <6 x i64>) {
+ %3 = mul nuw nsw <6 x i64> %0, %1
+ ret <6 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @mul_binop_6xi64_nuw_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %9 = mul nuw nsw <2 x i64> %2, %5
+; CHECK-NEXT: %10 = mul nuw nsw <2 x i64> %3, %6
+; CHECK-NEXT: %11 = mul nuw nsw <2 x i64> %4, %7
+; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16
+; CHECK-NEXT: ret <2 x i64> %9
+
+define <6 x i64> @shl_binop_6xi64_nuw(<6 x i64>, <6 x i64>) {
+ %3 = shl nuw <6 x i64> %0, %1
+ ret <6 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @shl_binop_6xi64_nuw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %9 = shl nuw <2 x i64> %2, %5
+; CHECK-NEXT: %10 = shl nuw <2 x i64> %3, %6
+; CHECK-NEXT: %11 = shl nuw <2 x i64> %4, %7
+; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16
+; CHECK-NEXT: ret <2 x i64> %9
+
+define <6 x i64> @shl_binop_6xi64_nsw(<6 x i64>, <6 x i64>) {
+ %3 = shl nsw <6 x i64> %0, %1
+ ret <6 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @shl_binop_6xi64_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %9 = shl nsw <2 x i64> %2, %5
+; CHECK-NEXT: %10 = shl nsw <2 x i64> %3, %6
+; CHECK-NEXT: %11 = shl nsw <2 x i64> %4, %7
+; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16
+; CHECK-NEXT: ret <2 x i64> %9
+
+define <6 x i64> @shl_binop_6xi64_nuw_nsw(<6 x i64>, <6 x i64>) {
+ %3 = shl nuw nsw <6 x i64> %0, %1
+ ret <6 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @shl_binop_6xi64_nuw_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %9 = shl nuw nsw <2 x i64> %2, %5
+; CHECK-NEXT: %10 = shl nuw nsw <2 x i64> %3, %6
+; CHECK-NEXT: %11 = shl nuw nsw <2 x i64> %4, %7
+; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16
+; CHECK-NEXT: ret <2 x i64> %9
+
+define <6 x i64> @udiv_binop_6xi64(<6 x i64>, <6 x i64>) {
+ %3 = udiv <6 x i64> %0, %1
+ ret <6 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @udiv_binop_6xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %9 = udiv <2 x i64> %2, %5
+; CHECK-NEXT: %10 = udiv <2 x i64> %3, %6
+; CHECK-NEXT: %11 = udiv <2 x i64> %4, %7
+; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16
+; CHECK-NEXT: ret <2 x i64> %9
+
+define <6 x i64> @udiv_binop_6xi64_exact(<6 x i64>, <6 x i64>) {
+ %3 = udiv exact <6 x i64> %0, %1
+ ret <6 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @udiv_binop_6xi64_exact(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %9 = udiv exact <2 x i64> %2, %5
+; CHECK-NEXT: %10 = udiv exact <2 x i64> %3, %6
+; CHECK-NEXT: %11 = udiv exact <2 x i64> %4, %7
+; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16
+; CHECK-NEXT: ret <2 x i64> %9
+
+define <6 x i64> @sdiv_binop_6xi64(<6 x i64>, <6 x i64>) {
+ %3 = sdiv <6 x i64> %0, %1
+ ret <6 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @sdiv_binop_6xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %9 = sdiv <2 x i64> %2, %5
+; CHECK-NEXT: %10 = sdiv <2 x i64> %3, %6
+; CHECK-NEXT: %11 = sdiv <2 x i64> %4, %7
+; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16
+; CHECK-NEXT: ret <2 x i64> %9
+
+define <6 x i64> @sdiv_binop_6xi64_exact(<6 x i64>, <6 x i64>) {
+ %3 = sdiv exact <6 x i64> %0, %1
+ ret <6 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @sdiv_binop_6xi64_exact(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %9 = sdiv exact <2 x i64> %2, %5
+; CHECK-NEXT: %10 = sdiv exact <2 x i64> %3, %6
+; CHECK-NEXT: %11 = sdiv exact <2 x i64> %4, %7
+; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16
+; CHECK-NEXT: ret <2 x i64> %9
+
+define <6 x i64> @lshr_binop_6xi64(<6 x i64>, <6 x i64>) {
+ %3 = lshr <6 x i64> %0, %1
+ ret <6 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @lshr_binop_6xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %9 = lshr <2 x i64> %2, %5
+; CHECK-NEXT: %10 = lshr <2 x i64> %3, %6
+; CHECK-NEXT: %11 = lshr <2 x i64> %4, %7
+; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16
+; CHECK-NEXT: ret <2 x i64> %9
+
+define <6 x i64> @lshr_binop_6xi64_exact(<6 x i64>, <6 x i64>) {
+ %3 = lshr exact <6 x i64> %0, %1
+ ret <6 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @lshr_binop_6xi64_exact(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %9 = lshr exact <2 x i64> %2, %5
+; CHECK-NEXT: %10 = lshr exact <2 x i64> %3, %6
+; CHECK-NEXT: %11 = lshr exact <2 x i64> %4, %7
+; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16
+; CHECK-NEXT: ret <2 x i64> %9
+
+define <6 x i64> @ashr_binop_6xi64(<6 x i64>, <6 x i64>) {
+ %3 = ashr <6 x i64> %0, %1
+ ret <6 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @ashr_binop_6xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %9 = ashr <2 x i64> %2, %5
+; CHECK-NEXT: %10 = ashr <2 x i64> %3, %6
+; CHECK-NEXT: %11 = ashr <2 x i64> %4, %7
+; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16
+; CHECK-NEXT: ret <2 x i64> %9
+
+define <6 x i64> @ashr_binop_6xi64_exact(<6 x i64>, <6 x i64>) {
+ %3 = ashr exact <6 x i64> %0, %1
+ ret <6 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @ashr_binop_6xi64_exact(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %9 = ashr exact <2 x i64> %2, %5
+; CHECK-NEXT: %10 = ashr exact <2 x i64> %3, %6
+; CHECK-NEXT: %11 = ashr exact <2 x i64> %4, %7
+; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16
+; CHECK-NEXT: ret <2 x i64> %9
+
+define <6 x i64> @and_binop_6xi64(<6 x i64>, <6 x i64>) {
+ %3 = and <6 x i64> %0, %1
+ ret <6 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @and_binop_6xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %9 = and <2 x i64> %2, %5
+; CHECK-NEXT: %10 = and <2 x i64> %3, %6
+; CHECK-NEXT: %11 = and <2 x i64> %4, %7
+; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16
+; CHECK-NEXT: ret <2 x i64> %9
+
+define <6 x i64> @xor_binop_6xi64(<6 x i64>, <6 x i64>) {
+ %3 = xor <6 x i64> %0, %1
+ ret <6 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @xor_binop_6xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %9 = xor <2 x i64> %2, %5
+; CHECK-NEXT: %10 = xor <2 x i64> %3, %6
+; CHECK-NEXT: %11 = xor <2 x i64> %4, %7
+; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16
+; CHECK-NEXT: ret <2 x i64> %9
+
+define <6 x i64> @or_binop_6xi64(<6 x i64>, <6 x i64>) {
+ %3 = or <6 x i64> %0, %1
+ ret <6 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @or_binop_6xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %9 = or <2 x i64> %2, %5
+; CHECK-NEXT: %10 = or <2 x i64> %3, %6
+; CHECK-NEXT: %11 = or <2 x i64> %4, %7
+; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16
+; CHECK-NEXT: ret <2 x i64> %9
+
+define <6 x i64> @urem_binop_6xi64(<6 x i64>, <6 x i64>) {
+ %3 = urem <6 x i64> %0, %1
+ ret <6 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @urem_binop_6xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %9 = urem <2 x i64> %2, %5
+; CHECK-NEXT: %10 = urem <2 x i64> %3, %6
+; CHECK-NEXT: %11 = urem <2 x i64> %4, %7
+; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16
+; CHECK-NEXT: ret <2 x i64> %9
+
+define <6 x i64> @srem_binop_6xi64(<6 x i64>, <6 x i64>) {
+ %3 = srem <6 x i64> %0, %1
+ ret <6 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @srem_binop_6xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %9 = srem <2 x i64> %2, %5
+; CHECK-NEXT: %10 = srem <2 x i64> %3, %6
+; CHECK-NEXT: %11 = srem <2 x i64> %4, %7
+; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16
+; CHECK-NEXT: ret <2 x i64> %9
+
+define <8 x i8> @add_binop_8xi8_nuw(<8 x i8>, <8 x i8>) {
+ %3 = add nuw <8 x i8> %0, %1
+ ret <8 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @add_binop_8xi8_nuw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = add nuw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <8 x i8> @add_binop_8xi8_nsw(<8 x i8>, <8 x i8>) {
+ %3 = add nsw <8 x i8> %0, %1
+ ret <8 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @add_binop_8xi8_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = add nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <8 x i8> @add_binop_8xi8_nuw_nsw(<8 x i8>, <8 x i8>) {
+ %3 = add nuw nsw <8 x i8> %0, %1
+ ret <8 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @add_binop_8xi8_nuw_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = add nuw nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <8 x i8> @sub_binop_8xi8_nuw(<8 x i8>, <8 x i8>) {
+ %3 = sub nuw <8 x i8> %0, %1
+ ret <8 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @sub_binop_8xi8_nuw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = sub nuw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <8 x i8> @sub_binop_8xi8_nsw(<8 x i8>, <8 x i8>) {
+ %3 = sub nsw <8 x i8> %0, %1
+ ret <8 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @sub_binop_8xi8_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = sub nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <8 x i8> @sub_binop_8xi8_nuw_nsw(<8 x i8>, <8 x i8>) {
+ %3 = sub nuw nsw <8 x i8> %0, %1
+ ret <8 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @sub_binop_8xi8_nuw_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = sub nuw nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <8 x i8> @mul_binop_8xi8_nuw(<8 x i8>, <8 x i8>) {
+ %3 = mul nuw <8 x i8> %0, %1
+ ret <8 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @mul_binop_8xi8_nuw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = mul nuw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <8 x i8> @mul_binop_8xi8_nsw(<8 x i8>, <8 x i8>) {
+ %3 = mul nsw <8 x i8> %0, %1
+ ret <8 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @mul_binop_8xi8_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = mul nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <8 x i8> @mul_binop_8xi8_nuw_nsw(<8 x i8>, <8 x i8>) {
+ %3 = mul nuw nsw <8 x i8> %0, %1
+ ret <8 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @mul_binop_8xi8_nuw_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = mul nuw nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <8 x i8> @shl_binop_8xi8_nuw(<8 x i8>, <8 x i8>) {
+ %3 = shl nuw <8 x i8> %0, %1
+ ret <8 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @shl_binop_8xi8_nuw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = shl nuw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <8 x i8> @shl_binop_8xi8_nsw(<8 x i8>, <8 x i8>) {
+ %3 = shl nsw <8 x i8> %0, %1
+ ret <8 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @shl_binop_8xi8_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = shl nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <8 x i8> @shl_binop_8xi8_nuw_nsw(<8 x i8>, <8 x i8>) {
+ %3 = shl nuw nsw <8 x i8> %0, %1
+ ret <8 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @shl_binop_8xi8_nuw_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = shl nuw nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <8 x i8> @udiv_binop_8xi8(<8 x i8>, <8 x i8>) {
+ %3 = udiv <8 x i8> %0, %1
+ ret <8 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @udiv_binop_8xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = udiv <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <8 x i8> @udiv_binop_8xi8_exact(<8 x i8>, <8 x i8>) {
+ %3 = udiv exact <8 x i8> %0, %1
+ ret <8 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @udiv_binop_8xi8_exact(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = udiv exact <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <8 x i8> @sdiv_binop_8xi8(<8 x i8>, <8 x i8>) {
+ %3 = sdiv <8 x i8> %0, %1
+ ret <8 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @sdiv_binop_8xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = sdiv <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <8 x i8> @sdiv_binop_8xi8_exact(<8 x i8>, <8 x i8>) {
+ %3 = sdiv exact <8 x i8> %0, %1
+ ret <8 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @sdiv_binop_8xi8_exact(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = sdiv exact <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <8 x i8> @lshr_binop_8xi8(<8 x i8>, <8 x i8>) {
+ %3 = lshr <8 x i8> %0, %1
+ ret <8 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @lshr_binop_8xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = lshr <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <8 x i8> @lshr_binop_8xi8_exact(<8 x i8>, <8 x i8>) {
+ %3 = lshr exact <8 x i8> %0, %1
+ ret <8 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @lshr_binop_8xi8_exact(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = lshr exact <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <8 x i8> @ashr_binop_8xi8(<8 x i8>, <8 x i8>) {
+ %3 = ashr <8 x i8> %0, %1
+ ret <8 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @ashr_binop_8xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = ashr <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <8 x i8> @ashr_binop_8xi8_exact(<8 x i8>, <8 x i8>) {
+ %3 = ashr exact <8 x i8> %0, %1
+ ret <8 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @ashr_binop_8xi8_exact(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = ashr exact <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <8 x i8> @and_binop_8xi8(<8 x i8>, <8 x i8>) {
+ %3 = and <8 x i8> %0, %1
+ ret <8 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @and_binop_8xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = and <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <8 x i8> @xor_binop_8xi8(<8 x i8>, <8 x i8>) {
+ %3 = xor <8 x i8> %0, %1
+ ret <8 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @xor_binop_8xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = xor <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <8 x i8> @or_binop_8xi8(<8 x i8>, <8 x i8>) {
+ %3 = or <8 x i8> %0, %1
+ ret <8 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @or_binop_8xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = or <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <8 x i8> @urem_binop_8xi8(<8 x i8>, <8 x i8>) {
+ %3 = urem <8 x i8> %0, %1
+ ret <8 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @urem_binop_8xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = urem <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <8 x i8> @srem_binop_8xi8(<8 x i8>, <8 x i8>) {
+ %3 = srem <8 x i8> %0, %1
+ ret <8 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @srem_binop_8xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = srem <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <8 x i16> @add_binop_8xi16_nuw(<8 x i16>, <8 x i16>) {
+ %3 = add nuw <8 x i16> %0, %1
+ ret <8 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @add_binop_8xi16_nuw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = add nuw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <8 x i16> @add_binop_8xi16_nsw(<8 x i16>, <8 x i16>) {
+ %3 = add nsw <8 x i16> %0, %1
+ ret <8 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @add_binop_8xi16_nsw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = add nsw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <8 x i16> @add_binop_8xi16_nuw_nsw(<8 x i16>, <8 x i16>) {
+ %3 = add nuw nsw <8 x i16> %0, %1
+ ret <8 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @add_binop_8xi16_nuw_nsw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = add nuw nsw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <8 x i16> @sub_binop_8xi16_nuw(<8 x i16>, <8 x i16>) {
+ %3 = sub nuw <8 x i16> %0, %1
+ ret <8 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @sub_binop_8xi16_nuw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = sub nuw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <8 x i16> @sub_binop_8xi16_nsw(<8 x i16>, <8 x i16>) {
+ %3 = sub nsw <8 x i16> %0, %1
+ ret <8 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @sub_binop_8xi16_nsw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = sub nsw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <8 x i16> @sub_binop_8xi16_nuw_nsw(<8 x i16>, <8 x i16>) {
+ %3 = sub nuw nsw <8 x i16> %0, %1
+ ret <8 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @sub_binop_8xi16_nuw_nsw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = sub nuw nsw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <8 x i16> @mul_binop_8xi16_nuw(<8 x i16>, <8 x i16>) {
+ %3 = mul nuw <8 x i16> %0, %1
+ ret <8 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @mul_binop_8xi16_nuw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = mul nuw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <8 x i16> @mul_binop_8xi16_nsw(<8 x i16>, <8 x i16>) {
+ %3 = mul nsw <8 x i16> %0, %1
+ ret <8 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @mul_binop_8xi16_nsw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = mul nsw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <8 x i16> @mul_binop_8xi16_nuw_nsw(<8 x i16>, <8 x i16>) {
+ %3 = mul nuw nsw <8 x i16> %0, %1
+ ret <8 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @mul_binop_8xi16_nuw_nsw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = mul nuw nsw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <8 x i16> @shl_binop_8xi16_nuw(<8 x i16>, <8 x i16>) {
+ %3 = shl nuw <8 x i16> %0, %1
+ ret <8 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @shl_binop_8xi16_nuw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = shl nuw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <8 x i16> @shl_binop_8xi16_nsw(<8 x i16>, <8 x i16>) {
+ %3 = shl nsw <8 x i16> %0, %1
+ ret <8 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @shl_binop_8xi16_nsw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = shl nsw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <8 x i16> @shl_binop_8xi16_nuw_nsw(<8 x i16>, <8 x i16>) {
+ %3 = shl nuw nsw <8 x i16> %0, %1
+ ret <8 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @shl_binop_8xi16_nuw_nsw(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = shl nuw nsw <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <8 x i16> @udiv_binop_8xi16(<8 x i16>, <8 x i16>) {
+ %3 = udiv <8 x i16> %0, %1
+ ret <8 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @udiv_binop_8xi16(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = udiv <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <8 x i16> @udiv_binop_8xi16_exact(<8 x i16>, <8 x i16>) {
+ %3 = udiv exact <8 x i16> %0, %1
+ ret <8 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @udiv_binop_8xi16_exact(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = udiv exact <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <8 x i16> @sdiv_binop_8xi16(<8 x i16>, <8 x i16>) {
+ %3 = sdiv <8 x i16> %0, %1
+ ret <8 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @sdiv_binop_8xi16(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = sdiv <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <8 x i16> @sdiv_binop_8xi16_exact(<8 x i16>, <8 x i16>) {
+ %3 = sdiv exact <8 x i16> %0, %1
+ ret <8 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @sdiv_binop_8xi16_exact(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = sdiv exact <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <8 x i16> @lshr_binop_8xi16(<8 x i16>, <8 x i16>) {
+ %3 = lshr <8 x i16> %0, %1
+ ret <8 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @lshr_binop_8xi16(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = lshr <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <8 x i16> @lshr_binop_8xi16_exact(<8 x i16>, <8 x i16>) {
+ %3 = lshr exact <8 x i16> %0, %1
+ ret <8 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @lshr_binop_8xi16_exact(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = lshr exact <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <8 x i16> @ashr_binop_8xi16(<8 x i16>, <8 x i16>) {
+ %3 = ashr <8 x i16> %0, %1
+ ret <8 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @ashr_binop_8xi16(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = ashr <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <8 x i16> @ashr_binop_8xi16_exact(<8 x i16>, <8 x i16>) {
+ %3 = ashr exact <8 x i16> %0, %1
+ ret <8 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @ashr_binop_8xi16_exact(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = ashr exact <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <8 x i16> @and_binop_8xi16(<8 x i16>, <8 x i16>) {
+ %3 = and <8 x i16> %0, %1
+ ret <8 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @and_binop_8xi16(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = and <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <8 x i16> @xor_binop_8xi16(<8 x i16>, <8 x i16>) {
+ %3 = xor <8 x i16> %0, %1
+ ret <8 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @xor_binop_8xi16(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = xor <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <8 x i16> @or_binop_8xi16(<8 x i16>, <8 x i16>) {
+ %3 = or <8 x i16> %0, %1
+ ret <8 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @or_binop_8xi16(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = or <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <8 x i16> @urem_binop_8xi16(<8 x i16>, <8 x i16>) {
+ %3 = urem <8 x i16> %0, %1
+ ret <8 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @urem_binop_8xi16(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = urem <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <8 x i16> @srem_binop_8xi16(<8 x i16>, <8 x i16>) {
+ %3 = srem <8 x i16> %0, %1
+ ret <8 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @srem_binop_8xi16(<8 x i16>, <8 x i16>)
+; CHECK-NEXT: %3 = srem <8 x i16> %0, %1
+; CHECK-NEXT: ret <8 x i16> %3
+
+define <8 x i32> @add_binop_8xi32_nuw(<8 x i32>, <8 x i32>) {
+ %3 = add nuw <8 x i32> %0, %1
+ ret <8 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @add_binop_8xi32_nuw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = add nuw <4 x i32> %1, %3
+; CHECK-NEXT: %7 = add nuw <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <8 x i32> @add_binop_8xi32_nsw(<8 x i32>, <8 x i32>) {
+ %3 = add nsw <8 x i32> %0, %1
+ ret <8 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @add_binop_8xi32_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = add nsw <4 x i32> %1, %3
+; CHECK-NEXT: %7 = add nsw <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <8 x i32> @add_binop_8xi32_nuw_nsw(<8 x i32>, <8 x i32>) {
+ %3 = add nuw nsw <8 x i32> %0, %1
+ ret <8 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @add_binop_8xi32_nuw_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = add nuw nsw <4 x i32> %1, %3
+; CHECK-NEXT: %7 = add nuw nsw <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <8 x i32> @sub_binop_8xi32_nuw(<8 x i32>, <8 x i32>) {
+ %3 = sub nuw <8 x i32> %0, %1
+ ret <8 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @sub_binop_8xi32_nuw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = sub nuw <4 x i32> %1, %3
+; CHECK-NEXT: %7 = sub nuw <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <8 x i32> @sub_binop_8xi32_nsw(<8 x i32>, <8 x i32>) {
+ %3 = sub nsw <8 x i32> %0, %1
+ ret <8 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @sub_binop_8xi32_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = sub nsw <4 x i32> %1, %3
+; CHECK-NEXT: %7 = sub nsw <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <8 x i32> @sub_binop_8xi32_nuw_nsw(<8 x i32>, <8 x i32>) {
+ %3 = sub nuw nsw <8 x i32> %0, %1
+ ret <8 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @sub_binop_8xi32_nuw_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = sub nuw nsw <4 x i32> %1, %3
+; CHECK-NEXT: %7 = sub nuw nsw <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <8 x i32> @mul_binop_8xi32_nuw(<8 x i32>, <8 x i32>) {
+ %3 = mul nuw <8 x i32> %0, %1
+ ret <8 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @mul_binop_8xi32_nuw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = mul nuw <4 x i32> %1, %3
+; CHECK-NEXT: %7 = mul nuw <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <8 x i32> @mul_binop_8xi32_nsw(<8 x i32>, <8 x i32>) {
+ %3 = mul nsw <8 x i32> %0, %1
+ ret <8 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @mul_binop_8xi32_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = mul nsw <4 x i32> %1, %3
+; CHECK-NEXT: %7 = mul nsw <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <8 x i32> @mul_binop_8xi32_nuw_nsw(<8 x i32>, <8 x i32>) {
+ %3 = mul nuw nsw <8 x i32> %0, %1
+ ret <8 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @mul_binop_8xi32_nuw_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = mul nuw nsw <4 x i32> %1, %3
+; CHECK-NEXT: %7 = mul nuw nsw <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <8 x i32> @shl_binop_8xi32_nuw(<8 x i32>, <8 x i32>) {
+ %3 = shl nuw <8 x i32> %0, %1
+ ret <8 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @shl_binop_8xi32_nuw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = shl nuw <4 x i32> %1, %3
+; CHECK-NEXT: %7 = shl nuw <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <8 x i32> @shl_binop_8xi32_nsw(<8 x i32>, <8 x i32>) {
+ %3 = shl nsw <8 x i32> %0, %1
+ ret <8 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @shl_binop_8xi32_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = shl nsw <4 x i32> %1, %3
+; CHECK-NEXT: %7 = shl nsw <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <8 x i32> @shl_binop_8xi32_nuw_nsw(<8 x i32>, <8 x i32>) {
+ %3 = shl nuw nsw <8 x i32> %0, %1
+ ret <8 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @shl_binop_8xi32_nuw_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = shl nuw nsw <4 x i32> %1, %3
+; CHECK-NEXT: %7 = shl nuw nsw <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <8 x i32> @udiv_binop_8xi32(<8 x i32>, <8 x i32>) {
+ %3 = udiv <8 x i32> %0, %1
+ ret <8 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @udiv_binop_8xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = udiv <4 x i32> %1, %3
+; CHECK-NEXT: %7 = udiv <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <8 x i32> @udiv_binop_8xi32_exact(<8 x i32>, <8 x i32>) {
+ %3 = udiv exact <8 x i32> %0, %1
+ ret <8 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @udiv_binop_8xi32_exact(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = udiv exact <4 x i32> %1, %3
+; CHECK-NEXT: %7 = udiv exact <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <8 x i32> @sdiv_binop_8xi32(<8 x i32>, <8 x i32>) {
+ %3 = sdiv <8 x i32> %0, %1
+ ret <8 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @sdiv_binop_8xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = sdiv <4 x i32> %1, %3
+; CHECK-NEXT: %7 = sdiv <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <8 x i32> @sdiv_binop_8xi32_exact(<8 x i32>, <8 x i32>) {
+ %3 = sdiv exact <8 x i32> %0, %1
+ ret <8 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @sdiv_binop_8xi32_exact(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = sdiv exact <4 x i32> %1, %3
+; CHECK-NEXT: %7 = sdiv exact <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <8 x i32> @lshr_binop_8xi32(<8 x i32>, <8 x i32>) {
+ %3 = lshr <8 x i32> %0, %1
+ ret <8 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @lshr_binop_8xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = lshr <4 x i32> %1, %3
+; CHECK-NEXT: %7 = lshr <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <8 x i32> @lshr_binop_8xi32_exact(<8 x i32>, <8 x i32>) {
+ %3 = lshr exact <8 x i32> %0, %1
+ ret <8 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @lshr_binop_8xi32_exact(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = lshr exact <4 x i32> %1, %3
+; CHECK-NEXT: %7 = lshr exact <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <8 x i32> @ashr_binop_8xi32(<8 x i32>, <8 x i32>) {
+ %3 = ashr <8 x i32> %0, %1
+ ret <8 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @ashr_binop_8xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = ashr <4 x i32> %1, %3
+; CHECK-NEXT: %7 = ashr <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <8 x i32> @ashr_binop_8xi32_exact(<8 x i32>, <8 x i32>) {
+ %3 = ashr exact <8 x i32> %0, %1
+ ret <8 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @ashr_binop_8xi32_exact(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = ashr exact <4 x i32> %1, %3
+; CHECK-NEXT: %7 = ashr exact <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <8 x i32> @and_binop_8xi32(<8 x i32>, <8 x i32>) {
+ %3 = and <8 x i32> %0, %1
+ ret <8 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @and_binop_8xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = and <4 x i32> %1, %3
+; CHECK-NEXT: %7 = and <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <8 x i32> @xor_binop_8xi32(<8 x i32>, <8 x i32>) {
+ %3 = xor <8 x i32> %0, %1
+ ret <8 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @xor_binop_8xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = xor <4 x i32> %1, %3
+; CHECK-NEXT: %7 = xor <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <8 x i32> @or_binop_8xi32(<8 x i32>, <8 x i32>) {
+ %3 = or <8 x i32> %0, %1
+ ret <8 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @or_binop_8xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = or <4 x i32> %1, %3
+; CHECK-NEXT: %7 = or <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <8 x i32> @urem_binop_8xi32(<8 x i32>, <8 x i32>) {
+ %3 = urem <8 x i32> %0, %1
+ ret <8 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @urem_binop_8xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = urem <4 x i32> %1, %3
+; CHECK-NEXT: %7 = urem <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <8 x i32> @srem_binop_8xi32(<8 x i32>, <8 x i32>) {
+ %3 = srem <8 x i32> %0, %1
+ ret <8 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @srem_binop_8xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %6 = srem <4 x i32> %1, %3
+; CHECK-NEXT: %7 = srem <4 x i32> %2, %4
+; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
+; CHECK-NEXT: ret <4 x i32> %6
+
+define <8 x i64> @add_binop_8xi64_nuw(<8 x i64>, <8 x i64>) {
+ %3 = add nuw <8 x i64> %0, %1
+ ret <8 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @add_binop_8xi64_nuw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %12 = add nuw <2 x i64> %3, %7
+; CHECK-NEXT: %13 = add nuw <2 x i64> %4, %8
+; CHECK-NEXT: %14 = add nuw <2 x i64> %5, %9
+; CHECK-NEXT: %15 = add nuw <2 x i64> %6, %10
+; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16
+; CHECK-NEXT: ret <2 x i64> %12
+
+define <8 x i64> @add_binop_8xi64_nsw(<8 x i64>, <8 x i64>) {
+ %3 = add nsw <8 x i64> %0, %1
+ ret <8 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @add_binop_8xi64_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %12 = add nsw <2 x i64> %3, %7
+; CHECK-NEXT: %13 = add nsw <2 x i64> %4, %8
+; CHECK-NEXT: %14 = add nsw <2 x i64> %5, %9
+; CHECK-NEXT: %15 = add nsw <2 x i64> %6, %10
+; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16
+; CHECK-NEXT: ret <2 x i64> %12
+
+define <8 x i64> @add_binop_8xi64_nuw_nsw(<8 x i64>, <8 x i64>) {
+ %3 = add nuw nsw <8 x i64> %0, %1
+ ret <8 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @add_binop_8xi64_nuw_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %12 = add nuw nsw <2 x i64> %3, %7
+; CHECK-NEXT: %13 = add nuw nsw <2 x i64> %4, %8
+; CHECK-NEXT: %14 = add nuw nsw <2 x i64> %5, %9
+; CHECK-NEXT: %15 = add nuw nsw <2 x i64> %6, %10
+; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16
+; CHECK-NEXT: ret <2 x i64> %12
+
+define <8 x i64> @sub_binop_8xi64_nuw(<8 x i64>, <8 x i64>) {
+ %3 = sub nuw <8 x i64> %0, %1
+ ret <8 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @sub_binop_8xi64_nuw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %12 = sub nuw <2 x i64> %3, %7
+; CHECK-NEXT: %13 = sub nuw <2 x i64> %4, %8
+; CHECK-NEXT: %14 = sub nuw <2 x i64> %5, %9
+; CHECK-NEXT: %15 = sub nuw <2 x i64> %6, %10
+; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16
+; CHECK-NEXT: ret <2 x i64> %12
+
+define <8 x i64> @sub_binop_8xi64_nsw(<8 x i64>, <8 x i64>) {
+ %3 = sub nsw <8 x i64> %0, %1
+ ret <8 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @sub_binop_8xi64_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %12 = sub nsw <2 x i64> %3, %7
+; CHECK-NEXT: %13 = sub nsw <2 x i64> %4, %8
+; CHECK-NEXT: %14 = sub nsw <2 x i64> %5, %9
+; CHECK-NEXT: %15 = sub nsw <2 x i64> %6, %10
+; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16
+; CHECK-NEXT: ret <2 x i64> %12
+
+define <8 x i64> @sub_binop_8xi64_nuw_nsw(<8 x i64>, <8 x i64>) {
+ %3 = sub nuw nsw <8 x i64> %0, %1
+ ret <8 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @sub_binop_8xi64_nuw_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %12 = sub nuw nsw <2 x i64> %3, %7
+; CHECK-NEXT: %13 = sub nuw nsw <2 x i64> %4, %8
+; CHECK-NEXT: %14 = sub nuw nsw <2 x i64> %5, %9
+; CHECK-NEXT: %15 = sub nuw nsw <2 x i64> %6, %10
+; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16
+; CHECK-NEXT: ret <2 x i64> %12
+
+define <8 x i64> @mul_binop_8xi64_nuw(<8 x i64>, <8 x i64>) {
+ %3 = mul nuw <8 x i64> %0, %1
+ ret <8 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @mul_binop_8xi64_nuw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %12 = mul nuw <2 x i64> %3, %7
+; CHECK-NEXT: %13 = mul nuw <2 x i64> %4, %8
+; CHECK-NEXT: %14 = mul nuw <2 x i64> %5, %9
+; CHECK-NEXT: %15 = mul nuw <2 x i64> %6, %10
+; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16
+; CHECK-NEXT: ret <2 x i64> %12
+
+define <8 x i64> @mul_binop_8xi64_nsw(<8 x i64>, <8 x i64>) {
+ %3 = mul nsw <8 x i64> %0, %1
+ ret <8 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @mul_binop_8xi64_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %12 = mul nsw <2 x i64> %3, %7
+; CHECK-NEXT: %13 = mul nsw <2 x i64> %4, %8
+; CHECK-NEXT: %14 = mul nsw <2 x i64> %5, %9
+; CHECK-NEXT: %15 = mul nsw <2 x i64> %6, %10
+; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16
+; CHECK-NEXT: ret <2 x i64> %12
+
+define <8 x i64> @mul_binop_8xi64_nuw_nsw(<8 x i64>, <8 x i64>) {
+ %3 = mul nuw nsw <8 x i64> %0, %1
+ ret <8 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @mul_binop_8xi64_nuw_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %12 = mul nuw nsw <2 x i64> %3, %7
+; CHECK-NEXT: %13 = mul nuw nsw <2 x i64> %4, %8
+; CHECK-NEXT: %14 = mul nuw nsw <2 x i64> %5, %9
+; CHECK-NEXT: %15 = mul nuw nsw <2 x i64> %6, %10
+; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16
+; CHECK-NEXT: ret <2 x i64> %12
+
+define <8 x i64> @shl_binop_8xi64_nuw(<8 x i64>, <8 x i64>) {
+ %3 = shl nuw <8 x i64> %0, %1
+ ret <8 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @shl_binop_8xi64_nuw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %12 = shl nuw <2 x i64> %3, %7
+; CHECK-NEXT: %13 = shl nuw <2 x i64> %4, %8
+; CHECK-NEXT: %14 = shl nuw <2 x i64> %5, %9
+; CHECK-NEXT: %15 = shl nuw <2 x i64> %6, %10
+; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16
+; CHECK-NEXT: ret <2 x i64> %12
+
+define <8 x i64> @shl_binop_8xi64_nsw(<8 x i64>, <8 x i64>) {
+ %3 = shl nsw <8 x i64> %0, %1
+ ret <8 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @shl_binop_8xi64_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %12 = shl nsw <2 x i64> %3, %7
+; CHECK-NEXT: %13 = shl nsw <2 x i64> %4, %8
+; CHECK-NEXT: %14 = shl nsw <2 x i64> %5, %9
+; CHECK-NEXT: %15 = shl nsw <2 x i64> %6, %10
+; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16
+; CHECK-NEXT: ret <2 x i64> %12
+
+define <8 x i64> @shl_binop_8xi64_nuw_nsw(<8 x i64>, <8 x i64>) {
+ %3 = shl nuw nsw <8 x i64> %0, %1
+ ret <8 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @shl_binop_8xi64_nuw_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %12 = shl nuw nsw <2 x i64> %3, %7
+; CHECK-NEXT: %13 = shl nuw nsw <2 x i64> %4, %8
+; CHECK-NEXT: %14 = shl nuw nsw <2 x i64> %5, %9
+; CHECK-NEXT: %15 = shl nuw nsw <2 x i64> %6, %10
+; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16
+; CHECK-NEXT: ret <2 x i64> %12
+
+define <8 x i64> @udiv_binop_8xi64(<8 x i64>, <8 x i64>) {
+ %3 = udiv <8 x i64> %0, %1
+ ret <8 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @udiv_binop_8xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %12 = udiv <2 x i64> %3, %7
+; CHECK-NEXT: %13 = udiv <2 x i64> %4, %8
+; CHECK-NEXT: %14 = udiv <2 x i64> %5, %9
+; CHECK-NEXT: %15 = udiv <2 x i64> %6, %10
+; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16
+; CHECK-NEXT: ret <2 x i64> %12
+
+define <8 x i64> @udiv_binop_8xi64_exact(<8 x i64>, <8 x i64>) {
+ %3 = udiv exact <8 x i64> %0, %1
+ ret <8 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @udiv_binop_8xi64_exact(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %12 = udiv exact <2 x i64> %3, %7
+; CHECK-NEXT: %13 = udiv exact <2 x i64> %4, %8
+; CHECK-NEXT: %14 = udiv exact <2 x i64> %5, %9
+; CHECK-NEXT: %15 = udiv exact <2 x i64> %6, %10
+; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16
+; CHECK-NEXT: ret <2 x i64> %12
+
+define <8 x i64> @sdiv_binop_8xi64(<8 x i64>, <8 x i64>) {
+ %3 = sdiv <8 x i64> %0, %1
+ ret <8 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @sdiv_binop_8xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %12 = sdiv <2 x i64> %3, %7
+; CHECK-NEXT: %13 = sdiv <2 x i64> %4, %8
+; CHECK-NEXT: %14 = sdiv <2 x i64> %5, %9
+; CHECK-NEXT: %15 = sdiv <2 x i64> %6, %10
+; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16
+; CHECK-NEXT: ret <2 x i64> %12
+
+define <8 x i64> @sdiv_binop_8xi64_exact(<8 x i64>, <8 x i64>) {
+ %3 = sdiv exact <8 x i64> %0, %1
+ ret <8 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @sdiv_binop_8xi64_exact(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %12 = sdiv exact <2 x i64> %3, %7
+; CHECK-NEXT: %13 = sdiv exact <2 x i64> %4, %8
+; CHECK-NEXT: %14 = sdiv exact <2 x i64> %5, %9
+; CHECK-NEXT: %15 = sdiv exact <2 x i64> %6, %10
+; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16
+; CHECK-NEXT: ret <2 x i64> %12
+
+define <8 x i64> @lshr_binop_8xi64(<8 x i64>, <8 x i64>) {
+ %3 = lshr <8 x i64> %0, %1
+ ret <8 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @lshr_binop_8xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %12 = lshr <2 x i64> %3, %7
+; CHECK-NEXT: %13 = lshr <2 x i64> %4, %8
+; CHECK-NEXT: %14 = lshr <2 x i64> %5, %9
+; CHECK-NEXT: %15 = lshr <2 x i64> %6, %10
+; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16
+; CHECK-NEXT: ret <2 x i64> %12
+
+define <8 x i64> @lshr_binop_8xi64_exact(<8 x i64>, <8 x i64>) {
+ %3 = lshr exact <8 x i64> %0, %1
+ ret <8 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @lshr_binop_8xi64_exact(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %12 = lshr exact <2 x i64> %3, %7
+; CHECK-NEXT: %13 = lshr exact <2 x i64> %4, %8
+; CHECK-NEXT: %14 = lshr exact <2 x i64> %5, %9
+; CHECK-NEXT: %15 = lshr exact <2 x i64> %6, %10
+; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16
+; CHECK-NEXT: ret <2 x i64> %12
+
+define <8 x i64> @ashr_binop_8xi64(<8 x i64>, <8 x i64>) {
+ %3 = ashr <8 x i64> %0, %1
+ ret <8 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @ashr_binop_8xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %12 = ashr <2 x i64> %3, %7
+; CHECK-NEXT: %13 = ashr <2 x i64> %4, %8
+; CHECK-NEXT: %14 = ashr <2 x i64> %5, %9
+; CHECK-NEXT: %15 = ashr <2 x i64> %6, %10
+; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16
+; CHECK-NEXT: ret <2 x i64> %12
+
+define <8 x i64> @ashr_binop_8xi64_exact(<8 x i64>, <8 x i64>) {
+ %3 = ashr exact <8 x i64> %0, %1
+ ret <8 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @ashr_binop_8xi64_exact(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %12 = ashr exact <2 x i64> %3, %7
+; CHECK-NEXT: %13 = ashr exact <2 x i64> %4, %8
+; CHECK-NEXT: %14 = ashr exact <2 x i64> %5, %9
+; CHECK-NEXT: %15 = ashr exact <2 x i64> %6, %10
+; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16
+; CHECK-NEXT: ret <2 x i64> %12
+
+define <8 x i64> @and_binop_8xi64(<8 x i64>, <8 x i64>) {
+ %3 = and <8 x i64> %0, %1
+ ret <8 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @and_binop_8xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %12 = and <2 x i64> %3, %7
+; CHECK-NEXT: %13 = and <2 x i64> %4, %8
+; CHECK-NEXT: %14 = and <2 x i64> %5, %9
+; CHECK-NEXT: %15 = and <2 x i64> %6, %10
+; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16
+; CHECK-NEXT: ret <2 x i64> %12
+
+define <8 x i64> @xor_binop_8xi64(<8 x i64>, <8 x i64>) {
+ %3 = xor <8 x i64> %0, %1
+ ret <8 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @xor_binop_8xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %12 = xor <2 x i64> %3, %7
+; CHECK-NEXT: %13 = xor <2 x i64> %4, %8
+; CHECK-NEXT: %14 = xor <2 x i64> %5, %9
+; CHECK-NEXT: %15 = xor <2 x i64> %6, %10
+; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16
+; CHECK-NEXT: ret <2 x i64> %12
+
+define <8 x i64> @or_binop_8xi64(<8 x i64>, <8 x i64>) {
+ %3 = or <8 x i64> %0, %1
+ ret <8 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @or_binop_8xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %12 = or <2 x i64> %3, %7
+; CHECK-NEXT: %13 = or <2 x i64> %4, %8
+; CHECK-NEXT: %14 = or <2 x i64> %5, %9
+; CHECK-NEXT: %15 = or <2 x i64> %6, %10
+; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16
+; CHECK-NEXT: ret <2 x i64> %12
+
+define <8 x i64> @urem_binop_8xi64(<8 x i64>, <8 x i64>) {
+ %3 = urem <8 x i64> %0, %1
+ ret <8 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @urem_binop_8xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %12 = urem <2 x i64> %3, %7
+; CHECK-NEXT: %13 = urem <2 x i64> %4, %8
+; CHECK-NEXT: %14 = urem <2 x i64> %5, %9
+; CHECK-NEXT: %15 = urem <2 x i64> %6, %10
+; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16
+; CHECK-NEXT: ret <2 x i64> %12
+
+define <8 x i64> @srem_binop_8xi64(<8 x i64>, <8 x i64>) {
+ %3 = srem <8 x i64> %0, %1
+ ret <8 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @srem_binop_8xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %12 = srem <2 x i64> %3, %7
+; CHECK-NEXT: %13 = srem <2 x i64> %4, %8
+; CHECK-NEXT: %14 = srem <2 x i64> %5, %9
+; CHECK-NEXT: %15 = srem <2 x i64> %6, %10
+; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16
+; CHECK-NEXT: ret <2 x i64> %12
+
+define <12 x i8> @add_binop_12xi8_nuw(<12 x i8>, <12 x i8>) {
+ %3 = add nuw <12 x i8> %0, %1
+ ret <12 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @add_binop_12xi8_nuw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = add nuw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <12 x i8> @add_binop_12xi8_nsw(<12 x i8>, <12 x i8>) {
+ %3 = add nsw <12 x i8> %0, %1
+ ret <12 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @add_binop_12xi8_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = add nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <12 x i8> @add_binop_12xi8_nuw_nsw(<12 x i8>, <12 x i8>) {
+ %3 = add nuw nsw <12 x i8> %0, %1
+ ret <12 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @add_binop_12xi8_nuw_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = add nuw nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <12 x i8> @sub_binop_12xi8_nuw(<12 x i8>, <12 x i8>) {
+ %3 = sub nuw <12 x i8> %0, %1
+ ret <12 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @sub_binop_12xi8_nuw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = sub nuw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <12 x i8> @sub_binop_12xi8_nsw(<12 x i8>, <12 x i8>) {
+ %3 = sub nsw <12 x i8> %0, %1
+ ret <12 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @sub_binop_12xi8_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = sub nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <12 x i8> @sub_binop_12xi8_nuw_nsw(<12 x i8>, <12 x i8>) {
+ %3 = sub nuw nsw <12 x i8> %0, %1
+ ret <12 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @sub_binop_12xi8_nuw_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = sub nuw nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <12 x i8> @mul_binop_12xi8_nuw(<12 x i8>, <12 x i8>) {
+ %3 = mul nuw <12 x i8> %0, %1
+ ret <12 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @mul_binop_12xi8_nuw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = mul nuw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <12 x i8> @mul_binop_12xi8_nsw(<12 x i8>, <12 x i8>) {
+ %3 = mul nsw <12 x i8> %0, %1
+ ret <12 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @mul_binop_12xi8_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = mul nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <12 x i8> @mul_binop_12xi8_nuw_nsw(<12 x i8>, <12 x i8>) {
+ %3 = mul nuw nsw <12 x i8> %0, %1
+ ret <12 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @mul_binop_12xi8_nuw_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = mul nuw nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <12 x i8> @shl_binop_12xi8_nuw(<12 x i8>, <12 x i8>) {
+ %3 = shl nuw <12 x i8> %0, %1
+ ret <12 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @shl_binop_12xi8_nuw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = shl nuw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <12 x i8> @shl_binop_12xi8_nsw(<12 x i8>, <12 x i8>) {
+ %3 = shl nsw <12 x i8> %0, %1
+ ret <12 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @shl_binop_12xi8_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = shl nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <12 x i8> @shl_binop_12xi8_nuw_nsw(<12 x i8>, <12 x i8>) {
+ %3 = shl nuw nsw <12 x i8> %0, %1
+ ret <12 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @shl_binop_12xi8_nuw_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = shl nuw nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <12 x i8> @udiv_binop_12xi8(<12 x i8>, <12 x i8>) {
+ %3 = udiv <12 x i8> %0, %1
+ ret <12 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @udiv_binop_12xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = udiv <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <12 x i8> @udiv_binop_12xi8_exact(<12 x i8>, <12 x i8>) {
+ %3 = udiv exact <12 x i8> %0, %1
+ ret <12 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @udiv_binop_12xi8_exact(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = udiv exact <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <12 x i8> @sdiv_binop_12xi8(<12 x i8>, <12 x i8>) {
+ %3 = sdiv <12 x i8> %0, %1
+ ret <12 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @sdiv_binop_12xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = sdiv <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <12 x i8> @sdiv_binop_12xi8_exact(<12 x i8>, <12 x i8>) {
+ %3 = sdiv exact <12 x i8> %0, %1
+ ret <12 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @sdiv_binop_12xi8_exact(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = sdiv exact <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <12 x i8> @lshr_binop_12xi8(<12 x i8>, <12 x i8>) {
+ %3 = lshr <12 x i8> %0, %1
+ ret <12 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @lshr_binop_12xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = lshr <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <12 x i8> @lshr_binop_12xi8_exact(<12 x i8>, <12 x i8>) {
+ %3 = lshr exact <12 x i8> %0, %1
+ ret <12 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @lshr_binop_12xi8_exact(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = lshr exact <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <12 x i8> @ashr_binop_12xi8(<12 x i8>, <12 x i8>) {
+ %3 = ashr <12 x i8> %0, %1
+ ret <12 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @ashr_binop_12xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = ashr <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <12 x i8> @ashr_binop_12xi8_exact(<12 x i8>, <12 x i8>) {
+ %3 = ashr exact <12 x i8> %0, %1
+ ret <12 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @ashr_binop_12xi8_exact(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = ashr exact <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <12 x i8> @and_binop_12xi8(<12 x i8>, <12 x i8>) {
+ %3 = and <12 x i8> %0, %1
+ ret <12 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @and_binop_12xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = and <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <12 x i8> @xor_binop_12xi8(<12 x i8>, <12 x i8>) {
+ %3 = xor <12 x i8> %0, %1
+ ret <12 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @xor_binop_12xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = xor <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <12 x i8> @or_binop_12xi8(<12 x i8>, <12 x i8>) {
+ %3 = or <12 x i8> %0, %1
+ ret <12 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @or_binop_12xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = or <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <12 x i8> @urem_binop_12xi8(<12 x i8>, <12 x i8>) {
+ %3 = urem <12 x i8> %0, %1
+ ret <12 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @urem_binop_12xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = urem <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <12 x i8> @srem_binop_12xi8(<12 x i8>, <12 x i8>) {
+ %3 = srem <12 x i8> %0, %1
+ ret <12 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @srem_binop_12xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = srem <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <12 x i16> @add_binop_12xi16_nuw(<12 x i16>, <12 x i16>) {
+ %3 = add nuw <12 x i16> %0, %1
+ ret <12 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @add_binop_12xi16_nuw(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = add nuw <8 x i16> %1, %3
+; CHECK-NEXT: %7 = add nuw <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <12 x i16> @add_binop_12xi16_nsw(<12 x i16>, <12 x i16>) {
+ %3 = add nsw <12 x i16> %0, %1
+ ret <12 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @add_binop_12xi16_nsw(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = add nsw <8 x i16> %1, %3
+; CHECK-NEXT: %7 = add nsw <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <12 x i16> @add_binop_12xi16_nuw_nsw(<12 x i16>, <12 x i16>) {
+ %3 = add nuw nsw <12 x i16> %0, %1
+ ret <12 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @add_binop_12xi16_nuw_nsw(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = add nuw nsw <8 x i16> %1, %3
+; CHECK-NEXT: %7 = add nuw nsw <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <12 x i16> @sub_binop_12xi16_nuw(<12 x i16>, <12 x i16>) {
+ %3 = sub nuw <12 x i16> %0, %1
+ ret <12 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @sub_binop_12xi16_nuw(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = sub nuw <8 x i16> %1, %3
+; CHECK-NEXT: %7 = sub nuw <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <12 x i16> @sub_binop_12xi16_nsw(<12 x i16>, <12 x i16>) {
+ %3 = sub nsw <12 x i16> %0, %1
+ ret <12 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @sub_binop_12xi16_nsw(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = sub nsw <8 x i16> %1, %3
+; CHECK-NEXT: %7 = sub nsw <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <12 x i16> @sub_binop_12xi16_nuw_nsw(<12 x i16>, <12 x i16>) {
+ %3 = sub nuw nsw <12 x i16> %0, %1
+ ret <12 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @sub_binop_12xi16_nuw_nsw(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = sub nuw nsw <8 x i16> %1, %3
+; CHECK-NEXT: %7 = sub nuw nsw <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <12 x i16> @mul_binop_12xi16_nuw(<12 x i16>, <12 x i16>) {
+ %3 = mul nuw <12 x i16> %0, %1
+ ret <12 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @mul_binop_12xi16_nuw(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = mul nuw <8 x i16> %1, %3
+; CHECK-NEXT: %7 = mul nuw <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <12 x i16> @mul_binop_12xi16_nsw(<12 x i16>, <12 x i16>) {
+ %3 = mul nsw <12 x i16> %0, %1
+ ret <12 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @mul_binop_12xi16_nsw(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = mul nsw <8 x i16> %1, %3
+; CHECK-NEXT: %7 = mul nsw <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <12 x i16> @mul_binop_12xi16_nuw_nsw(<12 x i16>, <12 x i16>) {
+ %3 = mul nuw nsw <12 x i16> %0, %1
+ ret <12 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @mul_binop_12xi16_nuw_nsw(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = mul nuw nsw <8 x i16> %1, %3
+; CHECK-NEXT: %7 = mul nuw nsw <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <12 x i16> @shl_binop_12xi16_nuw(<12 x i16>, <12 x i16>) {
+ %3 = shl nuw <12 x i16> %0, %1
+ ret <12 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @shl_binop_12xi16_nuw(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = shl nuw <8 x i16> %1, %3
+; CHECK-NEXT: %7 = shl nuw <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <12 x i16> @shl_binop_12xi16_nsw(<12 x i16>, <12 x i16>) {
+ %3 = shl nsw <12 x i16> %0, %1
+ ret <12 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @shl_binop_12xi16_nsw(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = shl nsw <8 x i16> %1, %3
+; CHECK-NEXT: %7 = shl nsw <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <12 x i16> @shl_binop_12xi16_nuw_nsw(<12 x i16>, <12 x i16>) {
+ %3 = shl nuw nsw <12 x i16> %0, %1
+ ret <12 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @shl_binop_12xi16_nuw_nsw(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = shl nuw nsw <8 x i16> %1, %3
+; CHECK-NEXT: %7 = shl nuw nsw <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <12 x i16> @udiv_binop_12xi16(<12 x i16>, <12 x i16>) {
+ %3 = udiv <12 x i16> %0, %1
+ ret <12 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @udiv_binop_12xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = udiv <8 x i16> %1, %3
+; CHECK-NEXT: %7 = udiv <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <12 x i16> @udiv_binop_12xi16_exact(<12 x i16>, <12 x i16>) {
+ %3 = udiv exact <12 x i16> %0, %1
+ ret <12 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @udiv_binop_12xi16_exact(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = udiv exact <8 x i16> %1, %3
+; CHECK-NEXT: %7 = udiv exact <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <12 x i16> @sdiv_binop_12xi16(<12 x i16>, <12 x i16>) {
+ %3 = sdiv <12 x i16> %0, %1
+ ret <12 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @sdiv_binop_12xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = sdiv <8 x i16> %1, %3
+; CHECK-NEXT: %7 = sdiv <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <12 x i16> @sdiv_binop_12xi16_exact(<12 x i16>, <12 x i16>) {
+ %3 = sdiv exact <12 x i16> %0, %1
+ ret <12 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @sdiv_binop_12xi16_exact(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = sdiv exact <8 x i16> %1, %3
+; CHECK-NEXT: %7 = sdiv exact <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <12 x i16> @lshr_binop_12xi16(<12 x i16>, <12 x i16>) {
+ %3 = lshr <12 x i16> %0, %1
+ ret <12 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @lshr_binop_12xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = lshr <8 x i16> %1, %3
+; CHECK-NEXT: %7 = lshr <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <12 x i16> @lshr_binop_12xi16_exact(<12 x i16>, <12 x i16>) {
+ %3 = lshr exact <12 x i16> %0, %1
+ ret <12 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @lshr_binop_12xi16_exact(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = lshr exact <8 x i16> %1, %3
+; CHECK-NEXT: %7 = lshr exact <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <12 x i16> @ashr_binop_12xi16(<12 x i16>, <12 x i16>) {
+ %3 = ashr <12 x i16> %0, %1
+ ret <12 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @ashr_binop_12xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = ashr <8 x i16> %1, %3
+; CHECK-NEXT: %7 = ashr <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <12 x i16> @ashr_binop_12xi16_exact(<12 x i16>, <12 x i16>) {
+ %3 = ashr exact <12 x i16> %0, %1
+ ret <12 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @ashr_binop_12xi16_exact(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = ashr exact <8 x i16> %1, %3
+; CHECK-NEXT: %7 = ashr exact <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <12 x i16> @and_binop_12xi16(<12 x i16>, <12 x i16>) {
+ %3 = and <12 x i16> %0, %1
+ ret <12 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @and_binop_12xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = and <8 x i16> %1, %3
+; CHECK-NEXT: %7 = and <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <12 x i16> @xor_binop_12xi16(<12 x i16>, <12 x i16>) {
+ %3 = xor <12 x i16> %0, %1
+ ret <12 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @xor_binop_12xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = xor <8 x i16> %1, %3
+; CHECK-NEXT: %7 = xor <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <12 x i16> @or_binop_12xi16(<12 x i16>, <12 x i16>) {
+ %3 = or <12 x i16> %0, %1
+ ret <12 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @or_binop_12xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = or <8 x i16> %1, %3
+; CHECK-NEXT: %7 = or <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <12 x i16> @urem_binop_12xi16(<12 x i16>, <12 x i16>) {
+ %3 = urem <12 x i16> %0, %1
+ ret <12 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @urem_binop_12xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = urem <8 x i16> %1, %3
+; CHECK-NEXT: %7 = urem <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <12 x i16> @srem_binop_12xi16(<12 x i16>, <12 x i16>) {
+ %3 = srem <12 x i16> %0, %1
+ ret <12 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @srem_binop_12xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = srem <8 x i16> %1, %3
+; CHECK-NEXT: %7 = srem <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <12 x i32> @add_binop_12xi32_nuw(<12 x i32>, <12 x i32>) {
+ %3 = add nuw <12 x i32> %0, %1
+ ret <12 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @add_binop_12xi32_nuw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %9 = add nuw <4 x i32> %2, %5
+; CHECK-NEXT: %10 = add nuw <4 x i32> %3, %6
+; CHECK-NEXT: %11 = add nuw <4 x i32> %4, %7
+; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
+; CHECK-NEXT: ret <4 x i32> %9
+
+define <12 x i32> @add_binop_12xi32_nsw(<12 x i32>, <12 x i32>) {
+ %3 = add nsw <12 x i32> %0, %1
+ ret <12 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @add_binop_12xi32_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %9 = add nsw <4 x i32> %2, %5
+; CHECK-NEXT: %10 = add nsw <4 x i32> %3, %6
+; CHECK-NEXT: %11 = add nsw <4 x i32> %4, %7
+; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
+; CHECK-NEXT: ret <4 x i32> %9
+
+define <12 x i32> @add_binop_12xi32_nuw_nsw(<12 x i32>, <12 x i32>) {
+ %3 = add nuw nsw <12 x i32> %0, %1
+ ret <12 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @add_binop_12xi32_nuw_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %9 = add nuw nsw <4 x i32> %2, %5
+; CHECK-NEXT: %10 = add nuw nsw <4 x i32> %3, %6
+; CHECK-NEXT: %11 = add nuw nsw <4 x i32> %4, %7
+; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
+; CHECK-NEXT: ret <4 x i32> %9
+
+define <12 x i32> @sub_binop_12xi32_nuw(<12 x i32>, <12 x i32>) {
+ %3 = sub nuw <12 x i32> %0, %1
+ ret <12 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @sub_binop_12xi32_nuw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %9 = sub nuw <4 x i32> %2, %5
+; CHECK-NEXT: %10 = sub nuw <4 x i32> %3, %6
+; CHECK-NEXT: %11 = sub nuw <4 x i32> %4, %7
+; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
+; CHECK-NEXT: ret <4 x i32> %9
+
+define <12 x i32> @sub_binop_12xi32_nsw(<12 x i32>, <12 x i32>) {
+ %3 = sub nsw <12 x i32> %0, %1
+ ret <12 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @sub_binop_12xi32_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %9 = sub nsw <4 x i32> %2, %5
+; CHECK-NEXT: %10 = sub nsw <4 x i32> %3, %6
+; CHECK-NEXT: %11 = sub nsw <4 x i32> %4, %7
+; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
+; CHECK-NEXT: ret <4 x i32> %9
+
+define <12 x i32> @sub_binop_12xi32_nuw_nsw(<12 x i32>, <12 x i32>) {
+ %3 = sub nuw nsw <12 x i32> %0, %1
+ ret <12 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @sub_binop_12xi32_nuw_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %9 = sub nuw nsw <4 x i32> %2, %5
+; CHECK-NEXT: %10 = sub nuw nsw <4 x i32> %3, %6
+; CHECK-NEXT: %11 = sub nuw nsw <4 x i32> %4, %7
+; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
+; CHECK-NEXT: ret <4 x i32> %9
+
+define <12 x i32> @mul_binop_12xi32_nuw(<12 x i32>, <12 x i32>) {
+ %3 = mul nuw <12 x i32> %0, %1
+ ret <12 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @mul_binop_12xi32_nuw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %9 = mul nuw <4 x i32> %2, %5
+; CHECK-NEXT: %10 = mul nuw <4 x i32> %3, %6
+; CHECK-NEXT: %11 = mul nuw <4 x i32> %4, %7
+; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
+; CHECK-NEXT: ret <4 x i32> %9
+
+define <12 x i32> @mul_binop_12xi32_nsw(<12 x i32>, <12 x i32>) {
+ %3 = mul nsw <12 x i32> %0, %1
+ ret <12 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @mul_binop_12xi32_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %9 = mul nsw <4 x i32> %2, %5
+; CHECK-NEXT: %10 = mul nsw <4 x i32> %3, %6
+; CHECK-NEXT: %11 = mul nsw <4 x i32> %4, %7
+; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
+; CHECK-NEXT: ret <4 x i32> %9
+
+define <12 x i32> @mul_binop_12xi32_nuw_nsw(<12 x i32>, <12 x i32>) {
+ %3 = mul nuw nsw <12 x i32> %0, %1
+ ret <12 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @mul_binop_12xi32_nuw_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %9 = mul nuw nsw <4 x i32> %2, %5
+; CHECK-NEXT: %10 = mul nuw nsw <4 x i32> %3, %6
+; CHECK-NEXT: %11 = mul nuw nsw <4 x i32> %4, %7
+; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
+; CHECK-NEXT: ret <4 x i32> %9
+
+define <12 x i32> @shl_binop_12xi32_nuw(<12 x i32>, <12 x i32>) {
+ %3 = shl nuw <12 x i32> %0, %1
+ ret <12 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @shl_binop_12xi32_nuw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %9 = shl nuw <4 x i32> %2, %5
+; CHECK-NEXT: %10 = shl nuw <4 x i32> %3, %6
+; CHECK-NEXT: %11 = shl nuw <4 x i32> %4, %7
+; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
+; CHECK-NEXT: ret <4 x i32> %9
+
+define <12 x i32> @shl_binop_12xi32_nsw(<12 x i32>, <12 x i32>) {
+ %3 = shl nsw <12 x i32> %0, %1
+ ret <12 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @shl_binop_12xi32_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %9 = shl nsw <4 x i32> %2, %5
+; CHECK-NEXT: %10 = shl nsw <4 x i32> %3, %6
+; CHECK-NEXT: %11 = shl nsw <4 x i32> %4, %7
+; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
+; CHECK-NEXT: ret <4 x i32> %9
+
+define <12 x i32> @shl_binop_12xi32_nuw_nsw(<12 x i32>, <12 x i32>) {
+ %3 = shl nuw nsw <12 x i32> %0, %1
+ ret <12 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @shl_binop_12xi32_nuw_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %9 = shl nuw nsw <4 x i32> %2, %5
+; CHECK-NEXT: %10 = shl nuw nsw <4 x i32> %3, %6
+; CHECK-NEXT: %11 = shl nuw nsw <4 x i32> %4, %7
+; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
+; CHECK-NEXT: ret <4 x i32> %9
+
+define <12 x i32> @udiv_binop_12xi32(<12 x i32>, <12 x i32>) {
+ %3 = udiv <12 x i32> %0, %1
+ ret <12 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @udiv_binop_12xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %9 = udiv <4 x i32> %2, %5
+; CHECK-NEXT: %10 = udiv <4 x i32> %3, %6
+; CHECK-NEXT: %11 = udiv <4 x i32> %4, %7
+; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
+; CHECK-NEXT: ret <4 x i32> %9
+
+define <12 x i32> @udiv_binop_12xi32_exact(<12 x i32>, <12 x i32>) {
+ %3 = udiv exact <12 x i32> %0, %1
+ ret <12 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @udiv_binop_12xi32_exact(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %9 = udiv exact <4 x i32> %2, %5
+; CHECK-NEXT: %10 = udiv exact <4 x i32> %3, %6
+; CHECK-NEXT: %11 = udiv exact <4 x i32> %4, %7
+; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
+; CHECK-NEXT: ret <4 x i32> %9
+
+define <12 x i32> @sdiv_binop_12xi32(<12 x i32>, <12 x i32>) {
+ %3 = sdiv <12 x i32> %0, %1
+ ret <12 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @sdiv_binop_12xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %9 = sdiv <4 x i32> %2, %5
+; CHECK-NEXT: %10 = sdiv <4 x i32> %3, %6
+; CHECK-NEXT: %11 = sdiv <4 x i32> %4, %7
+; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
+; CHECK-NEXT: ret <4 x i32> %9
+
+define <12 x i32> @sdiv_binop_12xi32_exact(<12 x i32>, <12 x i32>) {
+ %3 = sdiv exact <12 x i32> %0, %1
+ ret <12 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @sdiv_binop_12xi32_exact(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %9 = sdiv exact <4 x i32> %2, %5
+; CHECK-NEXT: %10 = sdiv exact <4 x i32> %3, %6
+; CHECK-NEXT: %11 = sdiv exact <4 x i32> %4, %7
+; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
+; CHECK-NEXT: ret <4 x i32> %9
+
+define <12 x i32> @lshr_binop_12xi32(<12 x i32>, <12 x i32>) {
+ %3 = lshr <12 x i32> %0, %1
+ ret <12 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @lshr_binop_12xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %9 = lshr <4 x i32> %2, %5
+; CHECK-NEXT: %10 = lshr <4 x i32> %3, %6
+; CHECK-NEXT: %11 = lshr <4 x i32> %4, %7
+; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
+; CHECK-NEXT: ret <4 x i32> %9
+
+define <12 x i32> @lshr_binop_12xi32_exact(<12 x i32>, <12 x i32>) {
+ %3 = lshr exact <12 x i32> %0, %1
+ ret <12 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @lshr_binop_12xi32_exact(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %9 = lshr exact <4 x i32> %2, %5
+; CHECK-NEXT: %10 = lshr exact <4 x i32> %3, %6
+; CHECK-NEXT: %11 = lshr exact <4 x i32> %4, %7
+; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
+; CHECK-NEXT: ret <4 x i32> %9
+
+define <12 x i32> @ashr_binop_12xi32(<12 x i32>, <12 x i32>) {
+ %3 = ashr <12 x i32> %0, %1
+ ret <12 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @ashr_binop_12xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %9 = ashr <4 x i32> %2, %5
+; CHECK-NEXT: %10 = ashr <4 x i32> %3, %6
+; CHECK-NEXT: %11 = ashr <4 x i32> %4, %7
+; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
+; CHECK-NEXT: ret <4 x i32> %9
+
+define <12 x i32> @ashr_binop_12xi32_exact(<12 x i32>, <12 x i32>) {
+ %3 = ashr exact <12 x i32> %0, %1
+ ret <12 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @ashr_binop_12xi32_exact(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %9 = ashr exact <4 x i32> %2, %5
+; CHECK-NEXT: %10 = ashr exact <4 x i32> %3, %6
+; CHECK-NEXT: %11 = ashr exact <4 x i32> %4, %7
+; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
+; CHECK-NEXT: ret <4 x i32> %9
+
+define <12 x i32> @and_binop_12xi32(<12 x i32>, <12 x i32>) {
+ %3 = and <12 x i32> %0, %1
+ ret <12 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @and_binop_12xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %9 = and <4 x i32> %2, %5
+; CHECK-NEXT: %10 = and <4 x i32> %3, %6
+; CHECK-NEXT: %11 = and <4 x i32> %4, %7
+; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
+; CHECK-NEXT: ret <4 x i32> %9
+
+define <12 x i32> @xor_binop_12xi32(<12 x i32>, <12 x i32>) {
+ %3 = xor <12 x i32> %0, %1
+ ret <12 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @xor_binop_12xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %9 = xor <4 x i32> %2, %5
+; CHECK-NEXT: %10 = xor <4 x i32> %3, %6
+; CHECK-NEXT: %11 = xor <4 x i32> %4, %7
+; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
+; CHECK-NEXT: ret <4 x i32> %9
+
+define <12 x i32> @or_binop_12xi32(<12 x i32>, <12 x i32>) {
+ %3 = or <12 x i32> %0, %1
+ ret <12 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @or_binop_12xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %9 = or <4 x i32> %2, %5
+; CHECK-NEXT: %10 = or <4 x i32> %3, %6
+; CHECK-NEXT: %11 = or <4 x i32> %4, %7
+; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
+; CHECK-NEXT: ret <4 x i32> %9
+
+define <12 x i32> @urem_binop_12xi32(<12 x i32>, <12 x i32>) {
+ %3 = urem <12 x i32> %0, %1
+ ret <12 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @urem_binop_12xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %9 = urem <4 x i32> %2, %5
+; CHECK-NEXT: %10 = urem <4 x i32> %3, %6
+; CHECK-NEXT: %11 = urem <4 x i32> %4, %7
+; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
+; CHECK-NEXT: ret <4 x i32> %9
+
+define <12 x i32> @srem_binop_12xi32(<12 x i32>, <12 x i32>) {
+ %3 = srem <12 x i32> %0, %1
+ ret <12 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @srem_binop_12xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %9 = srem <4 x i32> %2, %5
+; CHECK-NEXT: %10 = srem <4 x i32> %3, %6
+; CHECK-NEXT: %11 = srem <4 x i32> %4, %7
+; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
+; CHECK-NEXT: ret <4 x i32> %9
+
+define <12 x i64> @add_binop_12xi64_nuw(<12 x i64>, <12 x i64>) {
+ %3 = add nuw <12 x i64> %0, %1
+ ret <12 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @add_binop_12xi64_nuw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %18 = add nuw <2 x i64> %5, %11
+; CHECK-NEXT: %19 = add nuw <2 x i64> %6, %12
+; CHECK-NEXT: %20 = add nuw <2 x i64> %7, %13
+; CHECK-NEXT: %21 = add nuw <2 x i64> %8, %14
+; CHECK-NEXT: %22 = add nuw <2 x i64> %9, %15
+; CHECK-NEXT: %23 = add nuw <2 x i64> %10, %16
+; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16
+; CHECK-NEXT: ret <2 x i64> %18
+
+define <12 x i64> @add_binop_12xi64_nsw(<12 x i64>, <12 x i64>) {
+ %3 = add nsw <12 x i64> %0, %1
+ ret <12 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @add_binop_12xi64_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %18 = add nsw <2 x i64> %5, %11
+; CHECK-NEXT: %19 = add nsw <2 x i64> %6, %12
+; CHECK-NEXT: %20 = add nsw <2 x i64> %7, %13
+; CHECK-NEXT: %21 = add nsw <2 x i64> %8, %14
+; CHECK-NEXT: %22 = add nsw <2 x i64> %9, %15
+; CHECK-NEXT: %23 = add nsw <2 x i64> %10, %16
+; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16
+; CHECK-NEXT: ret <2 x i64> %18
+
+define <12 x i64> @add_binop_12xi64_nuw_nsw(<12 x i64>, <12 x i64>) {
+ %3 = add nuw nsw <12 x i64> %0, %1
+ ret <12 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @add_binop_12xi64_nuw_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %18 = add nuw nsw <2 x i64> %5, %11
+; CHECK-NEXT: %19 = add nuw nsw <2 x i64> %6, %12
+; CHECK-NEXT: %20 = add nuw nsw <2 x i64> %7, %13
+; CHECK-NEXT: %21 = add nuw nsw <2 x i64> %8, %14
+; CHECK-NEXT: %22 = add nuw nsw <2 x i64> %9, %15
+; CHECK-NEXT: %23 = add nuw nsw <2 x i64> %10, %16
+; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16
+; CHECK-NEXT: ret <2 x i64> %18
+
+define <12 x i64> @sub_binop_12xi64_nuw(<12 x i64>, <12 x i64>) {
+ %3 = sub nuw <12 x i64> %0, %1
+ ret <12 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @sub_binop_12xi64_nuw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %18 = sub nuw <2 x i64> %5, %11
+; CHECK-NEXT: %19 = sub nuw <2 x i64> %6, %12
+; CHECK-NEXT: %20 = sub nuw <2 x i64> %7, %13
+; CHECK-NEXT: %21 = sub nuw <2 x i64> %8, %14
+; CHECK-NEXT: %22 = sub nuw <2 x i64> %9, %15
+; CHECK-NEXT: %23 = sub nuw <2 x i64> %10, %16
+; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16
+; CHECK-NEXT: ret <2 x i64> %18
+
+define <12 x i64> @sub_binop_12xi64_nsw(<12 x i64>, <12 x i64>) {
+ %3 = sub nsw <12 x i64> %0, %1
+ ret <12 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @sub_binop_12xi64_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %18 = sub nsw <2 x i64> %5, %11
+; CHECK-NEXT: %19 = sub nsw <2 x i64> %6, %12
+; CHECK-NEXT: %20 = sub nsw <2 x i64> %7, %13
+; CHECK-NEXT: %21 = sub nsw <2 x i64> %8, %14
+; CHECK-NEXT: %22 = sub nsw <2 x i64> %9, %15
+; CHECK-NEXT: %23 = sub nsw <2 x i64> %10, %16
+; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16
+; CHECK-NEXT: ret <2 x i64> %18
+
+define <12 x i64> @sub_binop_12xi64_nuw_nsw(<12 x i64>, <12 x i64>) {
+ %3 = sub nuw nsw <12 x i64> %0, %1
+ ret <12 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @sub_binop_12xi64_nuw_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %18 = sub nuw nsw <2 x i64> %5, %11
+; CHECK-NEXT: %19 = sub nuw nsw <2 x i64> %6, %12
+; CHECK-NEXT: %20 = sub nuw nsw <2 x i64> %7, %13
+; CHECK-NEXT: %21 = sub nuw nsw <2 x i64> %8, %14
+; CHECK-NEXT: %22 = sub nuw nsw <2 x i64> %9, %15
+; CHECK-NEXT: %23 = sub nuw nsw <2 x i64> %10, %16
+; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16
+; CHECK-NEXT: ret <2 x i64> %18
+
+define <12 x i64> @mul_binop_12xi64_nuw(<12 x i64>, <12 x i64>) {
+ %3 = mul nuw <12 x i64> %0, %1
+ ret <12 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @mul_binop_12xi64_nuw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %18 = mul nuw <2 x i64> %5, %11
+; CHECK-NEXT: %19 = mul nuw <2 x i64> %6, %12
+; CHECK-NEXT: %20 = mul nuw <2 x i64> %7, %13
+; CHECK-NEXT: %21 = mul nuw <2 x i64> %8, %14
+; CHECK-NEXT: %22 = mul nuw <2 x i64> %9, %15
+; CHECK-NEXT: %23 = mul nuw <2 x i64> %10, %16
+; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16
+; CHECK-NEXT: ret <2 x i64> %18
+
+define <12 x i64> @mul_binop_12xi64_nsw(<12 x i64>, <12 x i64>) {
+ %3 = mul nsw <12 x i64> %0, %1
+ ret <12 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @mul_binop_12xi64_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %18 = mul nsw <2 x i64> %5, %11
+; CHECK-NEXT: %19 = mul nsw <2 x i64> %6, %12
+; CHECK-NEXT: %20 = mul nsw <2 x i64> %7, %13
+; CHECK-NEXT: %21 = mul nsw <2 x i64> %8, %14
+; CHECK-NEXT: %22 = mul nsw <2 x i64> %9, %15
+; CHECK-NEXT: %23 = mul nsw <2 x i64> %10, %16
+; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16
+; CHECK-NEXT: ret <2 x i64> %18
+
+define <12 x i64> @mul_binop_12xi64_nuw_nsw(<12 x i64>, <12 x i64>) {
+ %3 = mul nuw nsw <12 x i64> %0, %1
+ ret <12 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @mul_binop_12xi64_nuw_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %18 = mul nuw nsw <2 x i64> %5, %11
+; CHECK-NEXT: %19 = mul nuw nsw <2 x i64> %6, %12
+; CHECK-NEXT: %20 = mul nuw nsw <2 x i64> %7, %13
+; CHECK-NEXT: %21 = mul nuw nsw <2 x i64> %8, %14
+; CHECK-NEXT: %22 = mul nuw nsw <2 x i64> %9, %15
+; CHECK-NEXT: %23 = mul nuw nsw <2 x i64> %10, %16
+; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16
+; CHECK-NEXT: ret <2 x i64> %18
+
+define <12 x i64> @shl_binop_12xi64_nuw(<12 x i64>, <12 x i64>) {
+ %3 = shl nuw <12 x i64> %0, %1
+ ret <12 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @shl_binop_12xi64_nuw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %18 = shl nuw <2 x i64> %5, %11
+; CHECK-NEXT: %19 = shl nuw <2 x i64> %6, %12
+; CHECK-NEXT: %20 = shl nuw <2 x i64> %7, %13
+; CHECK-NEXT: %21 = shl nuw <2 x i64> %8, %14
+; CHECK-NEXT: %22 = shl nuw <2 x i64> %9, %15
+; CHECK-NEXT: %23 = shl nuw <2 x i64> %10, %16
+; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16
+; CHECK-NEXT: ret <2 x i64> %18
+
+define <12 x i64> @shl_binop_12xi64_nsw(<12 x i64>, <12 x i64>) {
+ %3 = shl nsw <12 x i64> %0, %1
+ ret <12 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @shl_binop_12xi64_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %18 = shl nsw <2 x i64> %5, %11
+; CHECK-NEXT: %19 = shl nsw <2 x i64> %6, %12
+; CHECK-NEXT: %20 = shl nsw <2 x i64> %7, %13
+; CHECK-NEXT: %21 = shl nsw <2 x i64> %8, %14
+; CHECK-NEXT: %22 = shl nsw <2 x i64> %9, %15
+; CHECK-NEXT: %23 = shl nsw <2 x i64> %10, %16
+; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16
+; CHECK-NEXT: ret <2 x i64> %18
+
+define <12 x i64> @shl_binop_12xi64_nuw_nsw(<12 x i64>, <12 x i64>) {
+ %3 = shl nuw nsw <12 x i64> %0, %1
+ ret <12 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @shl_binop_12xi64_nuw_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %18 = shl nuw nsw <2 x i64> %5, %11
+; CHECK-NEXT: %19 = shl nuw nsw <2 x i64> %6, %12
+; CHECK-NEXT: %20 = shl nuw nsw <2 x i64> %7, %13
+; CHECK-NEXT: %21 = shl nuw nsw <2 x i64> %8, %14
+; CHECK-NEXT: %22 = shl nuw nsw <2 x i64> %9, %15
+; CHECK-NEXT: %23 = shl nuw nsw <2 x i64> %10, %16
+; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16
+; CHECK-NEXT: ret <2 x i64> %18
+
+define <12 x i64> @udiv_binop_12xi64(<12 x i64>, <12 x i64>) {
+ %3 = udiv <12 x i64> %0, %1
+ ret <12 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @udiv_binop_12xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %18 = udiv <2 x i64> %5, %11
+; CHECK-NEXT: %19 = udiv <2 x i64> %6, %12
+; CHECK-NEXT: %20 = udiv <2 x i64> %7, %13
+; CHECK-NEXT: %21 = udiv <2 x i64> %8, %14
+; CHECK-NEXT: %22 = udiv <2 x i64> %9, %15
+; CHECK-NEXT: %23 = udiv <2 x i64> %10, %16
+; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16
+; CHECK-NEXT: ret <2 x i64> %18
+
+define <12 x i64> @udiv_binop_12xi64_exact(<12 x i64>, <12 x i64>) {
+ %3 = udiv exact <12 x i64> %0, %1
+ ret <12 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @udiv_binop_12xi64_exact(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %18 = udiv exact <2 x i64> %5, %11
+; CHECK-NEXT: %19 = udiv exact <2 x i64> %6, %12
+; CHECK-NEXT: %20 = udiv exact <2 x i64> %7, %13
+; CHECK-NEXT: %21 = udiv exact <2 x i64> %8, %14
+; CHECK-NEXT: %22 = udiv exact <2 x i64> %9, %15
+; CHECK-NEXT: %23 = udiv exact <2 x i64> %10, %16
+; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16
+; CHECK-NEXT: ret <2 x i64> %18
+
+define <12 x i64> @sdiv_binop_12xi64(<12 x i64>, <12 x i64>) {
+ %3 = sdiv <12 x i64> %0, %1
+ ret <12 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @sdiv_binop_12xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %18 = sdiv <2 x i64> %5, %11
+; CHECK-NEXT: %19 = sdiv <2 x i64> %6, %12
+; CHECK-NEXT: %20 = sdiv <2 x i64> %7, %13
+; CHECK-NEXT: %21 = sdiv <2 x i64> %8, %14
+; CHECK-NEXT: %22 = sdiv <2 x i64> %9, %15
+; CHECK-NEXT: %23 = sdiv <2 x i64> %10, %16
+; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16
+; CHECK-NEXT: ret <2 x i64> %18
+
+define <12 x i64> @sdiv_binop_12xi64_exact(<12 x i64>, <12 x i64>) {
+ %3 = sdiv exact <12 x i64> %0, %1
+ ret <12 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @sdiv_binop_12xi64_exact(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %18 = sdiv exact <2 x i64> %5, %11
+; CHECK-NEXT: %19 = sdiv exact <2 x i64> %6, %12
+; CHECK-NEXT: %20 = sdiv exact <2 x i64> %7, %13
+; CHECK-NEXT: %21 = sdiv exact <2 x i64> %8, %14
+; CHECK-NEXT: %22 = sdiv exact <2 x i64> %9, %15
+; CHECK-NEXT: %23 = sdiv exact <2 x i64> %10, %16
+; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16
+; CHECK-NEXT: ret <2 x i64> %18
+
+define <12 x i64> @lshr_binop_12xi64(<12 x i64>, <12 x i64>) {
+ %3 = lshr <12 x i64> %0, %1
+ ret <12 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @lshr_binop_12xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %18 = lshr <2 x i64> %5, %11
+; CHECK-NEXT: %19 = lshr <2 x i64> %6, %12
+; CHECK-NEXT: %20 = lshr <2 x i64> %7, %13
+; CHECK-NEXT: %21 = lshr <2 x i64> %8, %14
+; CHECK-NEXT: %22 = lshr <2 x i64> %9, %15
+; CHECK-NEXT: %23 = lshr <2 x i64> %10, %16
+; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16
+; CHECK-NEXT: ret <2 x i64> %18
+
+define <12 x i64> @lshr_binop_12xi64_exact(<12 x i64>, <12 x i64>) {
+ %3 = lshr exact <12 x i64> %0, %1
+ ret <12 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @lshr_binop_12xi64_exact(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %18 = lshr exact <2 x i64> %5, %11
+; CHECK-NEXT: %19 = lshr exact <2 x i64> %6, %12
+; CHECK-NEXT: %20 = lshr exact <2 x i64> %7, %13
+; CHECK-NEXT: %21 = lshr exact <2 x i64> %8, %14
+; CHECK-NEXT: %22 = lshr exact <2 x i64> %9, %15
+; CHECK-NEXT: %23 = lshr exact <2 x i64> %10, %16
+; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16
+; CHECK-NEXT: ret <2 x i64> %18
+
+define <12 x i64> @ashr_binop_12xi64(<12 x i64>, <12 x i64>) {
+ %3 = ashr <12 x i64> %0, %1
+ ret <12 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @ashr_binop_12xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %18 = ashr <2 x i64> %5, %11
+; CHECK-NEXT: %19 = ashr <2 x i64> %6, %12
+; CHECK-NEXT: %20 = ashr <2 x i64> %7, %13
+; CHECK-NEXT: %21 = ashr <2 x i64> %8, %14
+; CHECK-NEXT: %22 = ashr <2 x i64> %9, %15
+; CHECK-NEXT: %23 = ashr <2 x i64> %10, %16
+; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16
+; CHECK-NEXT: ret <2 x i64> %18
+
+define <12 x i64> @ashr_binop_12xi64_exact(<12 x i64>, <12 x i64>) {
+ %3 = ashr exact <12 x i64> %0, %1
+ ret <12 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @ashr_binop_12xi64_exact(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %18 = ashr exact <2 x i64> %5, %11
+; CHECK-NEXT: %19 = ashr exact <2 x i64> %6, %12
+; CHECK-NEXT: %20 = ashr exact <2 x i64> %7, %13
+; CHECK-NEXT: %21 = ashr exact <2 x i64> %8, %14
+; CHECK-NEXT: %22 = ashr exact <2 x i64> %9, %15
+; CHECK-NEXT: %23 = ashr exact <2 x i64> %10, %16
+; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16
+; CHECK-NEXT: ret <2 x i64> %18
+
+define <12 x i64> @and_binop_12xi64(<12 x i64>, <12 x i64>) {
+ %3 = and <12 x i64> %0, %1
+ ret <12 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @and_binop_12xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %18 = and <2 x i64> %5, %11
+; CHECK-NEXT: %19 = and <2 x i64> %6, %12
+; CHECK-NEXT: %20 = and <2 x i64> %7, %13
+; CHECK-NEXT: %21 = and <2 x i64> %8, %14
+; CHECK-NEXT: %22 = and <2 x i64> %9, %15
+; CHECK-NEXT: %23 = and <2 x i64> %10, %16
+; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16
+; CHECK-NEXT: ret <2 x i64> %18
+
+define <12 x i64> @xor_binop_12xi64(<12 x i64>, <12 x i64>) {
+ %3 = xor <12 x i64> %0, %1
+ ret <12 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @xor_binop_12xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %18 = xor <2 x i64> %5, %11
+; CHECK-NEXT: %19 = xor <2 x i64> %6, %12
+; CHECK-NEXT: %20 = xor <2 x i64> %7, %13
+; CHECK-NEXT: %21 = xor <2 x i64> %8, %14
+; CHECK-NEXT: %22 = xor <2 x i64> %9, %15
+; CHECK-NEXT: %23 = xor <2 x i64> %10, %16
+; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16
+; CHECK-NEXT: ret <2 x i64> %18
+
+define <12 x i64> @or_binop_12xi64(<12 x i64>, <12 x i64>) {
+ %3 = or <12 x i64> %0, %1
+ ret <12 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @or_binop_12xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %18 = or <2 x i64> %5, %11
+; CHECK-NEXT: %19 = or <2 x i64> %6, %12
+; CHECK-NEXT: %20 = or <2 x i64> %7, %13
+; CHECK-NEXT: %21 = or <2 x i64> %8, %14
+; CHECK-NEXT: %22 = or <2 x i64> %9, %15
+; CHECK-NEXT: %23 = or <2 x i64> %10, %16
+; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16
+; CHECK-NEXT: ret <2 x i64> %18
+
+define <12 x i64> @urem_binop_12xi64(<12 x i64>, <12 x i64>) {
+ %3 = urem <12 x i64> %0, %1
+ ret <12 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @urem_binop_12xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %18 = urem <2 x i64> %5, %11
+; CHECK-NEXT: %19 = urem <2 x i64> %6, %12
+; CHECK-NEXT: %20 = urem <2 x i64> %7, %13
+; CHECK-NEXT: %21 = urem <2 x i64> %8, %14
+; CHECK-NEXT: %22 = urem <2 x i64> %9, %15
+; CHECK-NEXT: %23 = urem <2 x i64> %10, %16
+; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16
+; CHECK-NEXT: ret <2 x i64> %18
+
+define <12 x i64> @srem_binop_12xi64(<12 x i64>, <12 x i64>) {
+ %3 = srem <12 x i64> %0, %1
+ ret <12 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @srem_binop_12xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %18 = srem <2 x i64> %5, %11
+; CHECK-NEXT: %19 = srem <2 x i64> %6, %12
+; CHECK-NEXT: %20 = srem <2 x i64> %7, %13
+; CHECK-NEXT: %21 = srem <2 x i64> %8, %14
+; CHECK-NEXT: %22 = srem <2 x i64> %9, %15
+; CHECK-NEXT: %23 = srem <2 x i64> %10, %16
+; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16
+; CHECK-NEXT: ret <2 x i64> %18
+
+define <16 x i8> @add_binop_16xi8_nuw(<16 x i8>, <16 x i8>) {
+ %3 = add nuw <16 x i8> %0, %1
+ ret <16 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @add_binop_16xi8_nuw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = add nuw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <16 x i8> @add_binop_16xi8_nsw(<16 x i8>, <16 x i8>) {
+ %3 = add nsw <16 x i8> %0, %1
+ ret <16 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @add_binop_16xi8_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = add nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <16 x i8> @add_binop_16xi8_nuw_nsw(<16 x i8>, <16 x i8>) {
+ %3 = add nuw nsw <16 x i8> %0, %1
+ ret <16 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @add_binop_16xi8_nuw_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = add nuw nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <16 x i8> @sub_binop_16xi8_nuw(<16 x i8>, <16 x i8>) {
+ %3 = sub nuw <16 x i8> %0, %1
+ ret <16 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @sub_binop_16xi8_nuw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = sub nuw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <16 x i8> @sub_binop_16xi8_nsw(<16 x i8>, <16 x i8>) {
+ %3 = sub nsw <16 x i8> %0, %1
+ ret <16 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @sub_binop_16xi8_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = sub nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <16 x i8> @sub_binop_16xi8_nuw_nsw(<16 x i8>, <16 x i8>) {
+ %3 = sub nuw nsw <16 x i8> %0, %1
+ ret <16 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @sub_binop_16xi8_nuw_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = sub nuw nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <16 x i8> @mul_binop_16xi8_nuw(<16 x i8>, <16 x i8>) {
+ %3 = mul nuw <16 x i8> %0, %1
+ ret <16 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @mul_binop_16xi8_nuw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = mul nuw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <16 x i8> @mul_binop_16xi8_nsw(<16 x i8>, <16 x i8>) {
+ %3 = mul nsw <16 x i8> %0, %1
+ ret <16 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @mul_binop_16xi8_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = mul nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <16 x i8> @mul_binop_16xi8_nuw_nsw(<16 x i8>, <16 x i8>) {
+ %3 = mul nuw nsw <16 x i8> %0, %1
+ ret <16 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @mul_binop_16xi8_nuw_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = mul nuw nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <16 x i8> @shl_binop_16xi8_nuw(<16 x i8>, <16 x i8>) {
+ %3 = shl nuw <16 x i8> %0, %1
+ ret <16 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @shl_binop_16xi8_nuw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = shl nuw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <16 x i8> @shl_binop_16xi8_nsw(<16 x i8>, <16 x i8>) {
+ %3 = shl nsw <16 x i8> %0, %1
+ ret <16 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @shl_binop_16xi8_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = shl nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <16 x i8> @shl_binop_16xi8_nuw_nsw(<16 x i8>, <16 x i8>) {
+ %3 = shl nuw nsw <16 x i8> %0, %1
+ ret <16 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @shl_binop_16xi8_nuw_nsw(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = shl nuw nsw <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <16 x i8> @udiv_binop_16xi8(<16 x i8>, <16 x i8>) {
+ %3 = udiv <16 x i8> %0, %1
+ ret <16 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @udiv_binop_16xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = udiv <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <16 x i8> @udiv_binop_16xi8_exact(<16 x i8>, <16 x i8>) {
+ %3 = udiv exact <16 x i8> %0, %1
+ ret <16 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @udiv_binop_16xi8_exact(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = udiv exact <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <16 x i8> @sdiv_binop_16xi8(<16 x i8>, <16 x i8>) {
+ %3 = sdiv <16 x i8> %0, %1
+ ret <16 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @sdiv_binop_16xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = sdiv <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <16 x i8> @sdiv_binop_16xi8_exact(<16 x i8>, <16 x i8>) {
+ %3 = sdiv exact <16 x i8> %0, %1
+ ret <16 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @sdiv_binop_16xi8_exact(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = sdiv exact <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <16 x i8> @lshr_binop_16xi8(<16 x i8>, <16 x i8>) {
+ %3 = lshr <16 x i8> %0, %1
+ ret <16 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @lshr_binop_16xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = lshr <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <16 x i8> @lshr_binop_16xi8_exact(<16 x i8>, <16 x i8>) {
+ %3 = lshr exact <16 x i8> %0, %1
+ ret <16 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @lshr_binop_16xi8_exact(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = lshr exact <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <16 x i8> @ashr_binop_16xi8(<16 x i8>, <16 x i8>) {
+ %3 = ashr <16 x i8> %0, %1
+ ret <16 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @ashr_binop_16xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = ashr <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <16 x i8> @ashr_binop_16xi8_exact(<16 x i8>, <16 x i8>) {
+ %3 = ashr exact <16 x i8> %0, %1
+ ret <16 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @ashr_binop_16xi8_exact(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = ashr exact <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <16 x i8> @and_binop_16xi8(<16 x i8>, <16 x i8>) {
+ %3 = and <16 x i8> %0, %1
+ ret <16 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @and_binop_16xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = and <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <16 x i8> @xor_binop_16xi8(<16 x i8>, <16 x i8>) {
+ %3 = xor <16 x i8> %0, %1
+ ret <16 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @xor_binop_16xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = xor <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <16 x i8> @or_binop_16xi8(<16 x i8>, <16 x i8>) {
+ %3 = or <16 x i8> %0, %1
+ ret <16 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @or_binop_16xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = or <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <16 x i8> @urem_binop_16xi8(<16 x i8>, <16 x i8>) {
+ %3 = urem <16 x i8> %0, %1
+ ret <16 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @urem_binop_16xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = urem <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <16 x i8> @srem_binop_16xi8(<16 x i8>, <16 x i8>) {
+ %3 = srem <16 x i8> %0, %1
+ ret <16 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @srem_binop_16xi8(<16 x i8>, <16 x i8>)
+; CHECK-NEXT: %3 = srem <16 x i8> %0, %1
+; CHECK-NEXT: ret <16 x i8> %3
+
+define <16 x i16> @add_binop_16xi16_nuw(<16 x i16>, <16 x i16>) {
+ %3 = add nuw <16 x i16> %0, %1
+ ret <16 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @add_binop_16xi16_nuw(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = add nuw <8 x i16> %1, %3
+; CHECK-NEXT: %7 = add nuw <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <16 x i16> @add_binop_16xi16_nsw(<16 x i16>, <16 x i16>) {
+ %3 = add nsw <16 x i16> %0, %1
+ ret <16 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @add_binop_16xi16_nsw(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = add nsw <8 x i16> %1, %3
+; CHECK-NEXT: %7 = add nsw <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <16 x i16> @add_binop_16xi16_nuw_nsw(<16 x i16>, <16 x i16>) {
+ %3 = add nuw nsw <16 x i16> %0, %1
+ ret <16 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @add_binop_16xi16_nuw_nsw(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = add nuw nsw <8 x i16> %1, %3
+; CHECK-NEXT: %7 = add nuw nsw <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <16 x i16> @sub_binop_16xi16_nuw(<16 x i16>, <16 x i16>) {
+ %3 = sub nuw <16 x i16> %0, %1
+ ret <16 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @sub_binop_16xi16_nuw(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = sub nuw <8 x i16> %1, %3
+; CHECK-NEXT: %7 = sub nuw <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <16 x i16> @sub_binop_16xi16_nsw(<16 x i16>, <16 x i16>) {
+ %3 = sub nsw <16 x i16> %0, %1
+ ret <16 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @sub_binop_16xi16_nsw(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = sub nsw <8 x i16> %1, %3
+; CHECK-NEXT: %7 = sub nsw <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <16 x i16> @sub_binop_16xi16_nuw_nsw(<16 x i16>, <16 x i16>) {
+ %3 = sub nuw nsw <16 x i16> %0, %1
+ ret <16 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @sub_binop_16xi16_nuw_nsw(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = sub nuw nsw <8 x i16> %1, %3
+; CHECK-NEXT: %7 = sub nuw nsw <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <16 x i16> @mul_binop_16xi16_nuw(<16 x i16>, <16 x i16>) {
+ %3 = mul nuw <16 x i16> %0, %1
+ ret <16 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @mul_binop_16xi16_nuw(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = mul nuw <8 x i16> %1, %3
+; CHECK-NEXT: %7 = mul nuw <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <16 x i16> @mul_binop_16xi16_nsw(<16 x i16>, <16 x i16>) {
+ %3 = mul nsw <16 x i16> %0, %1
+ ret <16 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @mul_binop_16xi16_nsw(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = mul nsw <8 x i16> %1, %3
+; CHECK-NEXT: %7 = mul nsw <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <16 x i16> @mul_binop_16xi16_nuw_nsw(<16 x i16>, <16 x i16>) {
+ %3 = mul nuw nsw <16 x i16> %0, %1
+ ret <16 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @mul_binop_16xi16_nuw_nsw(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = mul nuw nsw <8 x i16> %1, %3
+; CHECK-NEXT: %7 = mul nuw nsw <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <16 x i16> @shl_binop_16xi16_nuw(<16 x i16>, <16 x i16>) {
+ %3 = shl nuw <16 x i16> %0, %1
+ ret <16 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @shl_binop_16xi16_nuw(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = shl nuw <8 x i16> %1, %3
+; CHECK-NEXT: %7 = shl nuw <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <16 x i16> @shl_binop_16xi16_nsw(<16 x i16>, <16 x i16>) {
+ %3 = shl nsw <16 x i16> %0, %1
+ ret <16 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @shl_binop_16xi16_nsw(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = shl nsw <8 x i16> %1, %3
+; CHECK-NEXT: %7 = shl nsw <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <16 x i16> @shl_binop_16xi16_nuw_nsw(<16 x i16>, <16 x i16>) {
+ %3 = shl nuw nsw <16 x i16> %0, %1
+ ret <16 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @shl_binop_16xi16_nuw_nsw(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = shl nuw nsw <8 x i16> %1, %3
+; CHECK-NEXT: %7 = shl nuw nsw <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <16 x i16> @udiv_binop_16xi16(<16 x i16>, <16 x i16>) {
+ %3 = udiv <16 x i16> %0, %1
+ ret <16 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @udiv_binop_16xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = udiv <8 x i16> %1, %3
+; CHECK-NEXT: %7 = udiv <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <16 x i16> @udiv_binop_16xi16_exact(<16 x i16>, <16 x i16>) {
+ %3 = udiv exact <16 x i16> %0, %1
+ ret <16 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @udiv_binop_16xi16_exact(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = udiv exact <8 x i16> %1, %3
+; CHECK-NEXT: %7 = udiv exact <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <16 x i16> @sdiv_binop_16xi16(<16 x i16>, <16 x i16>) {
+ %3 = sdiv <16 x i16> %0, %1
+ ret <16 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @sdiv_binop_16xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = sdiv <8 x i16> %1, %3
+; CHECK-NEXT: %7 = sdiv <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <16 x i16> @sdiv_binop_16xi16_exact(<16 x i16>, <16 x i16>) {
+ %3 = sdiv exact <16 x i16> %0, %1
+ ret <16 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @sdiv_binop_16xi16_exact(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = sdiv exact <8 x i16> %1, %3
+; CHECK-NEXT: %7 = sdiv exact <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <16 x i16> @lshr_binop_16xi16(<16 x i16>, <16 x i16>) {
+ %3 = lshr <16 x i16> %0, %1
+ ret <16 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @lshr_binop_16xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = lshr <8 x i16> %1, %3
+; CHECK-NEXT: %7 = lshr <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <16 x i16> @lshr_binop_16xi16_exact(<16 x i16>, <16 x i16>) {
+ %3 = lshr exact <16 x i16> %0, %1
+ ret <16 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @lshr_binop_16xi16_exact(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = lshr exact <8 x i16> %1, %3
+; CHECK-NEXT: %7 = lshr exact <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <16 x i16> @ashr_binop_16xi16(<16 x i16>, <16 x i16>) {
+ %3 = ashr <16 x i16> %0, %1
+ ret <16 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @ashr_binop_16xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = ashr <8 x i16> %1, %3
+; CHECK-NEXT: %7 = ashr <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <16 x i16> @ashr_binop_16xi16_exact(<16 x i16>, <16 x i16>) {
+ %3 = ashr exact <16 x i16> %0, %1
+ ret <16 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @ashr_binop_16xi16_exact(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = ashr exact <8 x i16> %1, %3
+; CHECK-NEXT: %7 = ashr exact <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <16 x i16> @and_binop_16xi16(<16 x i16>, <16 x i16>) {
+ %3 = and <16 x i16> %0, %1
+ ret <16 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @and_binop_16xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = and <8 x i16> %1, %3
+; CHECK-NEXT: %7 = and <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <16 x i16> @xor_binop_16xi16(<16 x i16>, <16 x i16>) {
+ %3 = xor <16 x i16> %0, %1
+ ret <16 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @xor_binop_16xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = xor <8 x i16> %1, %3
+; CHECK-NEXT: %7 = xor <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <16 x i16> @or_binop_16xi16(<16 x i16>, <16 x i16>) {
+ %3 = or <16 x i16> %0, %1
+ ret <16 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @or_binop_16xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = or <8 x i16> %1, %3
+; CHECK-NEXT: %7 = or <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <16 x i16> @urem_binop_16xi16(<16 x i16>, <16 x i16>) {
+ %3 = urem <16 x i16> %0, %1
+ ret <16 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @urem_binop_16xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = urem <8 x i16> %1, %3
+; CHECK-NEXT: %7 = urem <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <16 x i16> @srem_binop_16xi16(<16 x i16>, <16 x i16>) {
+ %3 = srem <16 x i16> %0, %1
+ ret <16 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @srem_binop_16xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %6 = srem <8 x i16> %1, %3
+; CHECK-NEXT: %7 = srem <8 x i16> %2, %4
+; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16
+; CHECK-NEXT: ret <8 x i16> %6
+
+define <16 x i32> @add_binop_16xi32_nuw(<16 x i32>, <16 x i32>) {
+ %3 = add nuw <16 x i32> %0, %1
+ ret <16 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @add_binop_16xi32_nuw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %12 = add nuw <4 x i32> %3, %7
+; CHECK-NEXT: %13 = add nuw <4 x i32> %4, %8
+; CHECK-NEXT: %14 = add nuw <4 x i32> %5, %9
+; CHECK-NEXT: %15 = add nuw <4 x i32> %6, %10
+; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16
+; CHECK-NEXT: ret <4 x i32> %12
+
+define <16 x i32> @add_binop_16xi32_nsw(<16 x i32>, <16 x i32>) {
+ %3 = add nsw <16 x i32> %0, %1
+ ret <16 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @add_binop_16xi32_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %12 = add nsw <4 x i32> %3, %7
+; CHECK-NEXT: %13 = add nsw <4 x i32> %4, %8
+; CHECK-NEXT: %14 = add nsw <4 x i32> %5, %9
+; CHECK-NEXT: %15 = add nsw <4 x i32> %6, %10
+; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16
+; CHECK-NEXT: ret <4 x i32> %12
+
+define <16 x i32> @add_binop_16xi32_nuw_nsw(<16 x i32>, <16 x i32>) {
+ %3 = add nuw nsw <16 x i32> %0, %1
+ ret <16 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @add_binop_16xi32_nuw_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %12 = add nuw nsw <4 x i32> %3, %7
+; CHECK-NEXT: %13 = add nuw nsw <4 x i32> %4, %8
+; CHECK-NEXT: %14 = add nuw nsw <4 x i32> %5, %9
+; CHECK-NEXT: %15 = add nuw nsw <4 x i32> %6, %10
+; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16
+; CHECK-NEXT: ret <4 x i32> %12
+
+define <16 x i32> @sub_binop_16xi32_nuw(<16 x i32>, <16 x i32>) {
+ %3 = sub nuw <16 x i32> %0, %1
+ ret <16 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @sub_binop_16xi32_nuw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %12 = sub nuw <4 x i32> %3, %7
+; CHECK-NEXT: %13 = sub nuw <4 x i32> %4, %8
+; CHECK-NEXT: %14 = sub nuw <4 x i32> %5, %9
+; CHECK-NEXT: %15 = sub nuw <4 x i32> %6, %10
+; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16
+; CHECK-NEXT: ret <4 x i32> %12
+
+define <16 x i32> @sub_binop_16xi32_nsw(<16 x i32>, <16 x i32>) {
+ %3 = sub nsw <16 x i32> %0, %1
+ ret <16 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @sub_binop_16xi32_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %12 = sub nsw <4 x i32> %3, %7
+; CHECK-NEXT: %13 = sub nsw <4 x i32> %4, %8
+; CHECK-NEXT: %14 = sub nsw <4 x i32> %5, %9
+; CHECK-NEXT: %15 = sub nsw <4 x i32> %6, %10
+; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16
+; CHECK-NEXT: ret <4 x i32> %12
+
+define <16 x i32> @sub_binop_16xi32_nuw_nsw(<16 x i32>, <16 x i32>) {
+ %3 = sub nuw nsw <16 x i32> %0, %1
+ ret <16 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @sub_binop_16xi32_nuw_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %12 = sub nuw nsw <4 x i32> %3, %7
+; CHECK-NEXT: %13 = sub nuw nsw <4 x i32> %4, %8
+; CHECK-NEXT: %14 = sub nuw nsw <4 x i32> %5, %9
+; CHECK-NEXT: %15 = sub nuw nsw <4 x i32> %6, %10
+; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16
+; CHECK-NEXT: ret <4 x i32> %12
+
+define <16 x i32> @mul_binop_16xi32_nuw(<16 x i32>, <16 x i32>) {
+ %3 = mul nuw <16 x i32> %0, %1
+ ret <16 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @mul_binop_16xi32_nuw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %12 = mul nuw <4 x i32> %3, %7
+; CHECK-NEXT: %13 = mul nuw <4 x i32> %4, %8
+; CHECK-NEXT: %14 = mul nuw <4 x i32> %5, %9
+; CHECK-NEXT: %15 = mul nuw <4 x i32> %6, %10
+; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16
+; CHECK-NEXT: ret <4 x i32> %12
+
+define <16 x i32> @mul_binop_16xi32_nsw(<16 x i32>, <16 x i32>) {
+ %3 = mul nsw <16 x i32> %0, %1
+ ret <16 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @mul_binop_16xi32_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %12 = mul nsw <4 x i32> %3, %7
+; CHECK-NEXT: %13 = mul nsw <4 x i32> %4, %8
+; CHECK-NEXT: %14 = mul nsw <4 x i32> %5, %9
+; CHECK-NEXT: %15 = mul nsw <4 x i32> %6, %10
+; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16
+; CHECK-NEXT: ret <4 x i32> %12
+
+define <16 x i32> @mul_binop_16xi32_nuw_nsw(<16 x i32>, <16 x i32>) {
+ %3 = mul nuw nsw <16 x i32> %0, %1
+ ret <16 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @mul_binop_16xi32_nuw_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %12 = mul nuw nsw <4 x i32> %3, %7
+; CHECK-NEXT: %13 = mul nuw nsw <4 x i32> %4, %8
+; CHECK-NEXT: %14 = mul nuw nsw <4 x i32> %5, %9
+; CHECK-NEXT: %15 = mul nuw nsw <4 x i32> %6, %10
+; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16
+; CHECK-NEXT: ret <4 x i32> %12
+
+define <16 x i32> @shl_binop_16xi32_nuw(<16 x i32>, <16 x i32>) {
+ %3 = shl nuw <16 x i32> %0, %1
+ ret <16 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @shl_binop_16xi32_nuw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %12 = shl nuw <4 x i32> %3, %7
+; CHECK-NEXT: %13 = shl nuw <4 x i32> %4, %8
+; CHECK-NEXT: %14 = shl nuw <4 x i32> %5, %9
+; CHECK-NEXT: %15 = shl nuw <4 x i32> %6, %10
+; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16
+; CHECK-NEXT: ret <4 x i32> %12
+
+define <16 x i32> @shl_binop_16xi32_nsw(<16 x i32>, <16 x i32>) {
+ %3 = shl nsw <16 x i32> %0, %1
+ ret <16 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @shl_binop_16xi32_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %12 = shl nsw <4 x i32> %3, %7
+; CHECK-NEXT: %13 = shl nsw <4 x i32> %4, %8
+; CHECK-NEXT: %14 = shl nsw <4 x i32> %5, %9
+; CHECK-NEXT: %15 = shl nsw <4 x i32> %6, %10
+; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16
+; CHECK-NEXT: ret <4 x i32> %12
+
+define <16 x i32> @shl_binop_16xi32_nuw_nsw(<16 x i32>, <16 x i32>) {
+ %3 = shl nuw nsw <16 x i32> %0, %1
+ ret <16 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @shl_binop_16xi32_nuw_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %12 = shl nuw nsw <4 x i32> %3, %7
+; CHECK-NEXT: %13 = shl nuw nsw <4 x i32> %4, %8
+; CHECK-NEXT: %14 = shl nuw nsw <4 x i32> %5, %9
+; CHECK-NEXT: %15 = shl nuw nsw <4 x i32> %6, %10
+; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16
+; CHECK-NEXT: ret <4 x i32> %12
+
+define <16 x i32> @udiv_binop_16xi32(<16 x i32>, <16 x i32>) {
+ %3 = udiv <16 x i32> %0, %1
+ ret <16 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @udiv_binop_16xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %12 = udiv <4 x i32> %3, %7
+; CHECK-NEXT: %13 = udiv <4 x i32> %4, %8
+; CHECK-NEXT: %14 = udiv <4 x i32> %5, %9
+; CHECK-NEXT: %15 = udiv <4 x i32> %6, %10
+; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16
+; CHECK-NEXT: ret <4 x i32> %12
+
+define <16 x i32> @udiv_binop_16xi32_exact(<16 x i32>, <16 x i32>) {
+ %3 = udiv exact <16 x i32> %0, %1
+ ret <16 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @udiv_binop_16xi32_exact(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %12 = udiv exact <4 x i32> %3, %7
+; CHECK-NEXT: %13 = udiv exact <4 x i32> %4, %8
+; CHECK-NEXT: %14 = udiv exact <4 x i32> %5, %9
+; CHECK-NEXT: %15 = udiv exact <4 x i32> %6, %10
+; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16
+; CHECK-NEXT: ret <4 x i32> %12
+
+define <16 x i32> @sdiv_binop_16xi32(<16 x i32>, <16 x i32>) {
+ %3 = sdiv <16 x i32> %0, %1
+ ret <16 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @sdiv_binop_16xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %12 = sdiv <4 x i32> %3, %7
+; CHECK-NEXT: %13 = sdiv <4 x i32> %4, %8
+; CHECK-NEXT: %14 = sdiv <4 x i32> %5, %9
+; CHECK-NEXT: %15 = sdiv <4 x i32> %6, %10
+; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16
+; CHECK-NEXT: ret <4 x i32> %12
+
+define <16 x i32> @sdiv_binop_16xi32_exact(<16 x i32>, <16 x i32>) {
+ %3 = sdiv exact <16 x i32> %0, %1
+ ret <16 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @sdiv_binop_16xi32_exact(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %12 = sdiv exact <4 x i32> %3, %7
+; CHECK-NEXT: %13 = sdiv exact <4 x i32> %4, %8
+; CHECK-NEXT: %14 = sdiv exact <4 x i32> %5, %9
+; CHECK-NEXT: %15 = sdiv exact <4 x i32> %6, %10
+; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16
+; CHECK-NEXT: ret <4 x i32> %12
+
+define <16 x i32> @lshr_binop_16xi32(<16 x i32>, <16 x i32>) {
+ %3 = lshr <16 x i32> %0, %1
+ ret <16 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @lshr_binop_16xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %12 = lshr <4 x i32> %3, %7
+; CHECK-NEXT: %13 = lshr <4 x i32> %4, %8
+; CHECK-NEXT: %14 = lshr <4 x i32> %5, %9
+; CHECK-NEXT: %15 = lshr <4 x i32> %6, %10
+; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16
+; CHECK-NEXT: ret <4 x i32> %12
+
+define <16 x i32> @lshr_binop_16xi32_exact(<16 x i32>, <16 x i32>) {
+ %3 = lshr exact <16 x i32> %0, %1
+ ret <16 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @lshr_binop_16xi32_exact(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %12 = lshr exact <4 x i32> %3, %7
+; CHECK-NEXT: %13 = lshr exact <4 x i32> %4, %8
+; CHECK-NEXT: %14 = lshr exact <4 x i32> %5, %9
+; CHECK-NEXT: %15 = lshr exact <4 x i32> %6, %10
+; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16
+; CHECK-NEXT: ret <4 x i32> %12
+
+define <16 x i32> @ashr_binop_16xi32(<16 x i32>, <16 x i32>) {
+ %3 = ashr <16 x i32> %0, %1
+ ret <16 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @ashr_binop_16xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %12 = ashr <4 x i32> %3, %7
+; CHECK-NEXT: %13 = ashr <4 x i32> %4, %8
+; CHECK-NEXT: %14 = ashr <4 x i32> %5, %9
+; CHECK-NEXT: %15 = ashr <4 x i32> %6, %10
+; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16
+; CHECK-NEXT: ret <4 x i32> %12
+
+define <16 x i32> @ashr_binop_16xi32_exact(<16 x i32>, <16 x i32>) {
+ %3 = ashr exact <16 x i32> %0, %1
+ ret <16 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @ashr_binop_16xi32_exact(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %12 = ashr exact <4 x i32> %3, %7
+; CHECK-NEXT: %13 = ashr exact <4 x i32> %4, %8
+; CHECK-NEXT: %14 = ashr exact <4 x i32> %5, %9
+; CHECK-NEXT: %15 = ashr exact <4 x i32> %6, %10
+; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16
+; CHECK-NEXT: ret <4 x i32> %12
+
+define <16 x i32> @and_binop_16xi32(<16 x i32>, <16 x i32>) {
+ %3 = and <16 x i32> %0, %1
+ ret <16 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @and_binop_16xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %12 = and <4 x i32> %3, %7
+; CHECK-NEXT: %13 = and <4 x i32> %4, %8
+; CHECK-NEXT: %14 = and <4 x i32> %5, %9
+; CHECK-NEXT: %15 = and <4 x i32> %6, %10
+; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16
+; CHECK-NEXT: ret <4 x i32> %12
+
+define <16 x i32> @xor_binop_16xi32(<16 x i32>, <16 x i32>) {
+ %3 = xor <16 x i32> %0, %1
+ ret <16 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @xor_binop_16xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %12 = xor <4 x i32> %3, %7
+; CHECK-NEXT: %13 = xor <4 x i32> %4, %8
+; CHECK-NEXT: %14 = xor <4 x i32> %5, %9
+; CHECK-NEXT: %15 = xor <4 x i32> %6, %10
+; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16
+; CHECK-NEXT: ret <4 x i32> %12
+
+define <16 x i32> @or_binop_16xi32(<16 x i32>, <16 x i32>) {
+ %3 = or <16 x i32> %0, %1
+ ret <16 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @or_binop_16xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %12 = or <4 x i32> %3, %7
+; CHECK-NEXT: %13 = or <4 x i32> %4, %8
+; CHECK-NEXT: %14 = or <4 x i32> %5, %9
+; CHECK-NEXT: %15 = or <4 x i32> %6, %10
+; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16
+; CHECK-NEXT: ret <4 x i32> %12
+
+define <16 x i32> @urem_binop_16xi32(<16 x i32>, <16 x i32>) {
+ %3 = urem <16 x i32> %0, %1
+ ret <16 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @urem_binop_16xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %12 = urem <4 x i32> %3, %7
+; CHECK-NEXT: %13 = urem <4 x i32> %4, %8
+; CHECK-NEXT: %14 = urem <4 x i32> %5, %9
+; CHECK-NEXT: %15 = urem <4 x i32> %6, %10
+; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16
+; CHECK-NEXT: ret <4 x i32> %12
+
+define <16 x i32> @srem_binop_16xi32(<16 x i32>, <16 x i32>) {
+ %3 = srem <16 x i32> %0, %1
+ ret <16 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @srem_binop_16xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %12 = srem <4 x i32> %3, %7
+; CHECK-NEXT: %13 = srem <4 x i32> %4, %8
+; CHECK-NEXT: %14 = srem <4 x i32> %5, %9
+; CHECK-NEXT: %15 = srem <4 x i32> %6, %10
+; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16
+; CHECK-NEXT: ret <4 x i32> %12
+
+define <16 x i64> @add_binop_16xi64_nuw(<16 x i64>, <16 x i64>) {
+ %3 = add nuw <16 x i64> %0, %1
+ ret <16 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @add_binop_16xi64_nuw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %24 = add nuw <2 x i64> %7, %15
+; CHECK-NEXT: %25 = add nuw <2 x i64> %8, %16
+; CHECK-NEXT: %26 = add nuw <2 x i64> %9, %17
+; CHECK-NEXT: %27 = add nuw <2 x i64> %10, %18
+; CHECK-NEXT: %28 = add nuw <2 x i64> %11, %19
+; CHECK-NEXT: %29 = add nuw <2 x i64> %12, %20
+; CHECK-NEXT: %30 = add nuw <2 x i64> %13, %21
+; CHECK-NEXT: %31 = add nuw <2 x i64> %14, %22
+; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16
+; CHECK-NEXT: ret <2 x i64> %24
+
+define <16 x i64> @add_binop_16xi64_nsw(<16 x i64>, <16 x i64>) {
+ %3 = add nsw <16 x i64> %0, %1
+ ret <16 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @add_binop_16xi64_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %24 = add nsw <2 x i64> %7, %15
+; CHECK-NEXT: %25 = add nsw <2 x i64> %8, %16
+; CHECK-NEXT: %26 = add nsw <2 x i64> %9, %17
+; CHECK-NEXT: %27 = add nsw <2 x i64> %10, %18
+; CHECK-NEXT: %28 = add nsw <2 x i64> %11, %19
+; CHECK-NEXT: %29 = add nsw <2 x i64> %12, %20
+; CHECK-NEXT: %30 = add nsw <2 x i64> %13, %21
+; CHECK-NEXT: %31 = add nsw <2 x i64> %14, %22
+; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16
+; CHECK-NEXT: ret <2 x i64> %24
+
+define <16 x i64> @add_binop_16xi64_nuw_nsw(<16 x i64>, <16 x i64>) {
+ %3 = add nuw nsw <16 x i64> %0, %1
+ ret <16 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @add_binop_16xi64_nuw_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %24 = add nuw nsw <2 x i64> %7, %15
+; CHECK-NEXT: %25 = add nuw nsw <2 x i64> %8, %16
+; CHECK-NEXT: %26 = add nuw nsw <2 x i64> %9, %17
+; CHECK-NEXT: %27 = add nuw nsw <2 x i64> %10, %18
+; CHECK-NEXT: %28 = add nuw nsw <2 x i64> %11, %19
+; CHECK-NEXT: %29 = add nuw nsw <2 x i64> %12, %20
+; CHECK-NEXT: %30 = add nuw nsw <2 x i64> %13, %21
+; CHECK-NEXT: %31 = add nuw nsw <2 x i64> %14, %22
+; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16
+; CHECK-NEXT: ret <2 x i64> %24
+
+define <16 x i64> @sub_binop_16xi64_nuw(<16 x i64>, <16 x i64>) {
+ %3 = sub nuw <16 x i64> %0, %1
+ ret <16 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @sub_binop_16xi64_nuw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %24 = sub nuw <2 x i64> %7, %15
+; CHECK-NEXT: %25 = sub nuw <2 x i64> %8, %16
+; CHECK-NEXT: %26 = sub nuw <2 x i64> %9, %17
+; CHECK-NEXT: %27 = sub nuw <2 x i64> %10, %18
+; CHECK-NEXT: %28 = sub nuw <2 x i64> %11, %19
+; CHECK-NEXT: %29 = sub nuw <2 x i64> %12, %20
+; CHECK-NEXT: %30 = sub nuw <2 x i64> %13, %21
+; CHECK-NEXT: %31 = sub nuw <2 x i64> %14, %22
+; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16
+; CHECK-NEXT: ret <2 x i64> %24
+
+define <16 x i64> @sub_binop_16xi64_nsw(<16 x i64>, <16 x i64>) {
+ %3 = sub nsw <16 x i64> %0, %1
+ ret <16 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @sub_binop_16xi64_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %24 = sub nsw <2 x i64> %7, %15
+; CHECK-NEXT: %25 = sub nsw <2 x i64> %8, %16
+; CHECK-NEXT: %26 = sub nsw <2 x i64> %9, %17
+; CHECK-NEXT: %27 = sub nsw <2 x i64> %10, %18
+; CHECK-NEXT: %28 = sub nsw <2 x i64> %11, %19
+; CHECK-NEXT: %29 = sub nsw <2 x i64> %12, %20
+; CHECK-NEXT: %30 = sub nsw <2 x i64> %13, %21
+; CHECK-NEXT: %31 = sub nsw <2 x i64> %14, %22
+; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16
+; CHECK-NEXT: ret <2 x i64> %24
+
+define <16 x i64> @sub_binop_16xi64_nuw_nsw(<16 x i64>, <16 x i64>) {
+ %3 = sub nuw nsw <16 x i64> %0, %1
+ ret <16 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @sub_binop_16xi64_nuw_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %24 = sub nuw nsw <2 x i64> %7, %15
+; CHECK-NEXT: %25 = sub nuw nsw <2 x i64> %8, %16
+; CHECK-NEXT: %26 = sub nuw nsw <2 x i64> %9, %17
+; CHECK-NEXT: %27 = sub nuw nsw <2 x i64> %10, %18
+; CHECK-NEXT: %28 = sub nuw nsw <2 x i64> %11, %19
+; CHECK-NEXT: %29 = sub nuw nsw <2 x i64> %12, %20
+; CHECK-NEXT: %30 = sub nuw nsw <2 x i64> %13, %21
+; CHECK-NEXT: %31 = sub nuw nsw <2 x i64> %14, %22
+; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16
+; CHECK-NEXT: ret <2 x i64> %24
+
+define <16 x i64> @mul_binop_16xi64_nuw(<16 x i64>, <16 x i64>) {
+ %3 = mul nuw <16 x i64> %0, %1
+ ret <16 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @mul_binop_16xi64_nuw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %24 = mul nuw <2 x i64> %7, %15
+; CHECK-NEXT: %25 = mul nuw <2 x i64> %8, %16
+; CHECK-NEXT: %26 = mul nuw <2 x i64> %9, %17
+; CHECK-NEXT: %27 = mul nuw <2 x i64> %10, %18
+; CHECK-NEXT: %28 = mul nuw <2 x i64> %11, %19
+; CHECK-NEXT: %29 = mul nuw <2 x i64> %12, %20
+; CHECK-NEXT: %30 = mul nuw <2 x i64> %13, %21
+; CHECK-NEXT: %31 = mul nuw <2 x i64> %14, %22
+; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16
+; CHECK-NEXT: ret <2 x i64> %24
+
+define <16 x i64> @mul_binop_16xi64_nsw(<16 x i64>, <16 x i64>) {
+ %3 = mul nsw <16 x i64> %0, %1
+ ret <16 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @mul_binop_16xi64_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %24 = mul nsw <2 x i64> %7, %15
+; CHECK-NEXT: %25 = mul nsw <2 x i64> %8, %16
+; CHECK-NEXT: %26 = mul nsw <2 x i64> %9, %17
+; CHECK-NEXT: %27 = mul nsw <2 x i64> %10, %18
+; CHECK-NEXT: %28 = mul nsw <2 x i64> %11, %19
+; CHECK-NEXT: %29 = mul nsw <2 x i64> %12, %20
+; CHECK-NEXT: %30 = mul nsw <2 x i64> %13, %21
+; CHECK-NEXT: %31 = mul nsw <2 x i64> %14, %22
+; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16
+; CHECK-NEXT: ret <2 x i64> %24
+
+define <16 x i64> @mul_binop_16xi64_nuw_nsw(<16 x i64>, <16 x i64>) {
+ %3 = mul nuw nsw <16 x i64> %0, %1
+ ret <16 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @mul_binop_16xi64_nuw_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %24 = mul nuw nsw <2 x i64> %7, %15
+; CHECK-NEXT: %25 = mul nuw nsw <2 x i64> %8, %16
+; CHECK-NEXT: %26 = mul nuw nsw <2 x i64> %9, %17
+; CHECK-NEXT: %27 = mul nuw nsw <2 x i64> %10, %18
+; CHECK-NEXT: %28 = mul nuw nsw <2 x i64> %11, %19
+; CHECK-NEXT: %29 = mul nuw nsw <2 x i64> %12, %20
+; CHECK-NEXT: %30 = mul nuw nsw <2 x i64> %13, %21
+; CHECK-NEXT: %31 = mul nuw nsw <2 x i64> %14, %22
+; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16
+; CHECK-NEXT: ret <2 x i64> %24
+
+define <16 x i64> @shl_binop_16xi64_nuw(<16 x i64>, <16 x i64>) {
+ %3 = shl nuw <16 x i64> %0, %1
+ ret <16 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @shl_binop_16xi64_nuw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %24 = shl nuw <2 x i64> %7, %15
+; CHECK-NEXT: %25 = shl nuw <2 x i64> %8, %16
+; CHECK-NEXT: %26 = shl nuw <2 x i64> %9, %17
+; CHECK-NEXT: %27 = shl nuw <2 x i64> %10, %18
+; CHECK-NEXT: %28 = shl nuw <2 x i64> %11, %19
+; CHECK-NEXT: %29 = shl nuw <2 x i64> %12, %20
+; CHECK-NEXT: %30 = shl nuw <2 x i64> %13, %21
+; CHECK-NEXT: %31 = shl nuw <2 x i64> %14, %22
+; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16
+; CHECK-NEXT: ret <2 x i64> %24
+
+define <16 x i64> @shl_binop_16xi64_nsw(<16 x i64>, <16 x i64>) {
+ %3 = shl nsw <16 x i64> %0, %1
+ ret <16 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @shl_binop_16xi64_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %24 = shl nsw <2 x i64> %7, %15
+; CHECK-NEXT: %25 = shl nsw <2 x i64> %8, %16
+; CHECK-NEXT: %26 = shl nsw <2 x i64> %9, %17
+; CHECK-NEXT: %27 = shl nsw <2 x i64> %10, %18
+; CHECK-NEXT: %28 = shl nsw <2 x i64> %11, %19
+; CHECK-NEXT: %29 = shl nsw <2 x i64> %12, %20
+; CHECK-NEXT: %30 = shl nsw <2 x i64> %13, %21
+; CHECK-NEXT: %31 = shl nsw <2 x i64> %14, %22
+; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16
+; CHECK-NEXT: ret <2 x i64> %24
+
+define <16 x i64> @shl_binop_16xi64_nuw_nsw(<16 x i64>, <16 x i64>) {
+ %3 = shl nuw nsw <16 x i64> %0, %1
+ ret <16 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @shl_binop_16xi64_nuw_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %24 = shl nuw nsw <2 x i64> %7, %15
+; CHECK-NEXT: %25 = shl nuw nsw <2 x i64> %8, %16
+; CHECK-NEXT: %26 = shl nuw nsw <2 x i64> %9, %17
+; CHECK-NEXT: %27 = shl nuw nsw <2 x i64> %10, %18
+; CHECK-NEXT: %28 = shl nuw nsw <2 x i64> %11, %19
+; CHECK-NEXT: %29 = shl nuw nsw <2 x i64> %12, %20
+; CHECK-NEXT: %30 = shl nuw nsw <2 x i64> %13, %21
+; CHECK-NEXT: %31 = shl nuw nsw <2 x i64> %14, %22
+; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16
+; CHECK-NEXT: ret <2 x i64> %24
+
+define <16 x i64> @udiv_binop_16xi64(<16 x i64>, <16 x i64>) {
+ %3 = udiv <16 x i64> %0, %1
+ ret <16 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @udiv_binop_16xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %24 = udiv <2 x i64> %7, %15
+; CHECK-NEXT: %25 = udiv <2 x i64> %8, %16
+; CHECK-NEXT: %26 = udiv <2 x i64> %9, %17
+; CHECK-NEXT: %27 = udiv <2 x i64> %10, %18
+; CHECK-NEXT: %28 = udiv <2 x i64> %11, %19
+; CHECK-NEXT: %29 = udiv <2 x i64> %12, %20
+; CHECK-NEXT: %30 = udiv <2 x i64> %13, %21
+; CHECK-NEXT: %31 = udiv <2 x i64> %14, %22
+; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16
+; CHECK-NEXT: ret <2 x i64> %24
+
+define <16 x i64> @udiv_binop_16xi64_exact(<16 x i64>, <16 x i64>) {
+ %3 = udiv exact <16 x i64> %0, %1
+ ret <16 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @udiv_binop_16xi64_exact(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %24 = udiv exact <2 x i64> %7, %15
+; CHECK-NEXT: %25 = udiv exact <2 x i64> %8, %16
+; CHECK-NEXT: %26 = udiv exact <2 x i64> %9, %17
+; CHECK-NEXT: %27 = udiv exact <2 x i64> %10, %18
+; CHECK-NEXT: %28 = udiv exact <2 x i64> %11, %19
+; CHECK-NEXT: %29 = udiv exact <2 x i64> %12, %20
+; CHECK-NEXT: %30 = udiv exact <2 x i64> %13, %21
+; CHECK-NEXT: %31 = udiv exact <2 x i64> %14, %22
+; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16
+; CHECK-NEXT: ret <2 x i64> %24
+
+define <16 x i64> @sdiv_binop_16xi64(<16 x i64>, <16 x i64>) {
+ %3 = sdiv <16 x i64> %0, %1
+ ret <16 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @sdiv_binop_16xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %24 = sdiv <2 x i64> %7, %15
+; CHECK-NEXT: %25 = sdiv <2 x i64> %8, %16
+; CHECK-NEXT: %26 = sdiv <2 x i64> %9, %17
+; CHECK-NEXT: %27 = sdiv <2 x i64> %10, %18
+; CHECK-NEXT: %28 = sdiv <2 x i64> %11, %19
+; CHECK-NEXT: %29 = sdiv <2 x i64> %12, %20
+; CHECK-NEXT: %30 = sdiv <2 x i64> %13, %21
+; CHECK-NEXT: %31 = sdiv <2 x i64> %14, %22
+; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16
+; CHECK-NEXT: ret <2 x i64> %24
+
+define <16 x i64> @sdiv_binop_16xi64_exact(<16 x i64>, <16 x i64>) {
+ %3 = sdiv exact <16 x i64> %0, %1
+ ret <16 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @sdiv_binop_16xi64_exact(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %24 = sdiv exact <2 x i64> %7, %15
+; CHECK-NEXT: %25 = sdiv exact <2 x i64> %8, %16
+; CHECK-NEXT: %26 = sdiv exact <2 x i64> %9, %17
+; CHECK-NEXT: %27 = sdiv exact <2 x i64> %10, %18
+; CHECK-NEXT: %28 = sdiv exact <2 x i64> %11, %19
+; CHECK-NEXT: %29 = sdiv exact <2 x i64> %12, %20
+; CHECK-NEXT: %30 = sdiv exact <2 x i64> %13, %21
+; CHECK-NEXT: %31 = sdiv exact <2 x i64> %14, %22
+; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16
+; CHECK-NEXT: ret <2 x i64> %24
+
+define <16 x i64> @lshr_binop_16xi64(<16 x i64>, <16 x i64>) {
+ %3 = lshr <16 x i64> %0, %1
+ ret <16 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @lshr_binop_16xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %24 = lshr <2 x i64> %7, %15
+; CHECK-NEXT: %25 = lshr <2 x i64> %8, %16
+; CHECK-NEXT: %26 = lshr <2 x i64> %9, %17
+; CHECK-NEXT: %27 = lshr <2 x i64> %10, %18
+; CHECK-NEXT: %28 = lshr <2 x i64> %11, %19
+; CHECK-NEXT: %29 = lshr <2 x i64> %12, %20
+; CHECK-NEXT: %30 = lshr <2 x i64> %13, %21
+; CHECK-NEXT: %31 = lshr <2 x i64> %14, %22
+; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16
+; CHECK-NEXT: ret <2 x i64> %24
+
+define <16 x i64> @lshr_binop_16xi64_exact(<16 x i64>, <16 x i64>) {
+ %3 = lshr exact <16 x i64> %0, %1
+ ret <16 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @lshr_binop_16xi64_exact(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %24 = lshr exact <2 x i64> %7, %15
+; CHECK-NEXT: %25 = lshr exact <2 x i64> %8, %16
+; CHECK-NEXT: %26 = lshr exact <2 x i64> %9, %17
+; CHECK-NEXT: %27 = lshr exact <2 x i64> %10, %18
+; CHECK-NEXT: %28 = lshr exact <2 x i64> %11, %19
+; CHECK-NEXT: %29 = lshr exact <2 x i64> %12, %20
+; CHECK-NEXT: %30 = lshr exact <2 x i64> %13, %21
+; CHECK-NEXT: %31 = lshr exact <2 x i64> %14, %22
+; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16
+; CHECK-NEXT: ret <2 x i64> %24
+
+define <16 x i64> @ashr_binop_16xi64(<16 x i64>, <16 x i64>) {
+ %3 = ashr <16 x i64> %0, %1
+ ret <16 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @ashr_binop_16xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %24 = ashr <2 x i64> %7, %15
+; CHECK-NEXT: %25 = ashr <2 x i64> %8, %16
+; CHECK-NEXT: %26 = ashr <2 x i64> %9, %17
+; CHECK-NEXT: %27 = ashr <2 x i64> %10, %18
+; CHECK-NEXT: %28 = ashr <2 x i64> %11, %19
+; CHECK-NEXT: %29 = ashr <2 x i64> %12, %20
+; CHECK-NEXT: %30 = ashr <2 x i64> %13, %21
+; CHECK-NEXT: %31 = ashr <2 x i64> %14, %22
+; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16
+; CHECK-NEXT: ret <2 x i64> %24
+
+define <16 x i64> @ashr_binop_16xi64_exact(<16 x i64>, <16 x i64>) {
+ %3 = ashr exact <16 x i64> %0, %1
+ ret <16 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @ashr_binop_16xi64_exact(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %24 = ashr exact <2 x i64> %7, %15
+; CHECK-NEXT: %25 = ashr exact <2 x i64> %8, %16
+; CHECK-NEXT: %26 = ashr exact <2 x i64> %9, %17
+; CHECK-NEXT: %27 = ashr exact <2 x i64> %10, %18
+; CHECK-NEXT: %28 = ashr exact <2 x i64> %11, %19
+; CHECK-NEXT: %29 = ashr exact <2 x i64> %12, %20
+; CHECK-NEXT: %30 = ashr exact <2 x i64> %13, %21
+; CHECK-NEXT: %31 = ashr exact <2 x i64> %14, %22
+; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16
+; CHECK-NEXT: ret <2 x i64> %24
+
+define <16 x i64> @and_binop_16xi64(<16 x i64>, <16 x i64>) {
+ %3 = and <16 x i64> %0, %1
+ ret <16 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @and_binop_16xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %24 = and <2 x i64> %7, %15
+; CHECK-NEXT: %25 = and <2 x i64> %8, %16
+; CHECK-NEXT: %26 = and <2 x i64> %9, %17
+; CHECK-NEXT: %27 = and <2 x i64> %10, %18
+; CHECK-NEXT: %28 = and <2 x i64> %11, %19
+; CHECK-NEXT: %29 = and <2 x i64> %12, %20
+; CHECK-NEXT: %30 = and <2 x i64> %13, %21
+; CHECK-NEXT: %31 = and <2 x i64> %14, %22
+; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16
+; CHECK-NEXT: ret <2 x i64> %24
+
+define <16 x i64> @xor_binop_16xi64(<16 x i64>, <16 x i64>) {
+ %3 = xor <16 x i64> %0, %1
+ ret <16 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @xor_binop_16xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %24 = xor <2 x i64> %7, %15
+; CHECK-NEXT: %25 = xor <2 x i64> %8, %16
+; CHECK-NEXT: %26 = xor <2 x i64> %9, %17
+; CHECK-NEXT: %27 = xor <2 x i64> %10, %18
+; CHECK-NEXT: %28 = xor <2 x i64> %11, %19
+; CHECK-NEXT: %29 = xor <2 x i64> %12, %20
+; CHECK-NEXT: %30 = xor <2 x i64> %13, %21
+; CHECK-NEXT: %31 = xor <2 x i64> %14, %22
+; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16
+; CHECK-NEXT: ret <2 x i64> %24
+
+define <16 x i64> @or_binop_16xi64(<16 x i64>, <16 x i64>) {
+ %3 = or <16 x i64> %0, %1
+ ret <16 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @or_binop_16xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %24 = or <2 x i64> %7, %15
+; CHECK-NEXT: %25 = or <2 x i64> %8, %16
+; CHECK-NEXT: %26 = or <2 x i64> %9, %17
+; CHECK-NEXT: %27 = or <2 x i64> %10, %18
+; CHECK-NEXT: %28 = or <2 x i64> %11, %19
+; CHECK-NEXT: %29 = or <2 x i64> %12, %20
+; CHECK-NEXT: %30 = or <2 x i64> %13, %21
+; CHECK-NEXT: %31 = or <2 x i64> %14, %22
+; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16
+; CHECK-NEXT: ret <2 x i64> %24
+
+define <16 x i64> @urem_binop_16xi64(<16 x i64>, <16 x i64>) {
+ %3 = urem <16 x i64> %0, %1
+ ret <16 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @urem_binop_16xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %24 = urem <2 x i64> %7, %15
+; CHECK-NEXT: %25 = urem <2 x i64> %8, %16
+; CHECK-NEXT: %26 = urem <2 x i64> %9, %17
+; CHECK-NEXT: %27 = urem <2 x i64> %10, %18
+; CHECK-NEXT: %28 = urem <2 x i64> %11, %19
+; CHECK-NEXT: %29 = urem <2 x i64> %12, %20
+; CHECK-NEXT: %30 = urem <2 x i64> %13, %21
+; CHECK-NEXT: %31 = urem <2 x i64> %14, %22
+; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16
+; CHECK-NEXT: ret <2 x i64> %24
+
+define <16 x i64> @srem_binop_16xi64(<16 x i64>, <16 x i64>) {
+ %3 = srem <16 x i64> %0, %1
+ ret <16 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @srem_binop_16xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %24 = srem <2 x i64> %7, %15
+; CHECK-NEXT: %25 = srem <2 x i64> %8, %16
+; CHECK-NEXT: %26 = srem <2 x i64> %9, %17
+; CHECK-NEXT: %27 = srem <2 x i64> %10, %18
+; CHECK-NEXT: %28 = srem <2 x i64> %11, %19
+; CHECK-NEXT: %29 = srem <2 x i64> %12, %20
+; CHECK-NEXT: %30 = srem <2 x i64> %13, %21
+; CHECK-NEXT: %31 = srem <2 x i64> %14, %22
+; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16
+; CHECK-NEXT: ret <2 x i64> %24
+
+define <20 x i8> @add_binop_20xi8_nuw(<20 x i8>, <20 x i8>) {
+ %3 = add nuw <20 x i8> %0, %1
+ ret <20 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @add_binop_20xi8_nuw(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)
+; CHECK-NEXT: %6 = add nuw <16 x i8> %1, %3
+; CHECK-NEXT: %7 = add nuw <16 x i8> %2, %4
+; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16
+; CHECK-NEXT: ret <16 x i8> %6
+
+define <20 x i8> @add_binop_20xi8_nsw(<20 x i8>, <20 x i8>) {
+ %3 = add nsw <20 x i8> %0, %1
+ ret <20 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @add_binop_20xi8_nsw(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)
+; CHECK-NEXT: %6 = add nsw <16 x i8> %1, %3
+; CHECK-NEXT: %7 = add nsw <16 x i8> %2, %4
+; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16
+; CHECK-NEXT: ret <16 x i8> %6
+
+define <20 x i8> @add_binop_20xi8_nuw_nsw(<20 x i8>, <20 x i8>) {
+ %3 = add nuw nsw <20 x i8> %0, %1
+ ret <20 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @add_binop_20xi8_nuw_nsw(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)
+; CHECK-NEXT: %6 = add nuw nsw <16 x i8> %1, %3
+; CHECK-NEXT: %7 = add nuw nsw <16 x i8> %2, %4
+; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16
+; CHECK-NEXT: ret <16 x i8> %6
+
+define <20 x i8> @sub_binop_20xi8_nuw(<20 x i8>, <20 x i8>) {
+ %3 = sub nuw <20 x i8> %0, %1
+ ret <20 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @sub_binop_20xi8_nuw(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)
+; CHECK-NEXT: %6 = sub nuw <16 x i8> %1, %3
+; CHECK-NEXT: %7 = sub nuw <16 x i8> %2, %4
+; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16
+; CHECK-NEXT: ret <16 x i8> %6
+
+define <20 x i8> @sub_binop_20xi8_nsw(<20 x i8>, <20 x i8>) {
+ %3 = sub nsw <20 x i8> %0, %1
+ ret <20 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @sub_binop_20xi8_nsw(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)
+; CHECK-NEXT: %6 = sub nsw <16 x i8> %1, %3
+; CHECK-NEXT: %7 = sub nsw <16 x i8> %2, %4
+; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16
+; CHECK-NEXT: ret <16 x i8> %6
+
+define <20 x i8> @sub_binop_20xi8_nuw_nsw(<20 x i8>, <20 x i8>) {
+ %3 = sub nuw nsw <20 x i8> %0, %1
+ ret <20 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @sub_binop_20xi8_nuw_nsw(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)
+; CHECK-NEXT: %6 = sub nuw nsw <16 x i8> %1, %3
+; CHECK-NEXT: %7 = sub nuw nsw <16 x i8> %2, %4
+; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16
+; CHECK-NEXT: ret <16 x i8> %6
+
+define <20 x i8> @mul_binop_20xi8_nuw(<20 x i8>, <20 x i8>) {
+ %3 = mul nuw <20 x i8> %0, %1
+ ret <20 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @mul_binop_20xi8_nuw(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)
+; CHECK-NEXT: %6 = mul nuw <16 x i8> %1, %3
+; CHECK-NEXT: %7 = mul nuw <16 x i8> %2, %4
+; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16
+; CHECK-NEXT: ret <16 x i8> %6
+
+define <20 x i8> @mul_binop_20xi8_nsw(<20 x i8>, <20 x i8>) {
+ %3 = mul nsw <20 x i8> %0, %1
+ ret <20 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @mul_binop_20xi8_nsw(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)
+; CHECK-NEXT: %6 = mul nsw <16 x i8> %1, %3
+; CHECK-NEXT: %7 = mul nsw <16 x i8> %2, %4
+; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16
+; CHECK-NEXT: ret <16 x i8> %6
+
+define <20 x i8> @mul_binop_20xi8_nuw_nsw(<20 x i8>, <20 x i8>) {
+ %3 = mul nuw nsw <20 x i8> %0, %1
+ ret <20 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @mul_binop_20xi8_nuw_nsw(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)
+; CHECK-NEXT: %6 = mul nuw nsw <16 x i8> %1, %3
+; CHECK-NEXT: %7 = mul nuw nsw <16 x i8> %2, %4
+; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16
+; CHECK-NEXT: ret <16 x i8> %6
+
+define <20 x i8> @shl_binop_20xi8_nuw(<20 x i8>, <20 x i8>) {
+ %3 = shl nuw <20 x i8> %0, %1
+ ret <20 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @shl_binop_20xi8_nuw(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)
+; CHECK-NEXT: %6 = shl nuw <16 x i8> %1, %3
+; CHECK-NEXT: %7 = shl nuw <16 x i8> %2, %4
+; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16
+; CHECK-NEXT: ret <16 x i8> %6
+
+define <20 x i8> @shl_binop_20xi8_nsw(<20 x i8>, <20 x i8>) {
+ %3 = shl nsw <20 x i8> %0, %1
+ ret <20 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @shl_binop_20xi8_nsw(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)
+; CHECK-NEXT: %6 = shl nsw <16 x i8> %1, %3
+; CHECK-NEXT: %7 = shl nsw <16 x i8> %2, %4
+; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16
+; CHECK-NEXT: ret <16 x i8> %6
+
+define <20 x i8> @shl_binop_20xi8_nuw_nsw(<20 x i8>, <20 x i8>) {
+ %3 = shl nuw nsw <20 x i8> %0, %1
+ ret <20 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @shl_binop_20xi8_nuw_nsw(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)
+; CHECK-NEXT: %6 = shl nuw nsw <16 x i8> %1, %3
+; CHECK-NEXT: %7 = shl nuw nsw <16 x i8> %2, %4
+; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16
+; CHECK-NEXT: ret <16 x i8> %6
+
+define <20 x i8> @udiv_binop_20xi8(<20 x i8>, <20 x i8>) {
+ %3 = udiv <20 x i8> %0, %1
+ ret <20 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @udiv_binop_20xi8(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)
+; CHECK-NEXT: %6 = udiv <16 x i8> %1, %3
+; CHECK-NEXT: %7 = udiv <16 x i8> %2, %4
+; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16
+; CHECK-NEXT: ret <16 x i8> %6
+
+define <20 x i8> @udiv_binop_20xi8_exact(<20 x i8>, <20 x i8>) {
+ %3 = udiv exact <20 x i8> %0, %1
+ ret <20 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @udiv_binop_20xi8_exact(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)
+; CHECK-NEXT: %6 = udiv exact <16 x i8> %1, %3
+; CHECK-NEXT: %7 = udiv exact <16 x i8> %2, %4
+; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16
+; CHECK-NEXT: ret <16 x i8> %6
+
+define <20 x i8> @sdiv_binop_20xi8(<20 x i8>, <20 x i8>) {
+ %3 = sdiv <20 x i8> %0, %1
+ ret <20 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @sdiv_binop_20xi8(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)
+; CHECK-NEXT: %6 = sdiv <16 x i8> %1, %3
+; CHECK-NEXT: %7 = sdiv <16 x i8> %2, %4
+; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16
+; CHECK-NEXT: ret <16 x i8> %6
+
+define <20 x i8> @sdiv_binop_20xi8_exact(<20 x i8>, <20 x i8>) {
+ %3 = sdiv exact <20 x i8> %0, %1
+ ret <20 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @sdiv_binop_20xi8_exact(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)
+; CHECK-NEXT: %6 = sdiv exact <16 x i8> %1, %3
+; CHECK-NEXT: %7 = sdiv exact <16 x i8> %2, %4
+; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16
+; CHECK-NEXT: ret <16 x i8> %6
+
+define <20 x i8> @lshr_binop_20xi8(<20 x i8>, <20 x i8>) {
+ %3 = lshr <20 x i8> %0, %1
+ ret <20 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @lshr_binop_20xi8(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)
+; CHECK-NEXT: %6 = lshr <16 x i8> %1, %3
+; CHECK-NEXT: %7 = lshr <16 x i8> %2, %4
+; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16
+; CHECK-NEXT: ret <16 x i8> %6
+
+define <20 x i8> @lshr_binop_20xi8_exact(<20 x i8>, <20 x i8>) {
+ %3 = lshr exact <20 x i8> %0, %1
+ ret <20 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @lshr_binop_20xi8_exact(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)
+; CHECK-NEXT: %6 = lshr exact <16 x i8> %1, %3
+; CHECK-NEXT: %7 = lshr exact <16 x i8> %2, %4
+; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16
+; CHECK-NEXT: ret <16 x i8> %6
+
+define <20 x i8> @ashr_binop_20xi8(<20 x i8>, <20 x i8>) {
+ %3 = ashr <20 x i8> %0, %1
+ ret <20 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @ashr_binop_20xi8(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)
+; CHECK-NEXT: %6 = ashr <16 x i8> %1, %3
+; CHECK-NEXT: %7 = ashr <16 x i8> %2, %4
+; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16
+; CHECK-NEXT: ret <16 x i8> %6
+
+define <20 x i8> @ashr_binop_20xi8_exact(<20 x i8>, <20 x i8>) {
+ %3 = ashr exact <20 x i8> %0, %1
+ ret <20 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @ashr_binop_20xi8_exact(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)
+; CHECK-NEXT: %6 = ashr exact <16 x i8> %1, %3
+; CHECK-NEXT: %7 = ashr exact <16 x i8> %2, %4
+; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16
+; CHECK-NEXT: ret <16 x i8> %6
+
+define <20 x i8> @and_binop_20xi8(<20 x i8>, <20 x i8>) {
+ %3 = and <20 x i8> %0, %1
+ ret <20 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @and_binop_20xi8(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)
+; CHECK-NEXT: %6 = and <16 x i8> %1, %3
+; CHECK-NEXT: %7 = and <16 x i8> %2, %4
+; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16
+; CHECK-NEXT: ret <16 x i8> %6
+
+define <20 x i8> @xor_binop_20xi8(<20 x i8>, <20 x i8>) {
+ %3 = xor <20 x i8> %0, %1
+ ret <20 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @xor_binop_20xi8(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)
+; CHECK-NEXT: %6 = xor <16 x i8> %1, %3
+; CHECK-NEXT: %7 = xor <16 x i8> %2, %4
+; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16
+; CHECK-NEXT: ret <16 x i8> %6
+
+define <20 x i8> @or_binop_20xi8(<20 x i8>, <20 x i8>) {
+ %3 = or <20 x i8> %0, %1
+ ret <20 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @or_binop_20xi8(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)
+; CHECK-NEXT: %6 = or <16 x i8> %1, %3
+; CHECK-NEXT: %7 = or <16 x i8> %2, %4
+; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16
+; CHECK-NEXT: ret <16 x i8> %6
+
+define <20 x i8> @urem_binop_20xi8(<20 x i8>, <20 x i8>) {
+ %3 = urem <20 x i8> %0, %1
+ ret <20 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @urem_binop_20xi8(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)
+; CHECK-NEXT: %6 = urem <16 x i8> %1, %3
+; CHECK-NEXT: %7 = urem <16 x i8> %2, %4
+; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16
+; CHECK-NEXT: ret <16 x i8> %6
+
+define <20 x i8> @srem_binop_20xi8(<20 x i8>, <20 x i8>) {
+ %3 = srem <20 x i8> %0, %1
+ ret <20 x i8> %3
+}
+; CHECK-LABEL: define <16 x i8> @srem_binop_20xi8(<16 x i8>* nocapture nonnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)
+; CHECK-NEXT: %6 = srem <16 x i8> %1, %3
+; CHECK-NEXT: %7 = srem <16 x i8> %2, %4
+; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16
+; CHECK-NEXT: ret <16 x i8> %6
+
+define <20 x i16> @add_binop_20xi16_nuw(<20 x i16>, <20 x i16>) {
+ %3 = add nuw <20 x i16> %0, %1
+ ret <20 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @add_binop_20xi16_nuw(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %9 = add nuw <8 x i16> %2, %5
+; CHECK-NEXT: %10 = add nuw <8 x i16> %3, %6
+; CHECK-NEXT: %11 = add nuw <8 x i16> %4, %7
+; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16
+; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16
+; CHECK-NEXT: ret <8 x i16> %9
+
+define <20 x i16> @add_binop_20xi16_nsw(<20 x i16>, <20 x i16>) {
+ %3 = add nsw <20 x i16> %0, %1
+ ret <20 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @add_binop_20xi16_nsw(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %9 = add nsw <8 x i16> %2, %5
+; CHECK-NEXT: %10 = add nsw <8 x i16> %3, %6
+; CHECK-NEXT: %11 = add nsw <8 x i16> %4, %7
+; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16
+; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16
+; CHECK-NEXT: ret <8 x i16> %9
+
+define <20 x i16> @add_binop_20xi16_nuw_nsw(<20 x i16>, <20 x i16>) {
+ %3 = add nuw nsw <20 x i16> %0, %1
+ ret <20 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @add_binop_20xi16_nuw_nsw(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %9 = add nuw nsw <8 x i16> %2, %5
+; CHECK-NEXT: %10 = add nuw nsw <8 x i16> %3, %6
+; CHECK-NEXT: %11 = add nuw nsw <8 x i16> %4, %7
+; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16
+; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16
+; CHECK-NEXT: ret <8 x i16> %9
+
+define <20 x i16> @sub_binop_20xi16_nuw(<20 x i16>, <20 x i16>) {
+ %3 = sub nuw <20 x i16> %0, %1
+ ret <20 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @sub_binop_20xi16_nuw(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %9 = sub nuw <8 x i16> %2, %5
+; CHECK-NEXT: %10 = sub nuw <8 x i16> %3, %6
+; CHECK-NEXT: %11 = sub nuw <8 x i16> %4, %7
+; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16
+; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16
+; CHECK-NEXT: ret <8 x i16> %9
+
+define <20 x i16> @sub_binop_20xi16_nsw(<20 x i16>, <20 x i16>) {
+ %3 = sub nsw <20 x i16> %0, %1
+ ret <20 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @sub_binop_20xi16_nsw(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %9 = sub nsw <8 x i16> %2, %5
+; CHECK-NEXT: %10 = sub nsw <8 x i16> %3, %6
+; CHECK-NEXT: %11 = sub nsw <8 x i16> %4, %7
+; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16
+; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16
+; CHECK-NEXT: ret <8 x i16> %9
+
+define <20 x i16> @sub_binop_20xi16_nuw_nsw(<20 x i16>, <20 x i16>) {
+ %3 = sub nuw nsw <20 x i16> %0, %1
+ ret <20 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @sub_binop_20xi16_nuw_nsw(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %9 = sub nuw nsw <8 x i16> %2, %5
+; CHECK-NEXT: %10 = sub nuw nsw <8 x i16> %3, %6
+; CHECK-NEXT: %11 = sub nuw nsw <8 x i16> %4, %7
+; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16
+; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16
+; CHECK-NEXT: ret <8 x i16> %9
+
+define <20 x i16> @mul_binop_20xi16_nuw(<20 x i16>, <20 x i16>) {
+ %3 = mul nuw <20 x i16> %0, %1
+ ret <20 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @mul_binop_20xi16_nuw(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %9 = mul nuw <8 x i16> %2, %5
+; CHECK-NEXT: %10 = mul nuw <8 x i16> %3, %6
+; CHECK-NEXT: %11 = mul nuw <8 x i16> %4, %7
+; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16
+; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16
+; CHECK-NEXT: ret <8 x i16> %9
+
+define <20 x i16> @mul_binop_20xi16_nsw(<20 x i16>, <20 x i16>) {
+ %3 = mul nsw <20 x i16> %0, %1
+ ret <20 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @mul_binop_20xi16_nsw(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %9 = mul nsw <8 x i16> %2, %5
+; CHECK-NEXT: %10 = mul nsw <8 x i16> %3, %6
+; CHECK-NEXT: %11 = mul nsw <8 x i16> %4, %7
+; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16
+; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16
+; CHECK-NEXT: ret <8 x i16> %9
+
+define <20 x i16> @mul_binop_20xi16_nuw_nsw(<20 x i16>, <20 x i16>) {
+ %3 = mul nuw nsw <20 x i16> %0, %1
+ ret <20 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @mul_binop_20xi16_nuw_nsw(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %9 = mul nuw nsw <8 x i16> %2, %5
+; CHECK-NEXT: %10 = mul nuw nsw <8 x i16> %3, %6
+; CHECK-NEXT: %11 = mul nuw nsw <8 x i16> %4, %7
+; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16
+; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16
+; CHECK-NEXT: ret <8 x i16> %9
+
+define <20 x i16> @shl_binop_20xi16_nuw(<20 x i16>, <20 x i16>) {
+ %3 = shl nuw <20 x i16> %0, %1
+ ret <20 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @shl_binop_20xi16_nuw(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %9 = shl nuw <8 x i16> %2, %5
+; CHECK-NEXT: %10 = shl nuw <8 x i16> %3, %6
+; CHECK-NEXT: %11 = shl nuw <8 x i16> %4, %7
+; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16
+; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16
+; CHECK-NEXT: ret <8 x i16> %9
+
+define <20 x i16> @shl_binop_20xi16_nsw(<20 x i16>, <20 x i16>) {
+ %3 = shl nsw <20 x i16> %0, %1
+ ret <20 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @shl_binop_20xi16_nsw(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %9 = shl nsw <8 x i16> %2, %5
+; CHECK-NEXT: %10 = shl nsw <8 x i16> %3, %6
+; CHECK-NEXT: %11 = shl nsw <8 x i16> %4, %7
+; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16
+; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16
+; CHECK-NEXT: ret <8 x i16> %9
+
+define <20 x i16> @shl_binop_20xi16_nuw_nsw(<20 x i16>, <20 x i16>) {
+ %3 = shl nuw nsw <20 x i16> %0, %1
+ ret <20 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @shl_binop_20xi16_nuw_nsw(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %9 = shl nuw nsw <8 x i16> %2, %5
+; CHECK-NEXT: %10 = shl nuw nsw <8 x i16> %3, %6
+; CHECK-NEXT: %11 = shl nuw nsw <8 x i16> %4, %7
+; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16
+; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16
+; CHECK-NEXT: ret <8 x i16> %9
+
+define <20 x i16> @udiv_binop_20xi16(<20 x i16>, <20 x i16>) {
+ %3 = udiv <20 x i16> %0, %1
+ ret <20 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @udiv_binop_20xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %9 = udiv <8 x i16> %2, %5
+; CHECK-NEXT: %10 = udiv <8 x i16> %3, %6
+; CHECK-NEXT: %11 = udiv <8 x i16> %4, %7
+; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16
+; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16
+; CHECK-NEXT: ret <8 x i16> %9
+
+define <20 x i16> @udiv_binop_20xi16_exact(<20 x i16>, <20 x i16>) {
+ %3 = udiv exact <20 x i16> %0, %1
+ ret <20 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @udiv_binop_20xi16_exact(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %9 = udiv exact <8 x i16> %2, %5
+; CHECK-NEXT: %10 = udiv exact <8 x i16> %3, %6
+; CHECK-NEXT: %11 = udiv exact <8 x i16> %4, %7
+; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16
+; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16
+; CHECK-NEXT: ret <8 x i16> %9
+
+define <20 x i16> @sdiv_binop_20xi16(<20 x i16>, <20 x i16>) {
+ %3 = sdiv <20 x i16> %0, %1
+ ret <20 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @sdiv_binop_20xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %9 = sdiv <8 x i16> %2, %5
+; CHECK-NEXT: %10 = sdiv <8 x i16> %3, %6
+; CHECK-NEXT: %11 = sdiv <8 x i16> %4, %7
+; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16
+; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16
+; CHECK-NEXT: ret <8 x i16> %9
+
+define <20 x i16> @sdiv_binop_20xi16_exact(<20 x i16>, <20 x i16>) {
+ %3 = sdiv exact <20 x i16> %0, %1
+ ret <20 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @sdiv_binop_20xi16_exact(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %9 = sdiv exact <8 x i16> %2, %5
+; CHECK-NEXT: %10 = sdiv exact <8 x i16> %3, %6
+; CHECK-NEXT: %11 = sdiv exact <8 x i16> %4, %7
+; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16
+; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16
+; CHECK-NEXT: ret <8 x i16> %9
+
+define <20 x i16> @lshr_binop_20xi16(<20 x i16>, <20 x i16>) {
+ %3 = lshr <20 x i16> %0, %1
+ ret <20 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @lshr_binop_20xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %9 = lshr <8 x i16> %2, %5
+; CHECK-NEXT: %10 = lshr <8 x i16> %3, %6
+; CHECK-NEXT: %11 = lshr <8 x i16> %4, %7
+; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16
+; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16
+; CHECK-NEXT: ret <8 x i16> %9
+
+define <20 x i16> @lshr_binop_20xi16_exact(<20 x i16>, <20 x i16>) {
+ %3 = lshr exact <20 x i16> %0, %1
+ ret <20 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @lshr_binop_20xi16_exact(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %9 = lshr exact <8 x i16> %2, %5
+; CHECK-NEXT: %10 = lshr exact <8 x i16> %3, %6
+; CHECK-NEXT: %11 = lshr exact <8 x i16> %4, %7
+; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16
+; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16
+; CHECK-NEXT: ret <8 x i16> %9
+
+define <20 x i16> @ashr_binop_20xi16(<20 x i16>, <20 x i16>) {
+ %3 = ashr <20 x i16> %0, %1
+ ret <20 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @ashr_binop_20xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %9 = ashr <8 x i16> %2, %5
+; CHECK-NEXT: %10 = ashr <8 x i16> %3, %6
+; CHECK-NEXT: %11 = ashr <8 x i16> %4, %7
+; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16
+; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16
+; CHECK-NEXT: ret <8 x i16> %9
+
+define <20 x i16> @ashr_binop_20xi16_exact(<20 x i16>, <20 x i16>) {
+ %3 = ashr exact <20 x i16> %0, %1
+ ret <20 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @ashr_binop_20xi16_exact(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %9 = ashr exact <8 x i16> %2, %5
+; CHECK-NEXT: %10 = ashr exact <8 x i16> %3, %6
+; CHECK-NEXT: %11 = ashr exact <8 x i16> %4, %7
+; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16
+; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16
+; CHECK-NEXT: ret <8 x i16> %9
+
+define <20 x i16> @and_binop_20xi16(<20 x i16>, <20 x i16>) {
+ %3 = and <20 x i16> %0, %1
+ ret <20 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @and_binop_20xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %9 = and <8 x i16> %2, %5
+; CHECK-NEXT: %10 = and <8 x i16> %3, %6
+; CHECK-NEXT: %11 = and <8 x i16> %4, %7
+; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16
+; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16
+; CHECK-NEXT: ret <8 x i16> %9
+
+define <20 x i16> @xor_binop_20xi16(<20 x i16>, <20 x i16>) {
+ %3 = xor <20 x i16> %0, %1
+ ret <20 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @xor_binop_20xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %9 = xor <8 x i16> %2, %5
+; CHECK-NEXT: %10 = xor <8 x i16> %3, %6
+; CHECK-NEXT: %11 = xor <8 x i16> %4, %7
+; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16
+; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16
+; CHECK-NEXT: ret <8 x i16> %9
+
+define <20 x i16> @or_binop_20xi16(<20 x i16>, <20 x i16>) {
+ %3 = or <20 x i16> %0, %1
+ ret <20 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @or_binop_20xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %9 = or <8 x i16> %2, %5
+; CHECK-NEXT: %10 = or <8 x i16> %3, %6
+; CHECK-NEXT: %11 = or <8 x i16> %4, %7
+; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16
+; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16
+; CHECK-NEXT: ret <8 x i16> %9
+
+define <20 x i16> @urem_binop_20xi16(<20 x i16>, <20 x i16>) {
+ %3 = urem <20 x i16> %0, %1
+ ret <20 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @urem_binop_20xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %9 = urem <8 x i16> %2, %5
+; CHECK-NEXT: %10 = urem <8 x i16> %3, %6
+; CHECK-NEXT: %11 = urem <8 x i16> %4, %7
+; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16
+; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16
+; CHECK-NEXT: ret <8 x i16> %9
+
+define <20 x i16> @srem_binop_20xi16(<20 x i16>, <20 x i16>) {
+ %3 = srem <20 x i16> %0, %1
+ ret <20 x i16> %3
+}
+; CHECK-LABEL: define <8 x i16> @srem_binop_20xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)
+; CHECK-NEXT: %9 = srem <8 x i16> %2, %5
+; CHECK-NEXT: %10 = srem <8 x i16> %3, %6
+; CHECK-NEXT: %11 = srem <8 x i16> %4, %7
+; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16
+; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16
+; CHECK-NEXT: ret <8 x i16> %9
+
+define <20 x i32> @add_binop_20xi32_nuw(<20 x i32>, <20 x i32>) {
+ %3 = add nuw <20 x i32> %0, %1
+ ret <20 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @add_binop_20xi32_nuw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %15 = add nuw <4 x i32> %4, %9
+; CHECK-NEXT: %16 = add nuw <4 x i32> %5, %10
+; CHECK-NEXT: %17 = add nuw <4 x i32> %6, %11
+; CHECK-NEXT: %18 = add nuw <4 x i32> %7, %12
+; CHECK-NEXT: %19 = add nuw <4 x i32> %8, %13
+; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16
+; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16
+; CHECK-NEXT: ret <4 x i32> %15
+
+define <20 x i32> @add_binop_20xi32_nsw(<20 x i32>, <20 x i32>) {
+ %3 = add nsw <20 x i32> %0, %1
+ ret <20 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @add_binop_20xi32_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %15 = add nsw <4 x i32> %4, %9
+; CHECK-NEXT: %16 = add nsw <4 x i32> %5, %10
+; CHECK-NEXT: %17 = add nsw <4 x i32> %6, %11
+; CHECK-NEXT: %18 = add nsw <4 x i32> %7, %12
+; CHECK-NEXT: %19 = add nsw <4 x i32> %8, %13
+; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16
+; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16
+; CHECK-NEXT: ret <4 x i32> %15
+
+define <20 x i32> @add_binop_20xi32_nuw_nsw(<20 x i32>, <20 x i32>) {
+ %3 = add nuw nsw <20 x i32> %0, %1
+ ret <20 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @add_binop_20xi32_nuw_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %15 = add nuw nsw <4 x i32> %4, %9
+; CHECK-NEXT: %16 = add nuw nsw <4 x i32> %5, %10
+; CHECK-NEXT: %17 = add nuw nsw <4 x i32> %6, %11
+; CHECK-NEXT: %18 = add nuw nsw <4 x i32> %7, %12
+; CHECK-NEXT: %19 = add nuw nsw <4 x i32> %8, %13
+; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16
+; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16
+; CHECK-NEXT: ret <4 x i32> %15
+
+define <20 x i32> @sub_binop_20xi32_nuw(<20 x i32>, <20 x i32>) {
+ %3 = sub nuw <20 x i32> %0, %1
+ ret <20 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @sub_binop_20xi32_nuw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %15 = sub nuw <4 x i32> %4, %9
+; CHECK-NEXT: %16 = sub nuw <4 x i32> %5, %10
+; CHECK-NEXT: %17 = sub nuw <4 x i32> %6, %11
+; CHECK-NEXT: %18 = sub nuw <4 x i32> %7, %12
+; CHECK-NEXT: %19 = sub nuw <4 x i32> %8, %13
+; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16
+; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16
+; CHECK-NEXT: ret <4 x i32> %15
+
+define <20 x i32> @sub_binop_20xi32_nsw(<20 x i32>, <20 x i32>) {
+ %3 = sub nsw <20 x i32> %0, %1
+ ret <20 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @sub_binop_20xi32_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %15 = sub nsw <4 x i32> %4, %9
+; CHECK-NEXT: %16 = sub nsw <4 x i32> %5, %10
+; CHECK-NEXT: %17 = sub nsw <4 x i32> %6, %11
+; CHECK-NEXT: %18 = sub nsw <4 x i32> %7, %12
+; CHECK-NEXT: %19 = sub nsw <4 x i32> %8, %13
+; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16
+; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16
+; CHECK-NEXT: ret <4 x i32> %15
+
+define <20 x i32> @sub_binop_20xi32_nuw_nsw(<20 x i32>, <20 x i32>) {
+ %3 = sub nuw nsw <20 x i32> %0, %1
+ ret <20 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @sub_binop_20xi32_nuw_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %15 = sub nuw nsw <4 x i32> %4, %9
+; CHECK-NEXT: %16 = sub nuw nsw <4 x i32> %5, %10
+; CHECK-NEXT: %17 = sub nuw nsw <4 x i32> %6, %11
+; CHECK-NEXT: %18 = sub nuw nsw <4 x i32> %7, %12
+; CHECK-NEXT: %19 = sub nuw nsw <4 x i32> %8, %13
+; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16
+; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16
+; CHECK-NEXT: ret <4 x i32> %15
+
+define <20 x i32> @mul_binop_20xi32_nuw(<20 x i32>, <20 x i32>) {
+ %3 = mul nuw <20 x i32> %0, %1
+ ret <20 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @mul_binop_20xi32_nuw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %15 = mul nuw <4 x i32> %4, %9
+; CHECK-NEXT: %16 = mul nuw <4 x i32> %5, %10
+; CHECK-NEXT: %17 = mul nuw <4 x i32> %6, %11
+; CHECK-NEXT: %18 = mul nuw <4 x i32> %7, %12
+; CHECK-NEXT: %19 = mul nuw <4 x i32> %8, %13
+; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16
+; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16
+; CHECK-NEXT: ret <4 x i32> %15
+
+define <20 x i32> @mul_binop_20xi32_nsw(<20 x i32>, <20 x i32>) {
+ %3 = mul nsw <20 x i32> %0, %1
+ ret <20 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @mul_binop_20xi32_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %15 = mul nsw <4 x i32> %4, %9
+; CHECK-NEXT: %16 = mul nsw <4 x i32> %5, %10
+; CHECK-NEXT: %17 = mul nsw <4 x i32> %6, %11
+; CHECK-NEXT: %18 = mul nsw <4 x i32> %7, %12
+; CHECK-NEXT: %19 = mul nsw <4 x i32> %8, %13
+; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16
+; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16
+; CHECK-NEXT: ret <4 x i32> %15
+
+define <20 x i32> @mul_binop_20xi32_nuw_nsw(<20 x i32>, <20 x i32>) {
+ %3 = mul nuw nsw <20 x i32> %0, %1
+ ret <20 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @mul_binop_20xi32_nuw_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %15 = mul nuw nsw <4 x i32> %4, %9
+; CHECK-NEXT: %16 = mul nuw nsw <4 x i32> %5, %10
+; CHECK-NEXT: %17 = mul nuw nsw <4 x i32> %6, %11
+; CHECK-NEXT: %18 = mul nuw nsw <4 x i32> %7, %12
+; CHECK-NEXT: %19 = mul nuw nsw <4 x i32> %8, %13
+; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16
+; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16
+; CHECK-NEXT: ret <4 x i32> %15
+
+define <20 x i32> @shl_binop_20xi32_nuw(<20 x i32>, <20 x i32>) {
+ %3 = shl nuw <20 x i32> %0, %1
+ ret <20 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @shl_binop_20xi32_nuw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %15 = shl nuw <4 x i32> %4, %9
+; CHECK-NEXT: %16 = shl nuw <4 x i32> %5, %10
+; CHECK-NEXT: %17 = shl nuw <4 x i32> %6, %11
+; CHECK-NEXT: %18 = shl nuw <4 x i32> %7, %12
+; CHECK-NEXT: %19 = shl nuw <4 x i32> %8, %13
+; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16
+; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16
+; CHECK-NEXT: ret <4 x i32> %15
+
+define <20 x i32> @shl_binop_20xi32_nsw(<20 x i32>, <20 x i32>) {
+ %3 = shl nsw <20 x i32> %0, %1
+ ret <20 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @shl_binop_20xi32_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %15 = shl nsw <4 x i32> %4, %9
+; CHECK-NEXT: %16 = shl nsw <4 x i32> %5, %10
+; CHECK-NEXT: %17 = shl nsw <4 x i32> %6, %11
+; CHECK-NEXT: %18 = shl nsw <4 x i32> %7, %12
+; CHECK-NEXT: %19 = shl nsw <4 x i32> %8, %13
+; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16
+; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16
+; CHECK-NEXT: ret <4 x i32> %15
+
+define <20 x i32> @shl_binop_20xi32_nuw_nsw(<20 x i32>, <20 x i32>) {
+ %3 = shl nuw nsw <20 x i32> %0, %1
+ ret <20 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @shl_binop_20xi32_nuw_nsw(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %15 = shl nuw nsw <4 x i32> %4, %9
+; CHECK-NEXT: %16 = shl nuw nsw <4 x i32> %5, %10
+; CHECK-NEXT: %17 = shl nuw nsw <4 x i32> %6, %11
+; CHECK-NEXT: %18 = shl nuw nsw <4 x i32> %7, %12
+; CHECK-NEXT: %19 = shl nuw nsw <4 x i32> %8, %13
+; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16
+; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16
+; CHECK-NEXT: ret <4 x i32> %15
+
+define <20 x i32> @udiv_binop_20xi32(<20 x i32>, <20 x i32>) {
+ %3 = udiv <20 x i32> %0, %1
+ ret <20 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @udiv_binop_20xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %15 = udiv <4 x i32> %4, %9
+; CHECK-NEXT: %16 = udiv <4 x i32> %5, %10
+; CHECK-NEXT: %17 = udiv <4 x i32> %6, %11
+; CHECK-NEXT: %18 = udiv <4 x i32> %7, %12
+; CHECK-NEXT: %19 = udiv <4 x i32> %8, %13
+; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16
+; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16
+; CHECK-NEXT: ret <4 x i32> %15
+
+define <20 x i32> @udiv_binop_20xi32_exact(<20 x i32>, <20 x i32>) {
+ %3 = udiv exact <20 x i32> %0, %1
+ ret <20 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @udiv_binop_20xi32_exact(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %15 = udiv exact <4 x i32> %4, %9
+; CHECK-NEXT: %16 = udiv exact <4 x i32> %5, %10
+; CHECK-NEXT: %17 = udiv exact <4 x i32> %6, %11
+; CHECK-NEXT: %18 = udiv exact <4 x i32> %7, %12
+; CHECK-NEXT: %19 = udiv exact <4 x i32> %8, %13
+; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16
+; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16
+; CHECK-NEXT: ret <4 x i32> %15
+
+define <20 x i32> @sdiv_binop_20xi32(<20 x i32>, <20 x i32>) {
+ %3 = sdiv <20 x i32> %0, %1
+ ret <20 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @sdiv_binop_20xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %15 = sdiv <4 x i32> %4, %9
+; CHECK-NEXT: %16 = sdiv <4 x i32> %5, %10
+; CHECK-NEXT: %17 = sdiv <4 x i32> %6, %11
+; CHECK-NEXT: %18 = sdiv <4 x i32> %7, %12
+; CHECK-NEXT: %19 = sdiv <4 x i32> %8, %13
+; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16
+; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16
+; CHECK-NEXT: ret <4 x i32> %15
+
+define <20 x i32> @sdiv_binop_20xi32_exact(<20 x i32>, <20 x i32>) {
+ %3 = sdiv exact <20 x i32> %0, %1
+ ret <20 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @sdiv_binop_20xi32_exact(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %15 = sdiv exact <4 x i32> %4, %9
+; CHECK-NEXT: %16 = sdiv exact <4 x i32> %5, %10
+; CHECK-NEXT: %17 = sdiv exact <4 x i32> %6, %11
+; CHECK-NEXT: %18 = sdiv exact <4 x i32> %7, %12
+; CHECK-NEXT: %19 = sdiv exact <4 x i32> %8, %13
+; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16
+; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16
+; CHECK-NEXT: ret <4 x i32> %15
+
+define <20 x i32> @lshr_binop_20xi32(<20 x i32>, <20 x i32>) {
+ %3 = lshr <20 x i32> %0, %1
+ ret <20 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @lshr_binop_20xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %15 = lshr <4 x i32> %4, %9
+; CHECK-NEXT: %16 = lshr <4 x i32> %5, %10
+; CHECK-NEXT: %17 = lshr <4 x i32> %6, %11
+; CHECK-NEXT: %18 = lshr <4 x i32> %7, %12
+; CHECK-NEXT: %19 = lshr <4 x i32> %8, %13
+; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16
+; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16
+; CHECK-NEXT: ret <4 x i32> %15
+
+define <20 x i32> @lshr_binop_20xi32_exact(<20 x i32>, <20 x i32>) {
+ %3 = lshr exact <20 x i32> %0, %1
+ ret <20 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @lshr_binop_20xi32_exact(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %15 = lshr exact <4 x i32> %4, %9
+; CHECK-NEXT: %16 = lshr exact <4 x i32> %5, %10
+; CHECK-NEXT: %17 = lshr exact <4 x i32> %6, %11
+; CHECK-NEXT: %18 = lshr exact <4 x i32> %7, %12
+; CHECK-NEXT: %19 = lshr exact <4 x i32> %8, %13
+; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16
+; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16
+; CHECK-NEXT: ret <4 x i32> %15
+
+define <20 x i32> @ashr_binop_20xi32(<20 x i32>, <20 x i32>) {
+ %3 = ashr <20 x i32> %0, %1
+ ret <20 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @ashr_binop_20xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %15 = ashr <4 x i32> %4, %9
+; CHECK-NEXT: %16 = ashr <4 x i32> %5, %10
+; CHECK-NEXT: %17 = ashr <4 x i32> %6, %11
+; CHECK-NEXT: %18 = ashr <4 x i32> %7, %12
+; CHECK-NEXT: %19 = ashr <4 x i32> %8, %13
+; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16
+; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16
+; CHECK-NEXT: ret <4 x i32> %15
+
+define <20 x i32> @ashr_binop_20xi32_exact(<20 x i32>, <20 x i32>) {
+ %3 = ashr exact <20 x i32> %0, %1
+ ret <20 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @ashr_binop_20xi32_exact(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %15 = ashr exact <4 x i32> %4, %9
+; CHECK-NEXT: %16 = ashr exact <4 x i32> %5, %10
+; CHECK-NEXT: %17 = ashr exact <4 x i32> %6, %11
+; CHECK-NEXT: %18 = ashr exact <4 x i32> %7, %12
+; CHECK-NEXT: %19 = ashr exact <4 x i32> %8, %13
+; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16
+; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16
+; CHECK-NEXT: ret <4 x i32> %15
+
+define <20 x i32> @and_binop_20xi32(<20 x i32>, <20 x i32>) {
+ %3 = and <20 x i32> %0, %1
+ ret <20 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @and_binop_20xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %15 = and <4 x i32> %4, %9
+; CHECK-NEXT: %16 = and <4 x i32> %5, %10
+; CHECK-NEXT: %17 = and <4 x i32> %6, %11
+; CHECK-NEXT: %18 = and <4 x i32> %7, %12
+; CHECK-NEXT: %19 = and <4 x i32> %8, %13
+; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16
+; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16
+; CHECK-NEXT: ret <4 x i32> %15
+
+define <20 x i32> @xor_binop_20xi32(<20 x i32>, <20 x i32>) {
+ %3 = xor <20 x i32> %0, %1
+ ret <20 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @xor_binop_20xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %15 = xor <4 x i32> %4, %9
+; CHECK-NEXT: %16 = xor <4 x i32> %5, %10
+; CHECK-NEXT: %17 = xor <4 x i32> %6, %11
+; CHECK-NEXT: %18 = xor <4 x i32> %7, %12
+; CHECK-NEXT: %19 = xor <4 x i32> %8, %13
+; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16
+; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16
+; CHECK-NEXT: ret <4 x i32> %15
+
+define <20 x i32> @or_binop_20xi32(<20 x i32>, <20 x i32>) {
+ %3 = or <20 x i32> %0, %1
+ ret <20 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @or_binop_20xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %15 = or <4 x i32> %4, %9
+; CHECK-NEXT: %16 = or <4 x i32> %5, %10
+; CHECK-NEXT: %17 = or <4 x i32> %6, %11
+; CHECK-NEXT: %18 = or <4 x i32> %7, %12
+; CHECK-NEXT: %19 = or <4 x i32> %8, %13
+; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16
+; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16
+; CHECK-NEXT: ret <4 x i32> %15
+
+define <20 x i32> @urem_binop_20xi32(<20 x i32>, <20 x i32>) {
+ %3 = urem <20 x i32> %0, %1
+ ret <20 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @urem_binop_20xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %15 = urem <4 x i32> %4, %9
+; CHECK-NEXT: %16 = urem <4 x i32> %5, %10
+; CHECK-NEXT: %17 = urem <4 x i32> %6, %11
+; CHECK-NEXT: %18 = urem <4 x i32> %7, %12
+; CHECK-NEXT: %19 = urem <4 x i32> %8, %13
+; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16
+; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16
+; CHECK-NEXT: ret <4 x i32> %15
+
+define <20 x i32> @srem_binop_20xi32(<20 x i32>, <20 x i32>) {
+ %3 = srem <20 x i32> %0, %1
+ ret <20 x i32> %3
+}
+; CHECK-LABEL: define <4 x i32> @srem_binop_20xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
+; CHECK-NEXT: %15 = srem <4 x i32> %4, %9
+; CHECK-NEXT: %16 = srem <4 x i32> %5, %10
+; CHECK-NEXT: %17 = srem <4 x i32> %6, %11
+; CHECK-NEXT: %18 = srem <4 x i32> %7, %12
+; CHECK-NEXT: %19 = srem <4 x i32> %8, %13
+; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
+; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16
+; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16
+; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16
+; CHECK-NEXT: ret <4 x i32> %15
+
+define <20 x i64> @add_binop_20xi64_nuw(<20 x i64>, <20 x i64>) {
+ %3 = add nuw <20 x i64> %0, %1
+ ret <20 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @add_binop_20xi64_nuw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %30 = add nuw <2 x i64> %9, %19
+; CHECK-NEXT: %31 = add nuw <2 x i64> %10, %20
+; CHECK-NEXT: %32 = add nuw <2 x i64> %11, %21
+; CHECK-NEXT: %33 = add nuw <2 x i64> %12, %22
+; CHECK-NEXT: %34 = add nuw <2 x i64> %13, %23
+; CHECK-NEXT: %35 = add nuw <2 x i64> %14, %24
+; CHECK-NEXT: %36 = add nuw <2 x i64> %15, %25
+; CHECK-NEXT: %37 = add nuw <2 x i64> %16, %26
+; CHECK-NEXT: %38 = add nuw <2 x i64> %17, %27
+; CHECK-NEXT: %39 = add nuw <2 x i64> %18, %28
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16
+; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16
+; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16
+; CHECK-NEXT: ret <2 x i64> %30
+
+define <20 x i64> @add_binop_20xi64_nsw(<20 x i64>, <20 x i64>) {
+ %3 = add nsw <20 x i64> %0, %1
+ ret <20 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @add_binop_20xi64_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %30 = add nsw <2 x i64> %9, %19
+; CHECK-NEXT: %31 = add nsw <2 x i64> %10, %20
+; CHECK-NEXT: %32 = add nsw <2 x i64> %11, %21
+; CHECK-NEXT: %33 = add nsw <2 x i64> %12, %22
+; CHECK-NEXT: %34 = add nsw <2 x i64> %13, %23
+; CHECK-NEXT: %35 = add nsw <2 x i64> %14, %24
+; CHECK-NEXT: %36 = add nsw <2 x i64> %15, %25
+; CHECK-NEXT: %37 = add nsw <2 x i64> %16, %26
+; CHECK-NEXT: %38 = add nsw <2 x i64> %17, %27
+; CHECK-NEXT: %39 = add nsw <2 x i64> %18, %28
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16
+; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16
+; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16
+; CHECK-NEXT: ret <2 x i64> %30
+
+define <20 x i64> @add_binop_20xi64_nuw_nsw(<20 x i64>, <20 x i64>) {
+ %3 = add nuw nsw <20 x i64> %0, %1
+ ret <20 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @add_binop_20xi64_nuw_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %30 = add nuw nsw <2 x i64> %9, %19
+; CHECK-NEXT: %31 = add nuw nsw <2 x i64> %10, %20
+; CHECK-NEXT: %32 = add nuw nsw <2 x i64> %11, %21
+; CHECK-NEXT: %33 = add nuw nsw <2 x i64> %12, %22
+; CHECK-NEXT: %34 = add nuw nsw <2 x i64> %13, %23
+; CHECK-NEXT: %35 = add nuw nsw <2 x i64> %14, %24
+; CHECK-NEXT: %36 = add nuw nsw <2 x i64> %15, %25
+; CHECK-NEXT: %37 = add nuw nsw <2 x i64> %16, %26
+; CHECK-NEXT: %38 = add nuw nsw <2 x i64> %17, %27
+; CHECK-NEXT: %39 = add nuw nsw <2 x i64> %18, %28
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16
+; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16
+; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16
+; CHECK-NEXT: ret <2 x i64> %30
+
+define <20 x i64> @sub_binop_20xi64_nuw(<20 x i64>, <20 x i64>) {
+ %3 = sub nuw <20 x i64> %0, %1
+ ret <20 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @sub_binop_20xi64_nuw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %30 = sub nuw <2 x i64> %9, %19
+; CHECK-NEXT: %31 = sub nuw <2 x i64> %10, %20
+; CHECK-NEXT: %32 = sub nuw <2 x i64> %11, %21
+; CHECK-NEXT: %33 = sub nuw <2 x i64> %12, %22
+; CHECK-NEXT: %34 = sub nuw <2 x i64> %13, %23
+; CHECK-NEXT: %35 = sub nuw <2 x i64> %14, %24
+; CHECK-NEXT: %36 = sub nuw <2 x i64> %15, %25
+; CHECK-NEXT: %37 = sub nuw <2 x i64> %16, %26
+; CHECK-NEXT: %38 = sub nuw <2 x i64> %17, %27
+; CHECK-NEXT: %39 = sub nuw <2 x i64> %18, %28
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16
+; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16
+; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16
+; CHECK-NEXT: ret <2 x i64> %30
+
+define <20 x i64> @sub_binop_20xi64_nsw(<20 x i64>, <20 x i64>) {
+ %3 = sub nsw <20 x i64> %0, %1
+ ret <20 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @sub_binop_20xi64_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %30 = sub nsw <2 x i64> %9, %19
+; CHECK-NEXT: %31 = sub nsw <2 x i64> %10, %20
+; CHECK-NEXT: %32 = sub nsw <2 x i64> %11, %21
+; CHECK-NEXT: %33 = sub nsw <2 x i64> %12, %22
+; CHECK-NEXT: %34 = sub nsw <2 x i64> %13, %23
+; CHECK-NEXT: %35 = sub nsw <2 x i64> %14, %24
+; CHECK-NEXT: %36 = sub nsw <2 x i64> %15, %25
+; CHECK-NEXT: %37 = sub nsw <2 x i64> %16, %26
+; CHECK-NEXT: %38 = sub nsw <2 x i64> %17, %27
+; CHECK-NEXT: %39 = sub nsw <2 x i64> %18, %28
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16
+; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16
+; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16
+; CHECK-NEXT: ret <2 x i64> %30
+
+define <20 x i64> @sub_binop_20xi64_nuw_nsw(<20 x i64>, <20 x i64>) {
+ %3 = sub nuw nsw <20 x i64> %0, %1
+ ret <20 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @sub_binop_20xi64_nuw_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %30 = sub nuw nsw <2 x i64> %9, %19
+; CHECK-NEXT: %31 = sub nuw nsw <2 x i64> %10, %20
+; CHECK-NEXT: %32 = sub nuw nsw <2 x i64> %11, %21
+; CHECK-NEXT: %33 = sub nuw nsw <2 x i64> %12, %22
+; CHECK-NEXT: %34 = sub nuw nsw <2 x i64> %13, %23
+; CHECK-NEXT: %35 = sub nuw nsw <2 x i64> %14, %24
+; CHECK-NEXT: %36 = sub nuw nsw <2 x i64> %15, %25
+; CHECK-NEXT: %37 = sub nuw nsw <2 x i64> %16, %26
+; CHECK-NEXT: %38 = sub nuw nsw <2 x i64> %17, %27
+; CHECK-NEXT: %39 = sub nuw nsw <2 x i64> %18, %28
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16
+; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16
+; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16
+; CHECK-NEXT: ret <2 x i64> %30
+
+define <20 x i64> @mul_binop_20xi64_nuw(<20 x i64>, <20 x i64>) {
+ %3 = mul nuw <20 x i64> %0, %1
+ ret <20 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @mul_binop_20xi64_nuw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %30 = mul nuw <2 x i64> %9, %19
+; CHECK-NEXT: %31 = mul nuw <2 x i64> %10, %20
+; CHECK-NEXT: %32 = mul nuw <2 x i64> %11, %21
+; CHECK-NEXT: %33 = mul nuw <2 x i64> %12, %22
+; CHECK-NEXT: %34 = mul nuw <2 x i64> %13, %23
+; CHECK-NEXT: %35 = mul nuw <2 x i64> %14, %24
+; CHECK-NEXT: %36 = mul nuw <2 x i64> %15, %25
+; CHECK-NEXT: %37 = mul nuw <2 x i64> %16, %26
+; CHECK-NEXT: %38 = mul nuw <2 x i64> %17, %27
+; CHECK-NEXT: %39 = mul nuw <2 x i64> %18, %28
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16
+; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16
+; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16
+; CHECK-NEXT: ret <2 x i64> %30
+
+define <20 x i64> @mul_binop_20xi64_nsw(<20 x i64>, <20 x i64>) {
+ %3 = mul nsw <20 x i64> %0, %1
+ ret <20 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @mul_binop_20xi64_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %30 = mul nsw <2 x i64> %9, %19
+; CHECK-NEXT: %31 = mul nsw <2 x i64> %10, %20
+; CHECK-NEXT: %32 = mul nsw <2 x i64> %11, %21
+; CHECK-NEXT: %33 = mul nsw <2 x i64> %12, %22
+; CHECK-NEXT: %34 = mul nsw <2 x i64> %13, %23
+; CHECK-NEXT: %35 = mul nsw <2 x i64> %14, %24
+; CHECK-NEXT: %36 = mul nsw <2 x i64> %15, %25
+; CHECK-NEXT: %37 = mul nsw <2 x i64> %16, %26
+; CHECK-NEXT: %38 = mul nsw <2 x i64> %17, %27
+; CHECK-NEXT: %39 = mul nsw <2 x i64> %18, %28
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16
+; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16
+; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16
+; CHECK-NEXT: ret <2 x i64> %30
+
+define <20 x i64> @mul_binop_20xi64_nuw_nsw(<20 x i64>, <20 x i64>) {
+ %3 = mul nuw nsw <20 x i64> %0, %1
+ ret <20 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @mul_binop_20xi64_nuw_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %30 = mul nuw nsw <2 x i64> %9, %19
+; CHECK-NEXT: %31 = mul nuw nsw <2 x i64> %10, %20
+; CHECK-NEXT: %32 = mul nuw nsw <2 x i64> %11, %21
+; CHECK-NEXT: %33 = mul nuw nsw <2 x i64> %12, %22
+; CHECK-NEXT: %34 = mul nuw nsw <2 x i64> %13, %23
+; CHECK-NEXT: %35 = mul nuw nsw <2 x i64> %14, %24
+; CHECK-NEXT: %36 = mul nuw nsw <2 x i64> %15, %25
+; CHECK-NEXT: %37 = mul nuw nsw <2 x i64> %16, %26
+; CHECK-NEXT: %38 = mul nuw nsw <2 x i64> %17, %27
+; CHECK-NEXT: %39 = mul nuw nsw <2 x i64> %18, %28
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16
+; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16
+; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16
+; CHECK-NEXT: ret <2 x i64> %30
+
+define <20 x i64> @shl_binop_20xi64_nuw(<20 x i64>, <20 x i64>) {
+ %3 = shl nuw <20 x i64> %0, %1
+ ret <20 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @shl_binop_20xi64_nuw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %30 = shl nuw <2 x i64> %9, %19
+; CHECK-NEXT: %31 = shl nuw <2 x i64> %10, %20
+; CHECK-NEXT: %32 = shl nuw <2 x i64> %11, %21
+; CHECK-NEXT: %33 = shl nuw <2 x i64> %12, %22
+; CHECK-NEXT: %34 = shl nuw <2 x i64> %13, %23
+; CHECK-NEXT: %35 = shl nuw <2 x i64> %14, %24
+; CHECK-NEXT: %36 = shl nuw <2 x i64> %15, %25
+; CHECK-NEXT: %37 = shl nuw <2 x i64> %16, %26
+; CHECK-NEXT: %38 = shl nuw <2 x i64> %17, %27
+; CHECK-NEXT: %39 = shl nuw <2 x i64> %18, %28
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16
+; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16
+; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16
+; CHECK-NEXT: ret <2 x i64> %30
+
+define <20 x i64> @shl_binop_20xi64_nsw(<20 x i64>, <20 x i64>) {
+ %3 = shl nsw <20 x i64> %0, %1
+ ret <20 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @shl_binop_20xi64_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %30 = shl nsw <2 x i64> %9, %19
+; CHECK-NEXT: %31 = shl nsw <2 x i64> %10, %20
+; CHECK-NEXT: %32 = shl nsw <2 x i64> %11, %21
+; CHECK-NEXT: %33 = shl nsw <2 x i64> %12, %22
+; CHECK-NEXT: %34 = shl nsw <2 x i64> %13, %23
+; CHECK-NEXT: %35 = shl nsw <2 x i64> %14, %24
+; CHECK-NEXT: %36 = shl nsw <2 x i64> %15, %25
+; CHECK-NEXT: %37 = shl nsw <2 x i64> %16, %26
+; CHECK-NEXT: %38 = shl nsw <2 x i64> %17, %27
+; CHECK-NEXT: %39 = shl nsw <2 x i64> %18, %28
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16
+; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16
+; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16
+; CHECK-NEXT: ret <2 x i64> %30
+
+define <20 x i64> @shl_binop_20xi64_nuw_nsw(<20 x i64>, <20 x i64>) {
+ %3 = shl nuw nsw <20 x i64> %0, %1
+ ret <20 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @shl_binop_20xi64_nuw_nsw(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %30 = shl nuw nsw <2 x i64> %9, %19
+; CHECK-NEXT: %31 = shl nuw nsw <2 x i64> %10, %20
+; CHECK-NEXT: %32 = shl nuw nsw <2 x i64> %11, %21
+; CHECK-NEXT: %33 = shl nuw nsw <2 x i64> %12, %22
+; CHECK-NEXT: %34 = shl nuw nsw <2 x i64> %13, %23
+; CHECK-NEXT: %35 = shl nuw nsw <2 x i64> %14, %24
+; CHECK-NEXT: %36 = shl nuw nsw <2 x i64> %15, %25
+; CHECK-NEXT: %37 = shl nuw nsw <2 x i64> %16, %26
+; CHECK-NEXT: %38 = shl nuw nsw <2 x i64> %17, %27
+; CHECK-NEXT: %39 = shl nuw nsw <2 x i64> %18, %28
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16
+; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16
+; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16
+; CHECK-NEXT: ret <2 x i64> %30
+
+define <20 x i64> @udiv_binop_20xi64(<20 x i64>, <20 x i64>) {
+ %3 = udiv <20 x i64> %0, %1
+ ret <20 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @udiv_binop_20xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %30 = udiv <2 x i64> %9, %19
+; CHECK-NEXT: %31 = udiv <2 x i64> %10, %20
+; CHECK-NEXT: %32 = udiv <2 x i64> %11, %21
+; CHECK-NEXT: %33 = udiv <2 x i64> %12, %22
+; CHECK-NEXT: %34 = udiv <2 x i64> %13, %23
+; CHECK-NEXT: %35 = udiv <2 x i64> %14, %24
+; CHECK-NEXT: %36 = udiv <2 x i64> %15, %25
+; CHECK-NEXT: %37 = udiv <2 x i64> %16, %26
+; CHECK-NEXT: %38 = udiv <2 x i64> %17, %27
+; CHECK-NEXT: %39 = udiv <2 x i64> %18, %28
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16
+; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16
+; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16
+; CHECK-NEXT: ret <2 x i64> %30
+
+define <20 x i64> @udiv_binop_20xi64_exact(<20 x i64>, <20 x i64>) {
+ %3 = udiv exact <20 x i64> %0, %1
+ ret <20 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @udiv_binop_20xi64_exact(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %30 = udiv exact <2 x i64> %9, %19
+; CHECK-NEXT: %31 = udiv exact <2 x i64> %10, %20
+; CHECK-NEXT: %32 = udiv exact <2 x i64> %11, %21
+; CHECK-NEXT: %33 = udiv exact <2 x i64> %12, %22
+; CHECK-NEXT: %34 = udiv exact <2 x i64> %13, %23
+; CHECK-NEXT: %35 = udiv exact <2 x i64> %14, %24
+; CHECK-NEXT: %36 = udiv exact <2 x i64> %15, %25
+; CHECK-NEXT: %37 = udiv exact <2 x i64> %16, %26
+; CHECK-NEXT: %38 = udiv exact <2 x i64> %17, %27
+; CHECK-NEXT: %39 = udiv exact <2 x i64> %18, %28
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16
+; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16
+; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16
+; CHECK-NEXT: ret <2 x i64> %30
+
+define <20 x i64> @sdiv_binop_20xi64(<20 x i64>, <20 x i64>) {
+ %3 = sdiv <20 x i64> %0, %1
+ ret <20 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @sdiv_binop_20xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %30 = sdiv <2 x i64> %9, %19
+; CHECK-NEXT: %31 = sdiv <2 x i64> %10, %20
+; CHECK-NEXT: %32 = sdiv <2 x i64> %11, %21
+; CHECK-NEXT: %33 = sdiv <2 x i64> %12, %22
+; CHECK-NEXT: %34 = sdiv <2 x i64> %13, %23
+; CHECK-NEXT: %35 = sdiv <2 x i64> %14, %24
+; CHECK-NEXT: %36 = sdiv <2 x i64> %15, %25
+; CHECK-NEXT: %37 = sdiv <2 x i64> %16, %26
+; CHECK-NEXT: %38 = sdiv <2 x i64> %17, %27
+; CHECK-NEXT: %39 = sdiv <2 x i64> %18, %28
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16
+; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16
+; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16
+; CHECK-NEXT: ret <2 x i64> %30
+
+define <20 x i64> @sdiv_binop_20xi64_exact(<20 x i64>, <20 x i64>) {
+ %3 = sdiv exact <20 x i64> %0, %1
+ ret <20 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @sdiv_binop_20xi64_exact(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %30 = sdiv exact <2 x i64> %9, %19
+; CHECK-NEXT: %31 = sdiv exact <2 x i64> %10, %20
+; CHECK-NEXT: %32 = sdiv exact <2 x i64> %11, %21
+; CHECK-NEXT: %33 = sdiv exact <2 x i64> %12, %22
+; CHECK-NEXT: %34 = sdiv exact <2 x i64> %13, %23
+; CHECK-NEXT: %35 = sdiv exact <2 x i64> %14, %24
+; CHECK-NEXT: %36 = sdiv exact <2 x i64> %15, %25
+; CHECK-NEXT: %37 = sdiv exact <2 x i64> %16, %26
+; CHECK-NEXT: %38 = sdiv exact <2 x i64> %17, %27
+; CHECK-NEXT: %39 = sdiv exact <2 x i64> %18, %28
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16
+; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16
+; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16
+; CHECK-NEXT: ret <2 x i64> %30
+
+define <20 x i64> @lshr_binop_20xi64(<20 x i64>, <20 x i64>) {
+ %3 = lshr <20 x i64> %0, %1
+ ret <20 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @lshr_binop_20xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %30 = lshr <2 x i64> %9, %19
+; CHECK-NEXT: %31 = lshr <2 x i64> %10, %20
+; CHECK-NEXT: %32 = lshr <2 x i64> %11, %21
+; CHECK-NEXT: %33 = lshr <2 x i64> %12, %22
+; CHECK-NEXT: %34 = lshr <2 x i64> %13, %23
+; CHECK-NEXT: %35 = lshr <2 x i64> %14, %24
+; CHECK-NEXT: %36 = lshr <2 x i64> %15, %25
+; CHECK-NEXT: %37 = lshr <2 x i64> %16, %26
+; CHECK-NEXT: %38 = lshr <2 x i64> %17, %27
+; CHECK-NEXT: %39 = lshr <2 x i64> %18, %28
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16
+; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16
+; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16
+; CHECK-NEXT: ret <2 x i64> %30
+
+define <20 x i64> @lshr_binop_20xi64_exact(<20 x i64>, <20 x i64>) {
+ %3 = lshr exact <20 x i64> %0, %1
+ ret <20 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @lshr_binop_20xi64_exact(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %30 = lshr exact <2 x i64> %9, %19
+; CHECK-NEXT: %31 = lshr exact <2 x i64> %10, %20
+; CHECK-NEXT: %32 = lshr exact <2 x i64> %11, %21
+; CHECK-NEXT: %33 = lshr exact <2 x i64> %12, %22
+; CHECK-NEXT: %34 = lshr exact <2 x i64> %13, %23
+; CHECK-NEXT: %35 = lshr exact <2 x i64> %14, %24
+; CHECK-NEXT: %36 = lshr exact <2 x i64> %15, %25
+; CHECK-NEXT: %37 = lshr exact <2 x i64> %16, %26
+; CHECK-NEXT: %38 = lshr exact <2 x i64> %17, %27
+; CHECK-NEXT: %39 = lshr exact <2 x i64> %18, %28
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16
+; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16
+; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16
+; CHECK-NEXT: ret <2 x i64> %30
+
+define <20 x i64> @ashr_binop_20xi64(<20 x i64>, <20 x i64>) {
+ %3 = ashr <20 x i64> %0, %1
+ ret <20 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @ashr_binop_20xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %30 = ashr <2 x i64> %9, %19
+; CHECK-NEXT: %31 = ashr <2 x i64> %10, %20
+; CHECK-NEXT: %32 = ashr <2 x i64> %11, %21
+; CHECK-NEXT: %33 = ashr <2 x i64> %12, %22
+; CHECK-NEXT: %34 = ashr <2 x i64> %13, %23
+; CHECK-NEXT: %35 = ashr <2 x i64> %14, %24
+; CHECK-NEXT: %36 = ashr <2 x i64> %15, %25
+; CHECK-NEXT: %37 = ashr <2 x i64> %16, %26
+; CHECK-NEXT: %38 = ashr <2 x i64> %17, %27
+; CHECK-NEXT: %39 = ashr <2 x i64> %18, %28
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16
+; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16
+; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16
+; CHECK-NEXT: ret <2 x i64> %30
+
+define <20 x i64> @ashr_binop_20xi64_exact(<20 x i64>, <20 x i64>) {
+ %3 = ashr exact <20 x i64> %0, %1
+ ret <20 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @ashr_binop_20xi64_exact(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %30 = ashr exact <2 x i64> %9, %19
+; CHECK-NEXT: %31 = ashr exact <2 x i64> %10, %20
+; CHECK-NEXT: %32 = ashr exact <2 x i64> %11, %21
+; CHECK-NEXT: %33 = ashr exact <2 x i64> %12, %22
+; CHECK-NEXT: %34 = ashr exact <2 x i64> %13, %23
+; CHECK-NEXT: %35 = ashr exact <2 x i64> %14, %24
+; CHECK-NEXT: %36 = ashr exact <2 x i64> %15, %25
+; CHECK-NEXT: %37 = ashr exact <2 x i64> %16, %26
+; CHECK-NEXT: %38 = ashr exact <2 x i64> %17, %27
+; CHECK-NEXT: %39 = ashr exact <2 x i64> %18, %28
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16
+; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16
+; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16
+; CHECK-NEXT: ret <2 x i64> %30
+
+define <20 x i64> @and_binop_20xi64(<20 x i64>, <20 x i64>) {
+ %3 = and <20 x i64> %0, %1
+ ret <20 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @and_binop_20xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %30 = and <2 x i64> %9, %19
+; CHECK-NEXT: %31 = and <2 x i64> %10, %20
+; CHECK-NEXT: %32 = and <2 x i64> %11, %21
+; CHECK-NEXT: %33 = and <2 x i64> %12, %22
+; CHECK-NEXT: %34 = and <2 x i64> %13, %23
+; CHECK-NEXT: %35 = and <2 x i64> %14, %24
+; CHECK-NEXT: %36 = and <2 x i64> %15, %25
+; CHECK-NEXT: %37 = and <2 x i64> %16, %26
+; CHECK-NEXT: %38 = and <2 x i64> %17, %27
+; CHECK-NEXT: %39 = and <2 x i64> %18, %28
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16
+; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16
+; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16
+; CHECK-NEXT: ret <2 x i64> %30
+
+define <20 x i64> @xor_binop_20xi64(<20 x i64>, <20 x i64>) {
+ %3 = xor <20 x i64> %0, %1
+ ret <20 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @xor_binop_20xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %30 = xor <2 x i64> %9, %19
+; CHECK-NEXT: %31 = xor <2 x i64> %10, %20
+; CHECK-NEXT: %32 = xor <2 x i64> %11, %21
+; CHECK-NEXT: %33 = xor <2 x i64> %12, %22
+; CHECK-NEXT: %34 = xor <2 x i64> %13, %23
+; CHECK-NEXT: %35 = xor <2 x i64> %14, %24
+; CHECK-NEXT: %36 = xor <2 x i64> %15, %25
+; CHECK-NEXT: %37 = xor <2 x i64> %16, %26
+; CHECK-NEXT: %38 = xor <2 x i64> %17, %27
+; CHECK-NEXT: %39 = xor <2 x i64> %18, %28
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16
+; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16
+; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16
+; CHECK-NEXT: ret <2 x i64> %30
+
+define <20 x i64> @or_binop_20xi64(<20 x i64>, <20 x i64>) {
+ %3 = or <20 x i64> %0, %1
+ ret <20 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @or_binop_20xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %30 = or <2 x i64> %9, %19
+; CHECK-NEXT: %31 = or <2 x i64> %10, %20
+; CHECK-NEXT: %32 = or <2 x i64> %11, %21
+; CHECK-NEXT: %33 = or <2 x i64> %12, %22
+; CHECK-NEXT: %34 = or <2 x i64> %13, %23
+; CHECK-NEXT: %35 = or <2 x i64> %14, %24
+; CHECK-NEXT: %36 = or <2 x i64> %15, %25
+; CHECK-NEXT: %37 = or <2 x i64> %16, %26
+; CHECK-NEXT: %38 = or <2 x i64> %17, %27
+; CHECK-NEXT: %39 = or <2 x i64> %18, %28
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16
+; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16
+; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16
+; CHECK-NEXT: ret <2 x i64> %30
+
+define <20 x i64> @urem_binop_20xi64(<20 x i64>, <20 x i64>) {
+ %3 = urem <20 x i64> %0, %1
+ ret <20 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @urem_binop_20xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %30 = urem <2 x i64> %9, %19
+; CHECK-NEXT: %31 = urem <2 x i64> %10, %20
+; CHECK-NEXT: %32 = urem <2 x i64> %11, %21
+; CHECK-NEXT: %33 = urem <2 x i64> %12, %22
+; CHECK-NEXT: %34 = urem <2 x i64> %13, %23
+; CHECK-NEXT: %35 = urem <2 x i64> %14, %24
+; CHECK-NEXT: %36 = urem <2 x i64> %15, %25
+; CHECK-NEXT: %37 = urem <2 x i64> %16, %26
+; CHECK-NEXT: %38 = urem <2 x i64> %17, %27
+; CHECK-NEXT: %39 = urem <2 x i64> %18, %28
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16
+; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16
+; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16
+; CHECK-NEXT: ret <2 x i64> %30
+
+define <20 x i64> @srem_binop_20xi64(<20 x i64>, <20 x i64>) {
+ %3 = srem <20 x i64> %0, %1
+ ret <20 x i64> %3
+}
+; CHECK-LABEL: define <2 x i64> @srem_binop_20xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+; CHECK-NEXT: %30 = srem <2 x i64> %9, %19
+; CHECK-NEXT: %31 = srem <2 x i64> %10, %20
+; CHECK-NEXT: %32 = srem <2 x i64> %11, %21
+; CHECK-NEXT: %33 = srem <2 x i64> %12, %22
+; CHECK-NEXT: %34 = srem <2 x i64> %13, %23
+; CHECK-NEXT: %35 = srem <2 x i64> %14, %24
+; CHECK-NEXT: %36 = srem <2 x i64> %15, %25
+; CHECK-NEXT: %37 = srem <2 x i64> %16, %26
+; CHECK-NEXT: %38 = srem <2 x i64> %17, %27
+; CHECK-NEXT: %39 = srem <2 x i64> %18, %28
+; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16
+; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16
+; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16
+; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16
+; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16
+; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16
+; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16
+; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16
+; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16
+; CHECK-NEXT: ret <2 x i64> %30
+
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