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Issue 1423873002: PNaCl: Add a vector type legalization pass. Base URL: https://chromium.googlesource.com/native_client/pnacl-llvm.git@master
Patch Set: Created 5 years, 1 month ago
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1 ; RUN: opt -S -pnacl-vector-canonicalization %s | FileCheck %s
2
3 ; Auto-generated tests for shuffle operations.
4
5 target datalayout = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64 :64:64-p:32:32:32-v128:32:128"
6
7 define <2 x i32> @shuffle_2xi32_to_2xi32_0(<2 x i32>, <2 x i32>) {
8 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <2 x i32> <i32 1, i32 1>
9 ret <2 x i32> %3
10 }
11 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_2xi32_0(<4 x i32>, <4 x i32>)
12 ; CHECK-NEXT: %3 = shufflevector <4 x i32> %0, <4 x i32> undef, <4 x i32> <i3 2 1, i32 1, i32 1, i32 1>
13 ; CHECK-NEXT: ret <4 x i32> %3
14
15 define <2 x i32> @shuffle_2xi32_to_2xi32_1(<2 x i32>, <2 x i32>) {
16 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <2 x i32> <i32 2, i32 1>
17 ret <2 x i32> %3
18 }
19 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_2xi32_1(<4 x i32>, <4 x i32>)
20 ; CHECK-NEXT: %3 = shufflevector <4 x i32> %1, <4 x i32> %0, <4 x i32> <i32 0 , i32 5, i32 5, i32 5>
21 ; CHECK-NEXT: ret <4 x i32> %3
22
23 define <2 x i32> @shuffle_2xi32_to_2xi32_2(<2 x i32>, <2 x i32>) {
24 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <2 x i32> <i32 0, i32 1>
25 ret <2 x i32> %3
26 }
27 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_2xi32_2(<4 x i32>, <4 x i32>)
28 ; CHECK-NEXT: ret <4 x i32> %0
29
30 define <2 x i32> @shuffle_2xi32_to_2xi32_3(<2 x i32>, <2 x i32>) {
31 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <2 x i32> <i32 0, i32 2>
32 ret <2 x i32> %3
33 }
34 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_2xi32_3(<4 x i32>, <4 x i32>)
35 ; CHECK-NEXT: %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <4 x i32> <i32 0 , i32 4, i32 4, i32 4>
36 ; CHECK-NEXT: ret <4 x i32> %3
37
38 define <2 x i32> @shuffle_2xi32_to_2xi32_4(<2 x i32>, <2 x i32>) {
39 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <2 x i32> <i32 1, i32 0>
40 ret <2 x i32> %3
41 }
42 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_2xi32_4(<4 x i32>, <4 x i32>)
43 ; CHECK-NEXT: %3 = shufflevector <4 x i32> %0, <4 x i32> undef, <4 x i32> <i3 2 1, i32 0, i32 0, i32 0>
44 ; CHECK-NEXT: ret <4 x i32> %3
45
46 define <2 x i32> @shuffle_2xi32_to_2xi32_5(<2 x i32>, <2 x i32>) {
47 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <2 x i32> <i32 2, i32 0>
48 ret <2 x i32> %3
49 }
50 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_2xi32_5(<4 x i32>, <4 x i32>)
51 ; CHECK-NEXT: %3 = shufflevector <4 x i32> %1, <4 x i32> %0, <4 x i32> <i32 0 , i32 4, i32 4, i32 4>
52 ; CHECK-NEXT: ret <4 x i32> %3
53
54 define <2 x i32> @shuffle_2xi32_to_2xi32_6(<2 x i32>, <2 x i32>) {
55 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <2 x i32> <i32 1, i32 2>
56 ret <2 x i32> %3
57 }
58 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_2xi32_6(<4 x i32>, <4 x i32>)
59 ; CHECK-NEXT: %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <4 x i32> <i32 1 , i32 4, i32 4, i32 4>
60 ; CHECK-NEXT: ret <4 x i32> %3
61
62 define <2 x i32> @shuffle_2xi32_to_2xi32_7(<2 x i32>, <2 x i32>) {
63 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <2 x i32> <i32 1, i32 2>
64 ret <2 x i32> %3
65 }
66 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_2xi32_7(<4 x i32>, <4 x i32>)
67 ; CHECK-NEXT: %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <4 x i32> <i32 1 , i32 4, i32 4, i32 4>
68 ; CHECK-NEXT: ret <4 x i32> %3
69
70 define <2 x i32> @shuffle_2xi32_to_2xi32_8(<2 x i32>, <2 x i32>) {
71 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <2 x i32> <i32 2, i32 1>
72 ret <2 x i32> %3
73 }
74 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_2xi32_8(<4 x i32>, <4 x i32>)
75 ; CHECK-NEXT: %3 = shufflevector <4 x i32> %1, <4 x i32> %0, <4 x i32> <i32 0 , i32 5, i32 5, i32 5>
76 ; CHECK-NEXT: ret <4 x i32> %3
77
78 define <2 x i32> @shuffle_2xi32_to_2xi32_9(<2 x i32>, <2 x i32>) {
79 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <2 x i32> <i32 0, i32 2>
80 ret <2 x i32> %3
81 }
82 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_2xi32_9(<4 x i32>, <4 x i32>)
83 ; CHECK-NEXT: %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <4 x i32> <i32 0 , i32 4, i32 4, i32 4>
84 ; CHECK-NEXT: ret <4 x i32> %3
85
86 define <4 x i32> @shuffle_2xi32_to_4xi32_0(<2 x i32>, <2 x i32>) {
87 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <4 x i32> <i32 2, i32 0, i32 1, i32 0>
88 ret <4 x i32> %3
89 }
90 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_4xi32_0(<4 x i32>, <4 x i32>)
91 ; CHECK-NEXT: %3 = shufflevector <4 x i32> %1, <4 x i32> %0, <4 x i32> <i32 0 , i32 4, i32 5, i32 4>
92 ; CHECK-NEXT: ret <4 x i32> %3
93
94 define <4 x i32> @shuffle_2xi32_to_4xi32_1(<2 x i32>, <2 x i32>) {
95 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <4 x i32> <i32 0, i32 1, i32 1, i32 1>
96 ret <4 x i32> %3
97 }
98 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_4xi32_1(<4 x i32>, <4 x i32>)
99 ; CHECK-NEXT: ret <4 x i32> %0
100
101 define <4 x i32> @shuffle_2xi32_to_4xi32_2(<2 x i32>, <2 x i32>) {
102 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <4 x i32> <i32 0, i32 1, i32 2, i32 1>
103 ret <4 x i32> %3
104 }
105 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_4xi32_2(<4 x i32>, <4 x i32>)
106 ; CHECK-NEXT: %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <4 x i32> <i32 0 , i32 1, i32 4, i32 1>
107 ; CHECK-NEXT: ret <4 x i32> %3
108
109 define <4 x i32> @shuffle_2xi32_to_4xi32_3(<2 x i32>, <2 x i32>) {
110 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <4 x i32> <i32 2, i32 1, i32 0, i32 1>
111 ret <4 x i32> %3
112 }
113 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_4xi32_3(<4 x i32>, <4 x i32>)
114 ; CHECK-NEXT: %3 = shufflevector <4 x i32> %1, <4 x i32> %0, <4 x i32> <i32 0 , i32 5, i32 4, i32 5>
115 ; CHECK-NEXT: ret <4 x i32> %3
116
117 define <4 x i32> @shuffle_2xi32_to_4xi32_4(<2 x i32>, <2 x i32>) {
118 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <4 x i32> <i32 2, i32 1, i32 0, i32 1>
119 ret <4 x i32> %3
120 }
121 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_4xi32_4(<4 x i32>, <4 x i32>)
122 ; CHECK-NEXT: %3 = shufflevector <4 x i32> %1, <4 x i32> %0, <4 x i32> <i32 0 , i32 5, i32 4, i32 5>
123 ; CHECK-NEXT: ret <4 x i32> %3
124
125 define <4 x i32> @shuffle_2xi32_to_4xi32_5(<2 x i32>, <2 x i32>) {
126 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <4 x i32> <i32 0, i32 1, i32 0, i32 2>
127 ret <4 x i32> %3
128 }
129 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_4xi32_5(<4 x i32>, <4 x i32>)
130 ; CHECK-NEXT: %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <4 x i32> <i32 0 , i32 1, i32 0, i32 4>
131 ; CHECK-NEXT: ret <4 x i32> %3
132
133 define <4 x i32> @shuffle_2xi32_to_4xi32_6(<2 x i32>, <2 x i32>) {
134 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <4 x i32> <i32 2, i32 2, i32 2, i32 0>
135 ret <4 x i32> %3
136 }
137 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_4xi32_6(<4 x i32>, <4 x i32>)
138 ; CHECK-NEXT: %3 = shufflevector <4 x i32> %1, <4 x i32> %0, <4 x i32> <i32 0 , i32 0, i32 0, i32 4>
139 ; CHECK-NEXT: ret <4 x i32> %3
140
141 define <4 x i32> @shuffle_2xi32_to_4xi32_7(<2 x i32>, <2 x i32>) {
142 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <4 x i32> <i32 0, i32 2, i32 0, i32 0>
143 ret <4 x i32> %3
144 }
145 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_4xi32_7(<4 x i32>, <4 x i32>)
146 ; CHECK-NEXT: %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <4 x i32> <i32 0 , i32 4, i32 0, i32 0>
147 ; CHECK-NEXT: ret <4 x i32> %3
148
149 define <4 x i32> @shuffle_2xi32_to_4xi32_8(<2 x i32>, <2 x i32>) {
150 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <4 x i32> <i32 1, i32 0, i32 1, i32 2>
151 ret <4 x i32> %3
152 }
153 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_4xi32_8(<4 x i32>, <4 x i32>)
154 ; CHECK-NEXT: %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <4 x i32> <i32 1 , i32 0, i32 1, i32 4>
155 ; CHECK-NEXT: ret <4 x i32> %3
156
157 define <4 x i32> @shuffle_2xi32_to_4xi32_9(<2 x i32>, <2 x i32>) {
158 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <4 x i32> <i32 2, i32 0, i32 1, i32 1>
159 ret <4 x i32> %3
160 }
161 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_4xi32_9(<4 x i32>, <4 x i32>)
162 ; CHECK-NEXT: %3 = shufflevector <4 x i32> %1, <4 x i32> %0, <4 x i32> <i32 0 , i32 4, i32 5, i32 5>
163 ; CHECK-NEXT: ret <4 x i32> %3
164
165 define <6 x i32> @shuffle_2xi32_to_6xi32_0(<2 x i32>, <2 x i32>) {
166 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <6 x i32> <i32 0, i32 1, i32 0, i32 0, i32 1, i32 1>
167 ret <6 x i32> %3
168 }
169 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_6xi32_0(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
170 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i3 2 0, i32 1, i32 0, i32 0>
171 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i3 2 1, i32 1, i32 1, i32 1>
172 ; CHECK-NEXT: store <4 x i32> %5, <4 x i32>* %0, align 16
173 ; CHECK-NEXT: ret <4 x i32> %4
174
175 define <6 x i32> @shuffle_2xi32_to_6xi32_1(<2 x i32>, <2 x i32>) {
176 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <6 x i32> <i32 2, i32 0, i32 0, i32 0, i32 1, i32 0>
177 ret <6 x i32> %3
178 }
179 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_6xi32_1(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
180 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 0 , i32 4, i32 4, i32 4>
181 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i3 2 1, i32 0, i32 0, i32 0>
182 ; CHECK-NEXT: store <4 x i32> %5, <4 x i32>* %0, align 16
183 ; CHECK-NEXT: ret <4 x i32> %4
184
185 define <6 x i32> @shuffle_2xi32_to_6xi32_2(<2 x i32>, <2 x i32>) {
186 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <6 x i32> <i32 2, i32 1, i32 0, i32 1, i32 0, i32 0>
187 ret <6 x i32> %3
188 }
189 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_6xi32_2(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
190 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 0 , i32 5, i32 4, i32 5>
191 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> zer oinitializer
192 ; CHECK-NEXT: store <4 x i32> %5, <4 x i32>* %0, align 16
193 ; CHECK-NEXT: ret <4 x i32> %4
194
195 define <6 x i32> @shuffle_2xi32_to_6xi32_3(<2 x i32>, <2 x i32>) {
196 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <6 x i32> <i32 2, i32 0, i32 2, i32 0, i32 0, i32 2>
197 ret <6 x i32> %3
198 }
199 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_6xi32_3(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
200 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 0 , i32 4, i32 0, i32 4>
201 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 0 , i32 4, i32 4, i32 4>
202 ; CHECK-NEXT: store <4 x i32> %5, <4 x i32>* %0, align 16
203 ; CHECK-NEXT: ret <4 x i32> %4
204
205 define <6 x i32> @shuffle_2xi32_to_6xi32_4(<2 x i32>, <2 x i32>) {
206 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <6 x i32> <i32 0, i32 0, i32 2, i32 1, i32 2, i32 1>
207 ret <6 x i32> %3
208 }
209 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_6xi32_4(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
210 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 0 , i32 0, i32 4, i32 1>
211 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 0 , i32 5, i32 5, i32 5>
212 ; CHECK-NEXT: store <4 x i32> %5, <4 x i32>* %0, align 16
213 ; CHECK-NEXT: ret <4 x i32> %4
214
215 define <6 x i32> @shuffle_2xi32_to_6xi32_5(<2 x i32>, <2 x i32>) {
216 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <6 x i32> <i32 2, i32 2, i32 2, i32 2, i32 0, i32 0>
217 ret <6 x i32> %3
218 }
219 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_6xi32_5(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
220 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %2, <4 x i32> undef, <4 x i32> zer oinitializer
221 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> zer oinitializer
222 ; CHECK-NEXT: store <4 x i32> %5, <4 x i32>* %0, align 16
223 ; CHECK-NEXT: ret <4 x i32> %4
224
225 define <6 x i32> @shuffle_2xi32_to_6xi32_6(<2 x i32>, <2 x i32>) {
226 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <6 x i32> <i32 1, i32 0, i32 1, i32 1, i32 0, i32 2>
227 ret <6 x i32> %3
228 }
229 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_6xi32_6(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
230 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i3 2 1, i32 0, i32 1, i32 1>
231 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 0 , i32 4, i32 4, i32 4>
232 ; CHECK-NEXT: store <4 x i32> %5, <4 x i32>* %0, align 16
233 ; CHECK-NEXT: ret <4 x i32> %4
234
235 define <6 x i32> @shuffle_2xi32_to_6xi32_7(<2 x i32>, <2 x i32>) {
236 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <6 x i32> <i32 1, i32 0, i32 2, i32 2, i32 2, i32 0>
237 ret <6 x i32> %3
238 }
239 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_6xi32_7(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
240 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 1 , i32 0, i32 4, i32 4>
241 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 0 , i32 4, i32 4, i32 4>
242 ; CHECK-NEXT: store <4 x i32> %5, <4 x i32>* %0, align 16
243 ; CHECK-NEXT: ret <4 x i32> %4
244
245 define <6 x i32> @shuffle_2xi32_to_6xi32_8(<2 x i32>, <2 x i32>) {
246 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <6 x i32> <i32 2, i32 1, i32 1, i32 2, i32 0, i32 1>
247 ret <6 x i32> %3
248 }
249 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_6xi32_8(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
250 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 0 , i32 5, i32 5, i32 0>
251 ; CHECK-NEXT: store <4 x i32> %1, <4 x i32>* %0, align 16
252 ; CHECK-NEXT: ret <4 x i32> %4
253
254 define <6 x i32> @shuffle_2xi32_to_6xi32_9(<2 x i32>, <2 x i32>) {
255 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <6 x i32> <i32 0, i32 0, i32 1, i32 0, i32 2, i32 0>
256 ret <6 x i32> %3
257 }
258 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_6xi32_9(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
259 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i3 2 0, i32 0, i32 1, i32 0>
260 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 0 , i32 4, i32 4, i32 4>
261 ; CHECK-NEXT: store <4 x i32> %5, <4 x i32>* %0, align 16
262 ; CHECK-NEXT: ret <4 x i32> %4
263
264 define <8 x i32> @shuffle_2xi32_to_8xi32_0(<2 x i32>, <2 x i32>) {
265 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <8 x i32> <i32 1, i32 2, i32 0, i32 2, i32 0, i32 2, i32 2, i32 2>
266 ret <8 x i32> %3
267 }
268 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_8xi32_0(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
269 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 1 , i32 4, i32 0, i32 4>
270 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 0 , i32 4, i32 4, i32 4>
271 ; CHECK-NEXT: store <4 x i32> %5, <4 x i32>* %0, align 16
272 ; CHECK-NEXT: ret <4 x i32> %4
273
274 define <8 x i32> @shuffle_2xi32_to_8xi32_1(<2 x i32>, <2 x i32>) {
275 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <8 x i32> <i32 2, i32 0, i32 1, i32 2, i32 2, i32 2, i32 2, i32 2>
276 ret <8 x i32> %3
277 }
278 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_8xi32_1(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
279 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 0 , i32 4, i32 5, i32 0>
280 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> undef, <4 x i32> zer oinitializer
281 ; CHECK-NEXT: store <4 x i32> %5, <4 x i32>* %0, align 16
282 ; CHECK-NEXT: ret <4 x i32> %4
283
284 define <8 x i32> @shuffle_2xi32_to_8xi32_2(<2 x i32>, <2 x i32>) {
285 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <8 x i32> <i32 2, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 2>
286 ret <8 x i32> %3
287 }
288 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_8xi32_2(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
289 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 0 , i32 4, i32 5, i32 4>
290 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 1 , i32 0, i32 1, i32 4>
291 ; CHECK-NEXT: store <4 x i32> %5, <4 x i32>* %0, align 16
292 ; CHECK-NEXT: ret <4 x i32> %4
293
294 define <8 x i32> @shuffle_2xi32_to_8xi32_3(<2 x i32>, <2 x i32>) {
295 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <8 x i32> <i32 1, i32 1, i32 2, i32 2, i32 2, i32 2, i32 0, i32 1>
296 ret <8 x i32> %3
297 }
298 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_8xi32_3(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
299 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 1 , i32 1, i32 4, i32 4>
300 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 0 , i32 0, i32 4, i32 5>
301 ; CHECK-NEXT: store <4 x i32> %5, <4 x i32>* %0, align 16
302 ; CHECK-NEXT: ret <4 x i32> %4
303
304 define <8 x i32> @shuffle_2xi32_to_8xi32_4(<2 x i32>, <2 x i32>) {
305 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <8 x i32> <i32 1, i32 0, i32 1, i32 2, i32 2, i32 1, i32 1, i32 0>
306 ret <8 x i32> %3
307 }
308 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_8xi32_4(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
309 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 1 , i32 0, i32 1, i32 4>
310 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 0 , i32 5, i32 5, i32 4>
311 ; CHECK-NEXT: store <4 x i32> %5, <4 x i32>* %0, align 16
312 ; CHECK-NEXT: ret <4 x i32> %4
313
314 define <8 x i32> @shuffle_2xi32_to_8xi32_5(<2 x i32>, <2 x i32>) {
315 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <8 x i32> <i32 0, i32 2, i32 0, i32 0, i32 2, i32 0, i32 0, i32 2>
316 ret <8 x i32> %3
317 }
318 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_8xi32_5(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
319 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 0 , i32 4, i32 0, i32 0>
320 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 0 , i32 4, i32 4, i32 0>
321 ; CHECK-NEXT: store <4 x i32> %5, <4 x i32>* %0, align 16
322 ; CHECK-NEXT: ret <4 x i32> %4
323
324 define <8 x i32> @shuffle_2xi32_to_8xi32_6(<2 x i32>, <2 x i32>) {
325 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <8 x i32> <i32 2, i32 0, i32 1, i32 0, i32 1, i32 1, i32 0, i32 0>
326 ret <8 x i32> %3
327 }
328 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_8xi32_6(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
329 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 0 , i32 4, i32 5, i32 4>
330 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i3 2 1, i32 1, i32 0, i32 0>
331 ; CHECK-NEXT: store <4 x i32> %5, <4 x i32>* %0, align 16
332 ; CHECK-NEXT: ret <4 x i32> %4
333
334 define <8 x i32> @shuffle_2xi32_to_8xi32_7(<2 x i32>, <2 x i32>) {
335 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <8 x i32> <i32 0, i32 1, i32 1, i32 0, i32 0, i32 2, i32 0, i32 0>
336 ret <8 x i32> %3
337 }
338 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_8xi32_7(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
339 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i3 2 0, i32 1, i32 1, i32 0>
340 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 0 , i32 4, i32 0, i32 0>
341 ; CHECK-NEXT: store <4 x i32> %5, <4 x i32>* %0, align 16
342 ; CHECK-NEXT: ret <4 x i32> %4
343
344 define <8 x i32> @shuffle_2xi32_to_8xi32_8(<2 x i32>, <2 x i32>) {
345 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <8 x i32> <i32 1, i32 2, i32 1, i32 0, i32 1, i32 1, i32 0, i32 0>
346 ret <8 x i32> %3
347 }
348 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_8xi32_8(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
349 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 1 , i32 4, i32 1, i32 0>
350 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i3 2 1, i32 1, i32 0, i32 0>
351 ; CHECK-NEXT: store <4 x i32> %5, <4 x i32>* %0, align 16
352 ; CHECK-NEXT: ret <4 x i32> %4
353
354 define <8 x i32> @shuffle_2xi32_to_8xi32_9(<2 x i32>, <2 x i32>) {
355 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <8 x i32> <i32 2, i32 0, i32 0, i32 0, i32 1, i32 1, i32 0, i32 1>
356 ret <8 x i32> %3
357 }
358 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_8xi32_9(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
359 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 0 , i32 4, i32 4, i32 4>
360 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i3 2 1, i32 1, i32 0, i32 1>
361 ; CHECK-NEXT: store <4 x i32> %5, <4 x i32>* %0, align 16
362 ; CHECK-NEXT: ret <4 x i32> %4
363
364 define <12 x i32> @shuffle_2xi32_to_12xi32_0(<2 x i32>, <2 x i32>) {
365 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <12 x i32> <i32 2, i32 1, i32 2 , i32 1, i32 0, i32 2, i32 0, i32 0, i32 0, i32 1, i32 1, i32 1>
366 ret <12 x i32> %3
367 }
368 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_12xi32_0(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>)
369 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 0 , i32 5, i32 0, i32 5>
370 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 0 , i32 4, i32 0, i32 0>
371 ; CHECK-NEXT: store <4 x i32> %6, <4 x i32>* %0, align 16
372 ; CHECK-NEXT: store <4 x i32> %2, <4 x i32>* %1, align 16
373 ; CHECK-NEXT: ret <4 x i32> %5
374
375 define <12 x i32> @shuffle_2xi32_to_12xi32_1(<2 x i32>, <2 x i32>) {
376 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <12 x i32> <i32 2, i32 0, i32 1 , i32 1, i32 2, i32 1, i32 2, i32 2, i32 2, i32 2, i32 0, i32 1>
377 ret <12 x i32> %3
378 }
379 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_12xi32_1(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>)
380 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 0 , i32 4, i32 5, i32 5>
381 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 0 , i32 5, i32 0, i32 0>
382 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 0 , i32 0, i32 4, i32 5>
383 ; CHECK-NEXT: store <4 x i32> %6, <4 x i32>* %0, align 16
384 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %1, align 16
385 ; CHECK-NEXT: ret <4 x i32> %5
386
387 define <12 x i32> @shuffle_2xi32_to_12xi32_2(<2 x i32>, <2 x i32>) {
388 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <12 x i32> <i32 0, i32 0, i32 0 , i32 0, i32 2, i32 0, i32 0, i32 0, i32 2, i32 1, i32 2, i32 2>
389 ret <12 x i32> %3
390 }
391 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_12xi32_2(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>)
392 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> undef, <4 x i32> zer oinitializer
393 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 0 , i32 4, i32 4, i32 4>
394 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 0 , i32 5, i32 0, i32 0>
395 ; CHECK-NEXT: store <4 x i32> %6, <4 x i32>* %0, align 16
396 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %1, align 16
397 ; CHECK-NEXT: ret <4 x i32> %5
398
399 define <12 x i32> @shuffle_2xi32_to_12xi32_3(<2 x i32>, <2 x i32>) {
400 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <12 x i32> <i32 2, i32 1, i32 2 , i32 1, i32 0, i32 0, i32 1, i32 2, i32 1, i32 1, i32 2, i32 1>
401 ret <12 x i32> %3
402 }
403 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_12xi32_3(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>)
404 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 0 , i32 5, i32 0, i32 5>
405 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 0 , i32 0, i32 1, i32 4>
406 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 1 , i32 1, i32 4, i32 1>
407 ; CHECK-NEXT: store <4 x i32> %6, <4 x i32>* %0, align 16
408 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %1, align 16
409 ; CHECK-NEXT: ret <4 x i32> %5
410
411 define <12 x i32> @shuffle_2xi32_to_12xi32_4(<2 x i32>, <2 x i32>) {
412 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <12 x i32> <i32 2, i32 2, i32 1 , i32 2, i32 0, i32 0, i32 2, i32 2, i32 2, i32 2, i32 0, i32 2>
413 ret <12 x i32> %3
414 }
415 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_12xi32_4(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>)
416 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 0 , i32 0, i32 5, i32 0>
417 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 0 , i32 0, i32 4, i32 4>
418 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 0 , i32 0, i32 4, i32 0>
419 ; CHECK-NEXT: store <4 x i32> %6, <4 x i32>* %0, align 16
420 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %1, align 16
421 ; CHECK-NEXT: ret <4 x i32> %5
422
423 define <12 x i32> @shuffle_2xi32_to_12xi32_5(<2 x i32>, <2 x i32>) {
424 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <12 x i32> <i32 2, i32 0, i32 0 , i32 2, i32 1, i32 0, i32 1, i32 2, i32 2, i32 0, i32 0, i32 1>
425 ret <12 x i32> %3
426 }
427 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_12xi32_5(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>)
428 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 0 , i32 4, i32 4, i32 0>
429 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 1 , i32 0, i32 1, i32 4>
430 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 0 , i32 4, i32 4, i32 5>
431 ; CHECK-NEXT: store <4 x i32> %6, <4 x i32>* %0, align 16
432 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %1, align 16
433 ; CHECK-NEXT: ret <4 x i32> %5
434
435 define <12 x i32> @shuffle_2xi32_to_12xi32_6(<2 x i32>, <2 x i32>) {
436 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <12 x i32> <i32 1, i32 2, i32 0 , i32 0, i32 1, i32 0, i32 0, i32 1, i32 0, i32 1, i32 2, i32 0>
437 ret <12 x i32> %3
438 }
439 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_12xi32_6(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>)
440 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 1 , i32 4, i32 0, i32 0>
441 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %2, <4 x i32> undef, <4 x i32> <i3 2 1, i32 0, i32 0, i32 1>
442 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 0 , i32 1, i32 4, i32 0>
443 ; CHECK-NEXT: store <4 x i32> %6, <4 x i32>* %0, align 16
444 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %1, align 16
445 ; CHECK-NEXT: ret <4 x i32> %5
446
447 define <12 x i32> @shuffle_2xi32_to_12xi32_7(<2 x i32>, <2 x i32>) {
448 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <12 x i32> <i32 0, i32 1, i32 0 , i32 2, i32 1, i32 0, i32 1, i32 1, i32 0, i32 2, i32 0, i32 2>
449 ret <12 x i32> %3
450 }
451 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_12xi32_7(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>)
452 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 0 , i32 1, i32 0, i32 4>
453 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %2, <4 x i32> undef, <4 x i32> <i3 2 1, i32 0, i32 1, i32 1>
454 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 0 , i32 4, i32 0, i32 4>
455 ; CHECK-NEXT: store <4 x i32> %6, <4 x i32>* %0, align 16
456 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %1, align 16
457 ; CHECK-NEXT: ret <4 x i32> %5
458
459 define <12 x i32> @shuffle_2xi32_to_12xi32_8(<2 x i32>, <2 x i32>) {
460 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <12 x i32> <i32 1, i32 1, i32 1 , i32 1, i32 0, i32 0, i32 0, i32 1, i32 1, i32 2, i32 1, i32 1>
461 ret <12 x i32> %3
462 }
463 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_12xi32_8(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>)
464 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> undef, <4 x i32> <i3 2 1, i32 1, i32 1, i32 1>
465 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %2, <4 x i32> undef, <4 x i32> <i3 2 0, i32 0, i32 0, i32 1>
466 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 1 , i32 4, i32 1, i32 1>
467 ; CHECK-NEXT: store <4 x i32> %6, <4 x i32>* %0, align 16
468 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %1, align 16
469 ; CHECK-NEXT: ret <4 x i32> %5
470
471 define <12 x i32> @shuffle_2xi32_to_12xi32_9(<2 x i32>, <2 x i32>) {
472 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <12 x i32> <i32 0, i32 0, i32 1 , i32 2, i32 1, i32 2, i32 1, i32 0, i32 0, i32 2, i32 1, i32 1>
473 ret <12 x i32> %3
474 }
475 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_12xi32_9(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>)
476 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 0 , i32 0, i32 1, i32 4>
477 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 1 , i32 4, i32 1, i32 0>
478 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 0 , i32 4, i32 1, i32 1>
479 ; CHECK-NEXT: store <4 x i32> %6, <4 x i32>* %0, align 16
480 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %1, align 16
481 ; CHECK-NEXT: ret <4 x i32> %5
482
483 define <16 x i32> @shuffle_2xi32_to_16xi32_0(<2 x i32>, <2 x i32>) {
484 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <16 x i32> <i32 2, i32 0, i32 0 , i32 0, i32 1, i32 1, i32 2, i32 2, i32 0, i32 0, i32 2, i32 1, i32 1, i32 0, i 32 1, i32 0>
485 ret <16 x i32> %3
486 }
487 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_16xi32_0(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>)
488 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 0 , i32 4, i32 4, i32 4>
489 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 1 , i32 1, i32 4, i32 4>
490 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 0 , i32 0, i32 4, i32 1>
491 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %3, <4 x i32> undef, <4 x i32> <i3 2 1, i32 0, i32 1, i32 0>
492 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
493 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %1, align 16
494 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %2, align 16
495 ; CHECK-NEXT: ret <4 x i32> %6
496
497 define <16 x i32> @shuffle_2xi32_to_16xi32_1(<2 x i32>, <2 x i32>) {
498 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <16 x i32> <i32 0, i32 2, i32 1 , i32 2, i32 0, i32 0, i32 2, i32 2, i32 0, i32 1, i32 1, i32 0, i32 1, i32 2, i 32 0, i32 1>
499 ret <16 x i32> %3
500 }
501 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_16xi32_1(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>)
502 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 0 , i32 4, i32 1, i32 4>
503 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 0 , i32 0, i32 4, i32 4>
504 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %3, <4 x i32> undef, <4 x i32> <i3 2 0, i32 1, i32 1, i32 0>
505 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 1 , i32 4, i32 0, i32 1>
506 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
507 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %1, align 16
508 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %2, align 16
509 ; CHECK-NEXT: ret <4 x i32> %6
510
511 define <16 x i32> @shuffle_2xi32_to_16xi32_2(<2 x i32>, <2 x i32>) {
512 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <16 x i32> <i32 1, i32 2, i32 0 , i32 1, i32 2, i32 2, i32 1, i32 2, i32 0, i32 0, i32 1, i32 1, i32 2, i32 1, i 32 2, i32 0>
513 ret <16 x i32> %3
514 }
515 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_16xi32_2(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>)
516 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 1 , i32 4, i32 0, i32 1>
517 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 0 , i32 0, i32 5, i32 0>
518 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %3, <4 x i32> undef, <4 x i32> <i3 2 0, i32 0, i32 1, i32 1>
519 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 0 , i32 5, i32 0, i32 4>
520 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
521 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %1, align 16
522 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %2, align 16
523 ; CHECK-NEXT: ret <4 x i32> %6
524
525 define <16 x i32> @shuffle_2xi32_to_16xi32_3(<2 x i32>, <2 x i32>) {
526 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <16 x i32> <i32 2, i32 0, i32 2 , i32 0, i32 1, i32 1, i32 0, i32 0, i32 2, i32 2, i32 2, i32 0, i32 0, i32 0, i 32 0, i32 1>
527 ret <16 x i32> %3
528 }
529 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_16xi32_3(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>)
530 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 0 , i32 4, i32 0, i32 4>
531 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %3, <4 x i32> undef, <4 x i32> <i3 2 1, i32 1, i32 0, i32 0>
532 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 0 , i32 0, i32 0, i32 4>
533 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %3, <4 x i32> undef, <4 x i32> <i3 2 0, i32 0, i32 0, i32 1>
534 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
535 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %1, align 16
536 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %2, align 16
537 ; CHECK-NEXT: ret <4 x i32> %6
538
539 define <16 x i32> @shuffle_2xi32_to_16xi32_4(<2 x i32>, <2 x i32>) {
540 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <16 x i32> <i32 1, i32 0, i32 1 , i32 0, i32 1, i32 2, i32 1, i32 2, i32 0, i32 1, i32 2, i32 1, i32 2, i32 0, i 32 2, i32 0>
541 ret <16 x i32> %3
542 }
543 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_16xi32_4(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>)
544 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %3, <4 x i32> undef, <4 x i32> <i3 2 1, i32 0, i32 1, i32 0>
545 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 1 , i32 4, i32 1, i32 4>
546 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 0 , i32 1, i32 4, i32 1>
547 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 0 , i32 4, i32 0, i32 4>
548 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
549 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %1, align 16
550 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %2, align 16
551 ; CHECK-NEXT: ret <4 x i32> %6
552
553 define <16 x i32> @shuffle_2xi32_to_16xi32_5(<2 x i32>, <2 x i32>) {
554 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <16 x i32> <i32 1, i32 2, i32 0 , i32 2, i32 0, i32 0, i32 0, i32 2, i32 2, i32 0, i32 1, i32 1, i32 0, i32 2, i 32 2, i32 0>
555 ret <16 x i32> %3
556 }
557 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_16xi32_5(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>)
558 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 1 , i32 4, i32 0, i32 4>
559 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 0 , i32 0, i32 0, i32 4>
560 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 0 , i32 4, i32 5, i32 5>
561 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 0 , i32 4, i32 4, i32 0>
562 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
563 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %1, align 16
564 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %2, align 16
565 ; CHECK-NEXT: ret <4 x i32> %6
566
567 define <16 x i32> @shuffle_2xi32_to_16xi32_6(<2 x i32>, <2 x i32>) {
568 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <16 x i32> <i32 0, i32 2, i32 0 , i32 2, i32 2, i32 2, i32 1, i32 1, i32 0, i32 0, i32 0, i32 2, i32 1, i32 0, i 32 0, i32 1>
569 ret <16 x i32> %3
570 }
571 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_16xi32_6(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>)
572 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 0 , i32 4, i32 0, i32 4>
573 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 0 , i32 0, i32 5, i32 5>
574 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 0 , i32 0, i32 0, i32 4>
575 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %3, <4 x i32> undef, <4 x i32> <i3 2 1, i32 0, i32 0, i32 1>
576 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
577 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %1, align 16
578 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %2, align 16
579 ; CHECK-NEXT: ret <4 x i32> %6
580
581 define <16 x i32> @shuffle_2xi32_to_16xi32_7(<2 x i32>, <2 x i32>) {
582 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <16 x i32> <i32 0, i32 1, i32 2 , i32 1, i32 1, i32 1, i32 1, i32 1, i32 0, i32 0, i32 1, i32 1, i32 1, i32 2, i 32 2, i32 1>
583 ret <16 x i32> %3
584 }
585 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_16xi32_7(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>)
586 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 0 , i32 1, i32 4, i32 1>
587 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %3, <4 x i32> undef, <4 x i32> <i3 2 1, i32 1, i32 1, i32 1>
588 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %3, <4 x i32> undef, <4 x i32> <i3 2 0, i32 0, i32 1, i32 1>
589 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 1 , i32 4, i32 4, i32 1>
590 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
591 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %1, align 16
592 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %2, align 16
593 ; CHECK-NEXT: ret <4 x i32> %6
594
595 define <16 x i32> @shuffle_2xi32_to_16xi32_8(<2 x i32>, <2 x i32>) {
596 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <16 x i32> <i32 2, i32 0, i32 1 , i32 1, i32 2, i32 1, i32 0, i32 2, i32 2, i32 0, i32 1, i32 1, i32 2, i32 1, i 32 1, i32 0>
597 ret <16 x i32> %3
598 }
599 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_16xi32_8(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>)
600 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 0 , i32 4, i32 5, i32 5>
601 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 0 , i32 5, i32 4, i32 0>
602 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 0 , i32 4, i32 5, i32 5>
603 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 0 , i32 5, i32 5, i32 4>
604 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
605 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %1, align 16
606 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %2, align 16
607 ; CHECK-NEXT: ret <4 x i32> %6
608
609 define <16 x i32> @shuffle_2xi32_to_16xi32_9(<2 x i32>, <2 x i32>) {
610 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <16 x i32> <i32 0, i32 2, i32 1 , i32 1, i32 0, i32 2, i32 1, i32 0, i32 1, i32 1, i32 2, i32 0, i32 0, i32 1, i 32 1, i32 2>
611 ret <16 x i32> %3
612 }
613 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_16xi32_9(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>)
614 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 0 , i32 4, i32 1, i32 1>
615 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 0 , i32 4, i32 1, i32 0>
616 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 1 , i32 1, i32 4, i32 0>
617 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 0 , i32 1, i32 1, i32 4>
618 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
619 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %1, align 16
620 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %2, align 16
621 ; CHECK-NEXT: ret <4 x i32> %6
622
623 define <20 x i32> @shuffle_2xi32_to_20xi32_0(<2 x i32>, <2 x i32>) {
624 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <20 x i32> <i32 0, i32 1, i32 1 , i32 2, i32 2, i32 0, i32 1, i32 0, i32 2, i32 0, i32 0, i32 1, i32 1, i32 1, i 32 0, i32 1, i32 0, i32 0, i32 0, i32 1>
625 ret <20 x i32> %3
626 }
627 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_20xi32_0(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>)
628 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 0 , i32 1, i32 1, i32 4>
629 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 0 , i32 4, i32 5, i32 4>
630 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 0 , i32 4, i32 4, i32 5>
631 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %4, <4 x i32> undef, <4 x i32> <i 32 1, i32 1, i32 0, i32 1>
632 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %4, <4 x i32> undef, <4 x i32> <i 32 0, i32 0, i32 0, i32 1>
633 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %0, align 16
634 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %1, align 16
635 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %2, align 16
636 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %3, align 16
637 ; CHECK-NEXT: ret <4 x i32> %7
638
639 define <20 x i32> @shuffle_2xi32_to_20xi32_1(<2 x i32>, <2 x i32>) {
640 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <20 x i32> <i32 1, i32 2, i32 0 , i32 2, i32 2, i32 1, i32 1, i32 1, i32 1, i32 2, i32 0, i32 2, i32 1, i32 0, i 32 2, i32 0, i32 2, i32 0, i32 1, i32 1>
641 ret <20 x i32> %3
642 }
643 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_20xi32_1(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>)
644 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 1 , i32 4, i32 0, i32 4>
645 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 0 , i32 5, i32 5, i32 5>
646 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 1 , i32 4, i32 0, i32 4>
647 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 1, i32 0, i32 4, i32 0>
648 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 0, i32 4, i32 5, i32 5>
649 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %0, align 16
650 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %1, align 16
651 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %2, align 16
652 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %3, align 16
653 ; CHECK-NEXT: ret <4 x i32> %7
654
655 define <20 x i32> @shuffle_2xi32_to_20xi32_2(<2 x i32>, <2 x i32>) {
656 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <20 x i32> <i32 1, i32 2, i32 2 , i32 1, i32 1, i32 1, i32 2, i32 2, i32 0, i32 2, i32 0, i32 0, i32 1, i32 1, i 32 0, i32 2, i32 2, i32 1, i32 1, i32 2>
657 ret <20 x i32> %3
658 }
659 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_20xi32_2(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>)
660 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 1 , i32 4, i32 4, i32 1>
661 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 1 , i32 1, i32 4, i32 4>
662 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 0 , i32 4, i32 0, i32 0>
663 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 1, i32 1, i32 0, i32 4>
664 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 0, i32 5, i32 5, i32 0>
665 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %0, align 16
666 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %1, align 16
667 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %2, align 16
668 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %3, align 16
669 ; CHECK-NEXT: ret <4 x i32> %7
670
671 define <20 x i32> @shuffle_2xi32_to_20xi32_3(<2 x i32>, <2 x i32>) {
672 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <20 x i32> <i32 1, i32 1, i32 1 , i32 0, i32 1, i32 0, i32 2, i32 1, i32 2, i32 2, i32 2, i32 1, i32 0, i32 0, i 32 2, i32 1, i32 1, i32 1, i32 2, i32 1>
673 ret <20 x i32> %3
674 }
675 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_20xi32_3(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>)
676 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %4, <4 x i32> undef, <4 x i32> <i3 2 1, i32 1, i32 1, i32 0>
677 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 1 , i32 0, i32 4, i32 1>
678 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 0 , i32 0, i32 0, i32 5>
679 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 0, i32 0, i32 4, i32 1>
680 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 1, i32 1, i32 4, i32 1>
681 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %0, align 16
682 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %1, align 16
683 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %2, align 16
684 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %3, align 16
685 ; CHECK-NEXT: ret <4 x i32> %7
686
687 define <20 x i32> @shuffle_2xi32_to_20xi32_4(<2 x i32>, <2 x i32>) {
688 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <20 x i32> <i32 2, i32 1, i32 0 , i32 1, i32 1, i32 0, i32 2, i32 1, i32 0, i32 2, i32 1, i32 2, i32 0, i32 2, i 32 0, i32 2, i32 1, i32 1, i32 1, i32 0>
689 ret <20 x i32> %3
690 }
691 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_20xi32_4(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>)
692 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 0 , i32 5, i32 4, i32 5>
693 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 1 , i32 0, i32 4, i32 1>
694 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 0 , i32 4, i32 1, i32 4>
695 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 0, i32 4, i32 0, i32 4>
696 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %4, <4 x i32> undef, <4 x i32> <i 32 1, i32 1, i32 1, i32 0>
697 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %0, align 16
698 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %1, align 16
699 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %2, align 16
700 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %3, align 16
701 ; CHECK-NEXT: ret <4 x i32> %7
702
703 define <20 x i32> @shuffle_2xi32_to_20xi32_5(<2 x i32>, <2 x i32>) {
704 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <20 x i32> <i32 2, i32 1, i32 0 , i32 2, i32 0, i32 2, i32 0, i32 0, i32 1, i32 0, i32 1, i32 2, i32 0, i32 1, i 32 2, i32 2, i32 0, i32 1, i32 2, i32 1>
705 ret <20 x i32> %3
706 }
707 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_20xi32_5(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>)
708 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 0 , i32 5, i32 4, i32 0>
709 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 0 , i32 4, i32 0, i32 0>
710 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 1 , i32 0, i32 1, i32 4>
711 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
712 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 4, i32 1>
713 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %0, align 16
714 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %1, align 16
715 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %2, align 16
716 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %3, align 16
717 ; CHECK-NEXT: ret <4 x i32> %7
718
719 define <20 x i32> @shuffle_2xi32_to_20xi32_6(<2 x i32>, <2 x i32>) {
720 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <20 x i32> <i32 2, i32 0, i32 1 , i32 0, i32 2, i32 2, i32 0, i32 1, i32 1, i32 2, i32 2, i32 1, i32 0, i32 0, i 32 1, i32 0, i32 0, i32 0, i32 2, i32 1>
721 ret <20 x i32> %3
722 }
723 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_20xi32_6(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>)
724 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 0 , i32 4, i32 5, i32 4>
725 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 0 , i32 0, i32 4, i32 5>
726 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 1 , i32 4, i32 4, i32 1>
727 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %4, <4 x i32> undef, <4 x i32> <i 32 0, i32 0, i32 1, i32 0>
728 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 0, i32 0, i32 4, i32 1>
729 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %0, align 16
730 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %1, align 16
731 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %2, align 16
732 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %3, align 16
733 ; CHECK-NEXT: ret <4 x i32> %7
734
735 define <20 x i32> @shuffle_2xi32_to_20xi32_7(<2 x i32>, <2 x i32>) {
736 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <20 x i32> <i32 1, i32 2, i32 0 , i32 1, i32 1, i32 1, i32 2, i32 2, i32 0, i32 1, i32 2, i32 2, i32 1, i32 1, i 32 1, i32 0, i32 2, i32 2, i32 0, i32 2>
737 ret <20 x i32> %3
738 }
739 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_20xi32_7(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>)
740 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 1 , i32 4, i32 0, i32 1>
741 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 1 , i32 1, i32 4, i32 4>
742 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 0 , i32 1, i32 4, i32 4>
743 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %4, <4 x i32> undef, <4 x i32> <i 32 1, i32 1, i32 1, i32 0>
744 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 0, i32 0, i32 4, i32 0>
745 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %0, align 16
746 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %1, align 16
747 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %2, align 16
748 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %3, align 16
749 ; CHECK-NEXT: ret <4 x i32> %7
750
751 define <20 x i32> @shuffle_2xi32_to_20xi32_8(<2 x i32>, <2 x i32>) {
752 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <20 x i32> <i32 1, i32 0, i32 2 , i32 0, i32 0, i32 0, i32 0, i32 1, i32 1, i32 2, i32 1, i32 2, i32 1, i32 1, i 32 0, i32 0, i32 0, i32 1, i32 2, i32 1>
753 ret <20 x i32> %3
754 }
755 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_20xi32_8(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>)
756 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 1 , i32 0, i32 4, i32 0>
757 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %4, <4 x i32> undef, <4 x i32> <i3 2 0, i32 0, i32 0, i32 1>
758 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 1 , i32 4, i32 1, i32 4>
759 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %4, <4 x i32> undef, <4 x i32> <i 32 1, i32 1, i32 0, i32 0>
760 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 4, i32 1>
761 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %0, align 16
762 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %1, align 16
763 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %2, align 16
764 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %3, align 16
765 ; CHECK-NEXT: ret <4 x i32> %7
766
767 define <20 x i32> @shuffle_2xi32_to_20xi32_9(<2 x i32>, <2 x i32>) {
768 %3 = shufflevector <2 x i32> %0, <2 x i32> %1, <20 x i32> <i32 0, i32 1, i32 2 , i32 1, i32 1, i32 0, i32 0, i32 0, i32 1, i32 2, i32 1, i32 1, i32 2, i32 0, i 32 1, i32 0, i32 1, i32 0, i32 0, i32 0>
769 ret <20 x i32> %3
770 }
771 ; CHECK-LABEL: define <4 x i32> @shuffle_2xi32_to_20xi32_9(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>)
772 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 0 , i32 1, i32 4, i32 1>
773 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %4, <4 x i32> undef, <4 x i32> <i3 2 1, i32 0, i32 0, i32 0>
774 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 1 , i32 4, i32 1, i32 1>
775 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 0, i32 4, i32 5, i32 4>
776 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %4, <4 x i32> undef, <4 x i32> <i 32 1, i32 0, i32 0, i32 0>
777 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %0, align 16
778 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %1, align 16
779 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %2, align 16
780 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %3, align 16
781 ; CHECK-NEXT: ret <4 x i32> %7
782
783 define <2 x i32> @shuffle_4xi32_to_2xi32_0(<4 x i32>, <4 x i32>) {
784 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <2 x i32> <i32 6, i32 4>
785 ret <2 x i32> %3
786 }
787 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_2xi32_0(<4 x i32>, <4 x i32>)
788 ; CHECK-NEXT: %3 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i3 2 2, i32 0, i32 0, i32 0>
789 ; CHECK-NEXT: ret <4 x i32> %3
790
791 define <2 x i32> @shuffle_4xi32_to_2xi32_1(<4 x i32>, <4 x i32>) {
792 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <2 x i32> <i32 0, i32 5>
793 ret <2 x i32> %3
794 }
795 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_2xi32_1(<4 x i32>, <4 x i32>)
796 ; CHECK-NEXT: %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <4 x i32> <i32 0 , i32 5, i32 5, i32 5>
797 ; CHECK-NEXT: ret <4 x i32> %3
798
799 define <2 x i32> @shuffle_4xi32_to_2xi32_2(<4 x i32>, <4 x i32>) {
800 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <2 x i32> <i32 6, i32 4>
801 ret <2 x i32> %3
802 }
803 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_2xi32_2(<4 x i32>, <4 x i32>)
804 ; CHECK-NEXT: %3 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i3 2 2, i32 0, i32 0, i32 0>
805 ; CHECK-NEXT: ret <4 x i32> %3
806
807 define <2 x i32> @shuffle_4xi32_to_2xi32_3(<4 x i32>, <4 x i32>) {
808 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <2 x i32> <i32 5, i32 5>
809 ret <2 x i32> %3
810 }
811 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_2xi32_3(<4 x i32>, <4 x i32>)
812 ; CHECK-NEXT: %3 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i3 2 1, i32 1, i32 1, i32 1>
813 ; CHECK-NEXT: ret <4 x i32> %3
814
815 define <2 x i32> @shuffle_4xi32_to_2xi32_4(<4 x i32>, <4 x i32>) {
816 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <2 x i32> <i32 3, i32 3>
817 ret <2 x i32> %3
818 }
819 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_2xi32_4(<4 x i32>, <4 x i32>)
820 ; CHECK-NEXT: %3 = shufflevector <4 x i32> %0, <4 x i32> undef, <4 x i32> <i3 2 3, i32 3, i32 3, i32 3>
821 ; CHECK-NEXT: ret <4 x i32> %3
822
823 define <2 x i32> @shuffle_4xi32_to_2xi32_5(<4 x i32>, <4 x i32>) {
824 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <2 x i32> <i32 2, i32 4>
825 ret <2 x i32> %3
826 }
827 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_2xi32_5(<4 x i32>, <4 x i32>)
828 ; CHECK-NEXT: %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <4 x i32> <i32 2 , i32 4, i32 4, i32 4>
829 ; CHECK-NEXT: ret <4 x i32> %3
830
831 define <2 x i32> @shuffle_4xi32_to_2xi32_6(<4 x i32>, <4 x i32>) {
832 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <2 x i32> <i32 1, i32 6>
833 ret <2 x i32> %3
834 }
835 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_2xi32_6(<4 x i32>, <4 x i32>)
836 ; CHECK-NEXT: %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <4 x i32> <i32 1 , i32 6, i32 6, i32 6>
837 ; CHECK-NEXT: ret <4 x i32> %3
838
839 define <2 x i32> @shuffle_4xi32_to_2xi32_7(<4 x i32>, <4 x i32>) {
840 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <2 x i32> <i32 0, i32 1>
841 ret <2 x i32> %3
842 }
843 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_2xi32_7(<4 x i32>, <4 x i32>)
844 ; CHECK-NEXT: ret <4 x i32> %0
845
846 define <2 x i32> @shuffle_4xi32_to_2xi32_8(<4 x i32>, <4 x i32>) {
847 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <2 x i32> <i32 0, i32 4>
848 ret <2 x i32> %3
849 }
850 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_2xi32_8(<4 x i32>, <4 x i32>)
851 ; CHECK-NEXT: %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <4 x i32> <i32 0 , i32 4, i32 4, i32 4>
852 ; CHECK-NEXT: ret <4 x i32> %3
853
854 define <2 x i32> @shuffle_4xi32_to_2xi32_9(<4 x i32>, <4 x i32>) {
855 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <2 x i32> <i32 2, i32 5>
856 ret <2 x i32> %3
857 }
858 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_2xi32_9(<4 x i32>, <4 x i32>)
859 ; CHECK-NEXT: %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <4 x i32> <i32 2 , i32 5, i32 5, i32 5>
860 ; CHECK-NEXT: ret <4 x i32> %3
861
862 define <4 x i32> @shuffle_4xi32_to_4xi32_0(<4 x i32>, <4 x i32>) {
863 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <4 x i32> <i32 3, i32 6, i32 6, i32 1>
864 ret <4 x i32> %3
865 }
866 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_4xi32_0(<4 x i32>, <4 x i32>)
867 ; CHECK-NEXT: %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <4 x i32> <i32 3 , i32 6, i32 6, i32 1>
868 ; CHECK-NEXT: ret <4 x i32> %3
869
870 define <4 x i32> @shuffle_4xi32_to_4xi32_1(<4 x i32>, <4 x i32>) {
871 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <4 x i32> <i32 3, i32 2, i32 3, i32 3>
872 ret <4 x i32> %3
873 }
874 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_4xi32_1(<4 x i32>, <4 x i32>)
875 ; CHECK-NEXT: %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <4 x i32> <i32 3 , i32 2, i32 3, i32 3>
876 ; CHECK-NEXT: ret <4 x i32> %3
877
878 define <4 x i32> @shuffle_4xi32_to_4xi32_2(<4 x i32>, <4 x i32>) {
879 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <4 x i32> <i32 1, i32 4, i32 1, i32 4>
880 ret <4 x i32> %3
881 }
882 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_4xi32_2(<4 x i32>, <4 x i32>)
883 ; CHECK-NEXT: %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <4 x i32> <i32 1 , i32 4, i32 1, i32 4>
884 ; CHECK-NEXT: ret <4 x i32> %3
885
886 define <4 x i32> @shuffle_4xi32_to_4xi32_3(<4 x i32>, <4 x i32>) {
887 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <4 x i32> <i32 0, i32 5, i32 3, i32 5>
888 ret <4 x i32> %3
889 }
890 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_4xi32_3(<4 x i32>, <4 x i32>)
891 ; CHECK-NEXT: %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <4 x i32> <i32 0 , i32 5, i32 3, i32 5>
892 ; CHECK-NEXT: ret <4 x i32> %3
893
894 define <4 x i32> @shuffle_4xi32_to_4xi32_4(<4 x i32>, <4 x i32>) {
895 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <4 x i32> <i32 6, i32 1, i32 5, i32 0>
896 ret <4 x i32> %3
897 }
898 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_4xi32_4(<4 x i32>, <4 x i32>)
899 ; CHECK-NEXT: %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <4 x i32> <i32 6 , i32 1, i32 5, i32 0>
900 ; CHECK-NEXT: ret <4 x i32> %3
901
902 define <4 x i32> @shuffle_4xi32_to_4xi32_5(<4 x i32>, <4 x i32>) {
903 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <4 x i32> <i32 1, i32 3, i32 5, i32 6>
904 ret <4 x i32> %3
905 }
906 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_4xi32_5(<4 x i32>, <4 x i32>)
907 ; CHECK-NEXT: %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <4 x i32> <i32 1 , i32 3, i32 5, i32 6>
908 ; CHECK-NEXT: ret <4 x i32> %3
909
910 define <4 x i32> @shuffle_4xi32_to_4xi32_6(<4 x i32>, <4 x i32>) {
911 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <4 x i32> <i32 6, i32 0, i32 0, i32 2>
912 ret <4 x i32> %3
913 }
914 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_4xi32_6(<4 x i32>, <4 x i32>)
915 ; CHECK-NEXT: %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <4 x i32> <i32 6 , i32 0, i32 0, i32 2>
916 ; CHECK-NEXT: ret <4 x i32> %3
917
918 define <4 x i32> @shuffle_4xi32_to_4xi32_7(<4 x i32>, <4 x i32>) {
919 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <4 x i32> <i32 3, i32 2, i32 6, i32 3>
920 ret <4 x i32> %3
921 }
922 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_4xi32_7(<4 x i32>, <4 x i32>)
923 ; CHECK-NEXT: %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <4 x i32> <i32 3 , i32 2, i32 6, i32 3>
924 ; CHECK-NEXT: ret <4 x i32> %3
925
926 define <4 x i32> @shuffle_4xi32_to_4xi32_8(<4 x i32>, <4 x i32>) {
927 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <4 x i32> <i32 3, i32 5, i32 3, i32 6>
928 ret <4 x i32> %3
929 }
930 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_4xi32_8(<4 x i32>, <4 x i32>)
931 ; CHECK-NEXT: %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <4 x i32> <i32 3 , i32 5, i32 3, i32 6>
932 ; CHECK-NEXT: ret <4 x i32> %3
933
934 define <4 x i32> @shuffle_4xi32_to_4xi32_9(<4 x i32>, <4 x i32>) {
935 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <4 x i32> <i32 1, i32 3, i32 0, i32 0>
936 ret <4 x i32> %3
937 }
938 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_4xi32_9(<4 x i32>, <4 x i32>)
939 ; CHECK-NEXT: %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <4 x i32> <i32 1 , i32 3, i32 0, i32 0>
940 ; CHECK-NEXT: ret <4 x i32> %3
941
942 define <6 x i32> @shuffle_4xi32_to_6xi32_0(<4 x i32>, <4 x i32>) {
943 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <6 x i32> <i32 0, i32 6, i32 2, i32 2, i32 4, i32 2>
944 ret <6 x i32> %3
945 }
946 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_6xi32_0(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
947 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 0 , i32 6, i32 2, i32 2>
948 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 0 , i32 6, i32 6, i32 6>
949 ; CHECK-NEXT: store <4 x i32> %5, <4 x i32>* %0, align 16
950 ; CHECK-NEXT: ret <4 x i32> %4
951
952 define <6 x i32> @shuffle_4xi32_to_6xi32_1(<4 x i32>, <4 x i32>) {
953 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <6 x i32> <i32 6, i32 2, i32 6, i32 3, i32 4, i32 0>
954 ret <6 x i32> %3
955 }
956 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_6xi32_1(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
957 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 2 , i32 6, i32 2, i32 7>
958 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 0 , i32 4, i32 4, i32 4>
959 ; CHECK-NEXT: store <4 x i32> %5, <4 x i32>* %0, align 16
960 ; CHECK-NEXT: ret <4 x i32> %4
961
962 define <6 x i32> @shuffle_4xi32_to_6xi32_2(<4 x i32>, <4 x i32>) {
963 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <6 x i32> <i32 6, i32 3, i32 0, i32 6, i32 6, i32 0>
964 ret <6 x i32> %3
965 }
966 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_6xi32_2(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
967 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 2 , i32 7, i32 4, i32 2>
968 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 2 , i32 4, i32 4, i32 4>
969 ; CHECK-NEXT: store <4 x i32> %5, <4 x i32>* %0, align 16
970 ; CHECK-NEXT: ret <4 x i32> %4
971
972 define <6 x i32> @shuffle_4xi32_to_6xi32_3(<4 x i32>, <4 x i32>) {
973 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <6 x i32> <i32 1, i32 2, i32 0, i32 0, i32 4, i32 4>
974 ret <6 x i32> %3
975 }
976 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_6xi32_3(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
977 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i3 2 1, i32 2, i32 0, i32 0>
978 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> undef, <4 x i32> zer oinitializer
979 ; CHECK-NEXT: store <4 x i32> %5, <4 x i32>* %0, align 16
980 ; CHECK-NEXT: ret <4 x i32> %4
981
982 define <6 x i32> @shuffle_4xi32_to_6xi32_4(<4 x i32>, <4 x i32>) {
983 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <6 x i32> <i32 5, i32 6, i32 2, i32 0, i32 0, i32 3>
984 ret <6 x i32> %3
985 }
986 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_6xi32_4(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
987 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 1 , i32 2, i32 6, i32 4>
988 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i3 2 0, i32 3, i32 3, i32 3>
989 ; CHECK-NEXT: store <4 x i32> %5, <4 x i32>* %0, align 16
990 ; CHECK-NEXT: ret <4 x i32> %4
991
992 define <6 x i32> @shuffle_4xi32_to_6xi32_5(<4 x i32>, <4 x i32>) {
993 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <6 x i32> <i32 6, i32 0, i32 5, i32 4, i32 0, i32 2>
994 ret <6 x i32> %3
995 }
996 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_6xi32_5(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
997 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 2 , i32 4, i32 1, i32 0>
998 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i3 2 0, i32 2, i32 2, i32 2>
999 ; CHECK-NEXT: store <4 x i32> %5, <4 x i32>* %0, align 16
1000 ; CHECK-NEXT: ret <4 x i32> %4
1001
1002 define <6 x i32> @shuffle_4xi32_to_6xi32_6(<4 x i32>, <4 x i32>) {
1003 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <6 x i32> <i32 0, i32 3, i32 3, i32 1, i32 5, i32 4>
1004 ret <6 x i32> %3
1005 }
1006 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_6xi32_6(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
1007 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i3 2 0, i32 3, i32 3, i32 1>
1008 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> undef, <4 x i32> <i3 2 1, i32 0, i32 0, i32 0>
1009 ; CHECK-NEXT: store <4 x i32> %5, <4 x i32>* %0, align 16
1010 ; CHECK-NEXT: ret <4 x i32> %4
1011
1012 define <6 x i32> @shuffle_4xi32_to_6xi32_7(<4 x i32>, <4 x i32>) {
1013 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <6 x i32> <i32 6, i32 0, i32 2, i32 2, i32 2, i32 5>
1014 ret <6 x i32> %3
1015 }
1016 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_6xi32_7(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
1017 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 2 , i32 4, i32 6, i32 6>
1018 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 2 , i32 5, i32 5, i32 5>
1019 ; CHECK-NEXT: store <4 x i32> %5, <4 x i32>* %0, align 16
1020 ; CHECK-NEXT: ret <4 x i32> %4
1021
1022 define <6 x i32> @shuffle_4xi32_to_6xi32_8(<4 x i32>, <4 x i32>) {
1023 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <6 x i32> <i32 2, i32 5, i32 2, i32 6, i32 3, i32 4>
1024 ret <6 x i32> %3
1025 }
1026 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_6xi32_8(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
1027 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 2 , i32 5, i32 2, i32 6>
1028 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 3 , i32 4, i32 4, i32 4>
1029 ; CHECK-NEXT: store <4 x i32> %5, <4 x i32>* %0, align 16
1030 ; CHECK-NEXT: ret <4 x i32> %4
1031
1032 define <6 x i32> @shuffle_4xi32_to_6xi32_9(<4 x i32>, <4 x i32>) {
1033 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <6 x i32> <i32 1, i32 0, i32 3, i32 5, i32 3, i32 1>
1034 ret <6 x i32> %3
1035 }
1036 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_6xi32_9(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
1037 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 1 , i32 0, i32 3, i32 5>
1038 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i3 2 3, i32 1, i32 1, i32 1>
1039 ; CHECK-NEXT: store <4 x i32> %5, <4 x i32>* %0, align 16
1040 ; CHECK-NEXT: ret <4 x i32> %4
1041
1042 define <8 x i32> @shuffle_4xi32_to_8xi32_0(<4 x i32>, <4 x i32>) {
1043 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <8 x i32> <i32 5, i32 2, i32 4, i32 1, i32 5, i32 3, i32 1, i32 2>
1044 ret <8 x i32> %3
1045 }
1046 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_8xi32_0(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
1047 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 1 , i32 6, i32 0, i32 5>
1048 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 1 , i32 7, i32 5, i32 6>
1049 ; CHECK-NEXT: store <4 x i32> %5, <4 x i32>* %0, align 16
1050 ; CHECK-NEXT: ret <4 x i32> %4
1051
1052 define <8 x i32> @shuffle_4xi32_to_8xi32_1(<4 x i32>, <4 x i32>) {
1053 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <8 x i32> <i32 1, i32 0, i32 6, i32 1, i32 4, i32 4, i32 6, i32 4>
1054 ret <8 x i32> %3
1055 }
1056 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_8xi32_1(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
1057 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 1 , i32 0, i32 6, i32 1>
1058 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> undef, <4 x i32> <i3 2 0, i32 0, i32 2, i32 0>
1059 ; CHECK-NEXT: store <4 x i32> %5, <4 x i32>* %0, align 16
1060 ; CHECK-NEXT: ret <4 x i32> %4
1061
1062 define <8 x i32> @shuffle_4xi32_to_8xi32_2(<4 x i32>, <4 x i32>) {
1063 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <8 x i32> <i32 0, i32 4, i32 4, i32 0, i32 2, i32 1, i32 1, i32 5>
1064 ret <8 x i32> %3
1065 }
1066 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_8xi32_2(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
1067 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 0 , i32 4, i32 4, i32 0>
1068 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 2 , i32 1, i32 1, i32 5>
1069 ; CHECK-NEXT: store <4 x i32> %5, <4 x i32>* %0, align 16
1070 ; CHECK-NEXT: ret <4 x i32> %4
1071
1072 define <8 x i32> @shuffle_4xi32_to_8xi32_3(<4 x i32>, <4 x i32>) {
1073 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <8 x i32> <i32 6, i32 6, i32 0, i32 0, i32 4, i32 6, i32 3, i32 6>
1074 ret <8 x i32> %3
1075 }
1076 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_8xi32_3(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
1077 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 2 , i32 2, i32 4, i32 4>
1078 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 0 , i32 2, i32 7, i32 2>
1079 ; CHECK-NEXT: store <4 x i32> %5, <4 x i32>* %0, align 16
1080 ; CHECK-NEXT: ret <4 x i32> %4
1081
1082 define <8 x i32> @shuffle_4xi32_to_8xi32_4(<4 x i32>, <4 x i32>) {
1083 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <8 x i32> <i32 5, i32 0, i32 5, i32 5, i32 5, i32 5, i32 0, i32 1>
1084 ret <8 x i32> %3
1085 }
1086 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_8xi32_4(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
1087 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 1 , i32 4, i32 1, i32 1>
1088 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 1 , i32 1, i32 4, i32 5>
1089 ; CHECK-NEXT: store <4 x i32> %5, <4 x i32>* %0, align 16
1090 ; CHECK-NEXT: ret <4 x i32> %4
1091
1092 define <8 x i32> @shuffle_4xi32_to_8xi32_5(<4 x i32>, <4 x i32>) {
1093 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <8 x i32> <i32 5, i32 5, i32 4, i32 0, i32 2, i32 5, i32 3, i32 0>
1094 ret <8 x i32> %3
1095 }
1096 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_8xi32_5(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
1097 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 1 , i32 1, i32 0, i32 4>
1098 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 2 , i32 5, i32 3, i32 0>
1099 ; CHECK-NEXT: store <4 x i32> %5, <4 x i32>* %0, align 16
1100 ; CHECK-NEXT: ret <4 x i32> %4
1101
1102 define <8 x i32> @shuffle_4xi32_to_8xi32_6(<4 x i32>, <4 x i32>) {
1103 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <8 x i32> <i32 3, i32 5, i32 0, i32 6, i32 5, i32 6, i32 5, i32 3>
1104 ret <8 x i32> %3
1105 }
1106 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_8xi32_6(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
1107 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 3 , i32 5, i32 0, i32 6>
1108 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 1 , i32 2, i32 1, i32 7>
1109 ; CHECK-NEXT: store <4 x i32> %5, <4 x i32>* %0, align 16
1110 ; CHECK-NEXT: ret <4 x i32> %4
1111
1112 define <8 x i32> @shuffle_4xi32_to_8xi32_7(<4 x i32>, <4 x i32>) {
1113 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <8 x i32> <i32 3, i32 5, i32 1, i32 2, i32 5, i32 1, i32 5, i32 0>
1114 ret <8 x i32> %3
1115 }
1116 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_8xi32_7(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
1117 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 3 , i32 5, i32 1, i32 2>
1118 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 1 , i32 5, i32 1, i32 4>
1119 ; CHECK-NEXT: store <4 x i32> %5, <4 x i32>* %0, align 16
1120 ; CHECK-NEXT: ret <4 x i32> %4
1121
1122 define <8 x i32> @shuffle_4xi32_to_8xi32_8(<4 x i32>, <4 x i32>) {
1123 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <8 x i32> <i32 6, i32 5, i32 1, i32 6, i32 3, i32 5, i32 2, i32 5>
1124 ret <8 x i32> %3
1125 }
1126 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_8xi32_8(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
1127 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 2 , i32 1, i32 5, i32 2>
1128 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 3 , i32 5, i32 2, i32 5>
1129 ; CHECK-NEXT: store <4 x i32> %5, <4 x i32>* %0, align 16
1130 ; CHECK-NEXT: ret <4 x i32> %4
1131
1132 define <8 x i32> @shuffle_4xi32_to_8xi32_9(<4 x i32>, <4 x i32>) {
1133 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <8 x i32> <i32 3, i32 6, i32 3, i32 3, i32 5, i32 1, i32 5, i32 2>
1134 ret <8 x i32> %3
1135 }
1136 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_8xi32_9(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>)
1137 ; CHECK-NEXT: %4 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 3 , i32 6, i32 3, i32 3>
1138 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 1 , i32 5, i32 1, i32 6>
1139 ; CHECK-NEXT: store <4 x i32> %5, <4 x i32>* %0, align 16
1140 ; CHECK-NEXT: ret <4 x i32> %4
1141
1142 define <12 x i32> @shuffle_4xi32_to_12xi32_0(<4 x i32>, <4 x i32>) {
1143 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <12 x i32> <i32 5, i32 5, i32 4 , i32 3, i32 0, i32 0, i32 3, i32 0, i32 6, i32 4, i32 0, i32 3>
1144 ret <12 x i32> %3
1145 }
1146 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_12xi32_0(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>)
1147 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 1 , i32 1, i32 0, i32 7>
1148 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %2, <4 x i32> undef, <4 x i32> <i3 2 0, i32 0, i32 3, i32 0>
1149 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 2 , i32 0, i32 4, i32 7>
1150 ; CHECK-NEXT: store <4 x i32> %6, <4 x i32>* %0, align 16
1151 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %1, align 16
1152 ; CHECK-NEXT: ret <4 x i32> %5
1153
1154 define <12 x i32> @shuffle_4xi32_to_12xi32_1(<4 x i32>, <4 x i32>) {
1155 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <12 x i32> <i32 3, i32 1, i32 5 , i32 4, i32 1, i32 5, i32 6, i32 2, i32 4, i32 5, i32 6, i32 5>
1156 ret <12 x i32> %3
1157 }
1158 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_12xi32_1(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>)
1159 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 3 , i32 1, i32 5, i32 4>
1160 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 1 , i32 5, i32 6, i32 2>
1161 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %3, <4 x i32> undef, <4 x i32> <i3 2 0, i32 1, i32 2, i32 1>
1162 ; CHECK-NEXT: store <4 x i32> %6, <4 x i32>* %0, align 16
1163 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %1, align 16
1164 ; CHECK-NEXT: ret <4 x i32> %5
1165
1166 define <12 x i32> @shuffle_4xi32_to_12xi32_2(<4 x i32>, <4 x i32>) {
1167 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <12 x i32> <i32 4, i32 4, i32 1 , i32 0, i32 3, i32 5, i32 0, i32 4, i32 1, i32 3, i32 3, i32 4>
1168 ret <12 x i32> %3
1169 }
1170 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_12xi32_2(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>)
1171 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 0 , i32 0, i32 5, i32 4>
1172 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 3 , i32 5, i32 0, i32 4>
1173 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 1 , i32 3, i32 3, i32 4>
1174 ; CHECK-NEXT: store <4 x i32> %6, <4 x i32>* %0, align 16
1175 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %1, align 16
1176 ; CHECK-NEXT: ret <4 x i32> %5
1177
1178 define <12 x i32> @shuffle_4xi32_to_12xi32_3(<4 x i32>, <4 x i32>) {
1179 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <12 x i32> <i32 5, i32 2, i32 3 , i32 4, i32 2, i32 6, i32 3, i32 6, i32 5, i32 2, i32 5, i32 0>
1180 ret <12 x i32> %3
1181 }
1182 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_12xi32_3(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>)
1183 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 1 , i32 6, i32 7, i32 0>
1184 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 2 , i32 6, i32 3, i32 6>
1185 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 1 , i32 6, i32 1, i32 4>
1186 ; CHECK-NEXT: store <4 x i32> %6, <4 x i32>* %0, align 16
1187 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %1, align 16
1188 ; CHECK-NEXT: ret <4 x i32> %5
1189
1190 define <12 x i32> @shuffle_4xi32_to_12xi32_4(<4 x i32>, <4 x i32>) {
1191 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <12 x i32> <i32 1, i32 6, i32 5 , i32 6, i32 2, i32 4, i32 3, i32 1, i32 2, i32 5, i32 5, i32 6>
1192 ret <12 x i32> %3
1193 }
1194 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_12xi32_4(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>)
1195 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 1 , i32 6, i32 5, i32 6>
1196 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 2 , i32 4, i32 3, i32 1>
1197 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 2 , i32 5, i32 5, i32 6>
1198 ; CHECK-NEXT: store <4 x i32> %6, <4 x i32>* %0, align 16
1199 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %1, align 16
1200 ; CHECK-NEXT: ret <4 x i32> %5
1201
1202 define <12 x i32> @shuffle_4xi32_to_12xi32_5(<4 x i32>, <4 x i32>) {
1203 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <12 x i32> <i32 1, i32 1, i32 2 , i32 1, i32 5, i32 3, i32 2, i32 6, i32 3, i32 2, i32 2, i32 1>
1204 ret <12 x i32> %3
1205 }
1206 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_12xi32_5(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>)
1207 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> undef, <4 x i32> <i3 2 1, i32 1, i32 2, i32 1>
1208 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 1 , i32 7, i32 6, i32 2>
1209 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %2, <4 x i32> undef, <4 x i32> <i3 2 3, i32 2, i32 2, i32 1>
1210 ; CHECK-NEXT: store <4 x i32> %6, <4 x i32>* %0, align 16
1211 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %1, align 16
1212 ; CHECK-NEXT: ret <4 x i32> %5
1213
1214 define <12 x i32> @shuffle_4xi32_to_12xi32_6(<4 x i32>, <4 x i32>) {
1215 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <12 x i32> <i32 1, i32 2, i32 6 , i32 0, i32 2, i32 1, i32 1, i32 3, i32 0, i32 5, i32 2, i32 6>
1216 ret <12 x i32> %3
1217 }
1218 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_12xi32_6(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>)
1219 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 1 , i32 2, i32 6, i32 0>
1220 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %2, <4 x i32> undef, <4 x i32> <i3 2 2, i32 1, i32 1, i32 3>
1221 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 0 , i32 5, i32 2, i32 6>
1222 ; CHECK-NEXT: store <4 x i32> %6, <4 x i32>* %0, align 16
1223 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %1, align 16
1224 ; CHECK-NEXT: ret <4 x i32> %5
1225
1226 define <12 x i32> @shuffle_4xi32_to_12xi32_7(<4 x i32>, <4 x i32>) {
1227 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <12 x i32> <i32 3, i32 2, i32 1 , i32 4, i32 1, i32 6, i32 4, i32 6, i32 5, i32 0, i32 3, i32 6>
1228 ret <12 x i32> %3
1229 }
1230 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_12xi32_7(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>)
1231 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 3 , i32 2, i32 1, i32 4>
1232 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 1 , i32 6, i32 4, i32 6>
1233 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 1 , i32 4, i32 7, i32 2>
1234 ; CHECK-NEXT: store <4 x i32> %6, <4 x i32>* %0, align 16
1235 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %1, align 16
1236 ; CHECK-NEXT: ret <4 x i32> %5
1237
1238 define <12 x i32> @shuffle_4xi32_to_12xi32_8(<4 x i32>, <4 x i32>) {
1239 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <12 x i32> <i32 0, i32 3, i32 1 , i32 1, i32 4, i32 1, i32 2, i32 3, i32 0, i32 5, i32 5, i32 3>
1240 ret <12 x i32> %3
1241 }
1242 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_12xi32_8(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>)
1243 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> undef, <4 x i32> <i3 2 0, i32 3, i32 1, i32 1>
1244 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 0 , i32 5, i32 6, i32 7>
1245 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 0 , i32 5, i32 5, i32 3>
1246 ; CHECK-NEXT: store <4 x i32> %6, <4 x i32>* %0, align 16
1247 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %1, align 16
1248 ; CHECK-NEXT: ret <4 x i32> %5
1249
1250 define <12 x i32> @shuffle_4xi32_to_12xi32_9(<4 x i32>, <4 x i32>) {
1251 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <12 x i32> <i32 4, i32 0, i32 4 , i32 2, i32 3, i32 0, i32 2, i32 2, i32 0, i32 4, i32 3, i32 4>
1252 ret <12 x i32> %3
1253 }
1254 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_12xi32_9(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>)
1255 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 0 , i32 4, i32 0, i32 6>
1256 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %2, <4 x i32> undef, <4 x i32> <i3 2 3, i32 0, i32 2, i32 2>
1257 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 0 , i32 4, i32 3, i32 4>
1258 ; CHECK-NEXT: store <4 x i32> %6, <4 x i32>* %0, align 16
1259 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %1, align 16
1260 ; CHECK-NEXT: ret <4 x i32> %5
1261
1262 define <16 x i32> @shuffle_4xi32_to_16xi32_0(<4 x i32>, <4 x i32>) {
1263 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <16 x i32> <i32 0, i32 6, i32 5 , i32 3, i32 0, i32 2, i32 4, i32 2, i32 3, i32 2, i32 2, i32 6, i32 5, i32 3, i 32 2, i32 4>
1264 ret <16 x i32> %3
1265 }
1266 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_16xi32_0(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>)
1267 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 0 , i32 6, i32 5, i32 3>
1268 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 0 , i32 2, i32 4, i32 2>
1269 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 3 , i32 2, i32 2, i32 6>
1270 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 1 , i32 7, i32 6, i32 0>
1271 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
1272 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %1, align 16
1273 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %2, align 16
1274 ; CHECK-NEXT: ret <4 x i32> %6
1275
1276 define <16 x i32> @shuffle_4xi32_to_16xi32_1(<4 x i32>, <4 x i32>) {
1277 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <16 x i32> <i32 4, i32 0, i32 6 , i32 2, i32 5, i32 6, i32 6, i32 0, i32 5, i32 3, i32 1, i32 1, i32 6, i32 0, i 32 0, i32 4>
1278 ret <16 x i32> %3
1279 }
1280 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_16xi32_1(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>)
1281 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 0 , i32 4, i32 2, i32 6>
1282 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 1 , i32 2, i32 2, i32 4>
1283 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 1 , i32 7, i32 5, i32 5>
1284 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 2 , i32 4, i32 4, i32 0>
1285 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
1286 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %1, align 16
1287 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %2, align 16
1288 ; CHECK-NEXT: ret <4 x i32> %6
1289
1290 define <16 x i32> @shuffle_4xi32_to_16xi32_2(<4 x i32>, <4 x i32>) {
1291 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <16 x i32> <i32 1, i32 3, i32 4 , i32 4, i32 4, i32 4, i32 1, i32 3, i32 2, i32 3, i32 5, i32 5, i32 2, i32 5, i 32 4, i32 0>
1292 ret <16 x i32> %3
1293 }
1294 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_16xi32_2(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>)
1295 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 1 , i32 3, i32 4, i32 4>
1296 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 0 , i32 0, i32 5, i32 7>
1297 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 2 , i32 3, i32 5, i32 5>
1298 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 2 , i32 5, i32 4, i32 0>
1299 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
1300 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %1, align 16
1301 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %2, align 16
1302 ; CHECK-NEXT: ret <4 x i32> %6
1303
1304 define <16 x i32> @shuffle_4xi32_to_16xi32_3(<4 x i32>, <4 x i32>) {
1305 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <16 x i32> <i32 1, i32 2, i32 1 , i32 5, i32 2, i32 2, i32 5, i32 0, i32 0, i32 0, i32 4, i32 2, i32 0, i32 1, i 32 4, i32 2>
1306 ret <16 x i32> %3
1307 }
1308 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_16xi32_3(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>)
1309 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 1 , i32 2, i32 1, i32 5>
1310 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 2 , i32 2, i32 5, i32 0>
1311 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 0 , i32 0, i32 4, i32 2>
1312 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 0 , i32 1, i32 4, i32 2>
1313 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
1314 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %1, align 16
1315 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %2, align 16
1316 ; CHECK-NEXT: ret <4 x i32> %6
1317
1318 define <16 x i32> @shuffle_4xi32_to_16xi32_4(<4 x i32>, <4 x i32>) {
1319 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <16 x i32> <i32 5, i32 3, i32 3 , i32 4, i32 6, i32 3, i32 6, i32 1, i32 0, i32 6, i32 0, i32 6, i32 0, i32 1, i 32 0, i32 3>
1320 ret <16 x i32> %3
1321 }
1322 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_16xi32_4(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>)
1323 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 1 , i32 7, i32 7, i32 0>
1324 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 2 , i32 7, i32 2, i32 5>
1325 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 0 , i32 6, i32 0, i32 6>
1326 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %3, <4 x i32> undef, <4 x i32> <i3 2 0, i32 1, i32 0, i32 3>
1327 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
1328 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %1, align 16
1329 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %2, align 16
1330 ; CHECK-NEXT: ret <4 x i32> %6
1331
1332 define <16 x i32> @shuffle_4xi32_to_16xi32_5(<4 x i32>, <4 x i32>) {
1333 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <16 x i32> <i32 6, i32 6, i32 6 , i32 0, i32 0, i32 2, i32 5, i32 5, i32 5, i32 4, i32 0, i32 2, i32 1, i32 5, i 32 2, i32 0>
1334 ret <16 x i32> %3
1335 }
1336 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_16xi32_5(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>)
1337 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 2 , i32 2, i32 2, i32 4>
1338 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 0 , i32 2, i32 5, i32 5>
1339 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 1 , i32 0, i32 4, i32 6>
1340 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 1 , i32 5, i32 2, i32 0>
1341 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
1342 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %1, align 16
1343 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %2, align 16
1344 ; CHECK-NEXT: ret <4 x i32> %6
1345
1346 define <16 x i32> @shuffle_4xi32_to_16xi32_6(<4 x i32>, <4 x i32>) {
1347 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <16 x i32> <i32 4, i32 2, i32 6 , i32 2, i32 1, i32 3, i32 0, i32 4, i32 6, i32 4, i32 2, i32 6, i32 6, i32 5, i 32 1, i32 2>
1348 ret <16 x i32> %3
1349 }
1350 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_16xi32_6(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>)
1351 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 0 , i32 6, i32 2, i32 6>
1352 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 1 , i32 3, i32 0, i32 4>
1353 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 2 , i32 0, i32 6, i32 2>
1354 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 2 , i32 1, i32 5, i32 6>
1355 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
1356 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %1, align 16
1357 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %2, align 16
1358 ; CHECK-NEXT: ret <4 x i32> %6
1359
1360 define <16 x i32> @shuffle_4xi32_to_16xi32_7(<4 x i32>, <4 x i32>) {
1361 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <16 x i32> <i32 4, i32 6, i32 6 , i32 6, i32 0, i32 1, i32 4, i32 3, i32 1, i32 3, i32 2, i32 1, i32 1, i32 2, i 32 2, i32 2>
1362 ret <16 x i32> %3
1363 }
1364 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_16xi32_7(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>)
1365 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %4, <4 x i32> undef, <4 x i32> <i3 2 0, i32 2, i32 2, i32 2>
1366 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 0 , i32 1, i32 4, i32 3>
1367 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %3, <4 x i32> undef, <4 x i32> <i3 2 1, i32 3, i32 2, i32 1>
1368 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %3, <4 x i32> undef, <4 x i32> <i3 2 1, i32 2, i32 2, i32 2>
1369 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
1370 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %1, align 16
1371 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %2, align 16
1372 ; CHECK-NEXT: ret <4 x i32> %6
1373
1374 define <16 x i32> @shuffle_4xi32_to_16xi32_8(<4 x i32>, <4 x i32>) {
1375 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <16 x i32> <i32 0, i32 6, i32 1 , i32 5, i32 0, i32 2, i32 1, i32 5, i32 0, i32 4, i32 2, i32 1, i32 4, i32 6, i 32 6, i32 2>
1376 ret <16 x i32> %3
1377 }
1378 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_16xi32_8(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>)
1379 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 0 , i32 6, i32 1, i32 5>
1380 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 0 , i32 2, i32 1, i32 5>
1381 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 0 , i32 4, i32 2, i32 1>
1382 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 0 , i32 2, i32 2, i32 6>
1383 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
1384 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %1, align 16
1385 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %2, align 16
1386 ; CHECK-NEXT: ret <4 x i32> %6
1387
1388 define <16 x i32> @shuffle_4xi32_to_16xi32_9(<4 x i32>, <4 x i32>) {
1389 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <16 x i32> <i32 5, i32 6, i32 0 , i32 3, i32 6, i32 5, i32 6, i32 0, i32 6, i32 0, i32 5, i32 5, i32 2, i32 0, i 32 3, i32 6>
1390 ret <16 x i32> %3
1391 }
1392 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_16xi32_9(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>)
1393 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 1 , i32 2, i32 4, i32 7>
1394 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 2 , i32 1, i32 2, i32 4>
1395 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 2 , i32 4, i32 1, i32 1>
1396 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 2 , i32 0, i32 3, i32 6>
1397 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
1398 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %1, align 16
1399 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %2, align 16
1400 ; CHECK-NEXT: ret <4 x i32> %6
1401
1402 define <20 x i32> @shuffle_4xi32_to_20xi32_0(<4 x i32>, <4 x i32>) {
1403 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <20 x i32> <i32 6, i32 1, i32 4 , i32 6, i32 4, i32 2, i32 2, i32 3, i32 0, i32 4, i32 2, i32 1, i32 4, i32 4, i 32 3, i32 4, i32 3, i32 1, i32 2, i32 1>
1404 ret <20 x i32> %3
1405 }
1406 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_20xi32_0(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>)
1407 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 2 , i32 5, i32 0, i32 2>
1408 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 0 , i32 6, i32 6, i32 7>
1409 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 0 , i32 4, i32 2, i32 1>
1410 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 0, i32 0, i32 7, i32 0>
1411 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %4, <4 x i32> undef, <4 x i32> <i 32 3, i32 1, i32 2, i32 1>
1412 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %0, align 16
1413 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %1, align 16
1414 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %2, align 16
1415 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %3, align 16
1416 ; CHECK-NEXT: ret <4 x i32> %7
1417
1418 define <20 x i32> @shuffle_4xi32_to_20xi32_1(<4 x i32>, <4 x i32>) {
1419 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <20 x i32> <i32 1, i32 4, i32 6 , i32 1, i32 2, i32 1, i32 5, i32 2, i32 5, i32 4, i32 1, i32 6, i32 4, i32 3, i 32 4, i32 3, i32 6, i32 6, i32 6, i32 3>
1420 ret <20 x i32> %3
1421 }
1422 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_20xi32_1(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>)
1423 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 1 , i32 4, i32 6, i32 1>
1424 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 2 , i32 1, i32 5, i32 2>
1425 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 1 , i32 0, i32 5, i32 2>
1426 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 0, i32 7, i32 0, i32 7>
1427 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 2, i32 2, i32 2, i32 7>
1428 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %0, align 16
1429 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %1, align 16
1430 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %2, align 16
1431 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %3, align 16
1432 ; CHECK-NEXT: ret <4 x i32> %7
1433
1434 define <20 x i32> @shuffle_4xi32_to_20xi32_2(<4 x i32>, <4 x i32>) {
1435 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <20 x i32> <i32 6, i32 2, i32 2 , i32 5, i32 6, i32 2, i32 3, i32 3, i32 2, i32 0, i32 3, i32 2, i32 0, i32 2, i 32 4, i32 5, i32 1, i32 0, i32 3, i32 3>
1436 ret <20 x i32> %3
1437 }
1438 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_20xi32_2(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>)
1439 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 2 , i32 6, i32 6, i32 1>
1440 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 2 , i32 6, i32 7, i32 7>
1441 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %4, <4 x i32> undef, <4 x i32> <i3 2 2, i32 0, i32 3, i32 2>
1442 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 0, i32 2, i32 4, i32 5>
1443 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %4, <4 x i32> undef, <4 x i32> <i 32 1, i32 0, i32 3, i32 3>
1444 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %0, align 16
1445 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %1, align 16
1446 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %2, align 16
1447 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %3, align 16
1448 ; CHECK-NEXT: ret <4 x i32> %7
1449
1450 define <20 x i32> @shuffle_4xi32_to_20xi32_3(<4 x i32>, <4 x i32>) {
1451 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <20 x i32> <i32 0, i32 0, i32 0 , i32 5, i32 6, i32 2, i32 0, i32 3, i32 0, i32 4, i32 2, i32 4, i32 0, i32 0, i 32 3, i32 6, i32 4, i32 6, i32 5, i32 1>
1452 ret <20 x i32> %3
1453 }
1454 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_20xi32_3(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>)
1455 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 0 , i32 0, i32 0, i32 5>
1456 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 2 , i32 6, i32 4, i32 7>
1457 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 0 , i32 4, i32 2, i32 4>
1458 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 0, i32 0, i32 3, i32 6>
1459 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 0, i32 2, i32 1, i32 5>
1460 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %0, align 16
1461 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %1, align 16
1462 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %2, align 16
1463 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %3, align 16
1464 ; CHECK-NEXT: ret <4 x i32> %7
1465
1466 define <20 x i32> @shuffle_4xi32_to_20xi32_4(<4 x i32>, <4 x i32>) {
1467 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <20 x i32> <i32 2, i32 5, i32 4 , i32 3, i32 1, i32 6, i32 4, i32 3, i32 2, i32 1, i32 2, i32 1, i32 0, i32 5, i 32 6, i32 3, i32 1, i32 0, i32 6, i32 3>
1468 ret <20 x i32> %3
1469 }
1470 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_20xi32_4(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>)
1471 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 2 , i32 5, i32 4, i32 3>
1472 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 1 , i32 6, i32 4, i32 3>
1473 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %4, <4 x i32> undef, <4 x i32> <i3 2 2, i32 1, i32 2, i32 1>
1474 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 0, i32 5, i32 6, i32 3>
1475 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 1, i32 0, i32 6, i32 3>
1476 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %0, align 16
1477 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %1, align 16
1478 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %2, align 16
1479 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %3, align 16
1480 ; CHECK-NEXT: ret <4 x i32> %7
1481
1482 define <20 x i32> @shuffle_4xi32_to_20xi32_5(<4 x i32>, <4 x i32>) {
1483 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <20 x i32> <i32 3, i32 2, i32 4 , i32 5, i32 5, i32 4, i32 3, i32 2, i32 4, i32 2, i32 2, i32 2, i32 0, i32 0, i 32 0, i32 4, i32 4, i32 2, i32 1, i32 0>
1484 ret <20 x i32> %3
1485 }
1486 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_20xi32_5(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>)
1487 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 3 , i32 2, i32 4, i32 5>
1488 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 1 , i32 0, i32 7, i32 6>
1489 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 0 , i32 6, i32 6, i32 6>
1490 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 0, i32 0, i32 0, i32 4>
1491 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 0, i32 6, i32 5, i32 4>
1492 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %0, align 16
1493 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %1, align 16
1494 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %2, align 16
1495 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %3, align 16
1496 ; CHECK-NEXT: ret <4 x i32> %7
1497
1498 define <20 x i32> @shuffle_4xi32_to_20xi32_6(<4 x i32>, <4 x i32>) {
1499 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <20 x i32> <i32 5, i32 5, i32 3 , i32 0, i32 6, i32 5, i32 2, i32 1, i32 0, i32 2, i32 1, i32 2, i32 5, i32 2, i 32 2, i32 4, i32 4, i32 6, i32 1, i32 3>
1500 ret <20 x i32> %3
1501 }
1502 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_20xi32_6(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>)
1503 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 1 , i32 1, i32 7, i32 4>
1504 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 2 , i32 1, i32 6, i32 5>
1505 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %4, <4 x i32> undef, <4 x i32> <i3 2 0, i32 2, i32 1, i32 2>
1506 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 1, i32 6, i32 6, i32 0>
1507 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 0, i32 2, i32 5, i32 7>
1508 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %0, align 16
1509 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %1, align 16
1510 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %2, align 16
1511 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %3, align 16
1512 ; CHECK-NEXT: ret <4 x i32> %7
1513
1514 define <20 x i32> @shuffle_4xi32_to_20xi32_7(<4 x i32>, <4 x i32>) {
1515 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <20 x i32> <i32 3, i32 6, i32 1 , i32 4, i32 1, i32 3, i32 5, i32 0, i32 6, i32 6, i32 2, i32 0, i32 3, i32 0, i 32 6, i32 5, i32 1, i32 0, i32 1, i32 6>
1516 ret <20 x i32> %3
1517 }
1518 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_20xi32_7(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>)
1519 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 3 , i32 6, i32 1, i32 4>
1520 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 1 , i32 3, i32 5, i32 0>
1521 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 2 , i32 2, i32 6, i32 4>
1522 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 3, i32 0, i32 6, i32 5>
1523 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 1, i32 0, i32 1, i32 6>
1524 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %0, align 16
1525 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %1, align 16
1526 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %2, align 16
1527 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %3, align 16
1528 ; CHECK-NEXT: ret <4 x i32> %7
1529
1530 define <20 x i32> @shuffle_4xi32_to_20xi32_8(<4 x i32>, <4 x i32>) {
1531 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <20 x i32> <i32 6, i32 3, i32 5 , i32 6, i32 5, i32 1, i32 6, i32 6, i32 2, i32 0, i32 6, i32 3, i32 2, i32 1, i 32 0, i32 6, i32 0, i32 0, i32 6, i32 3>
1532 ret <20 x i32> %3
1533 }
1534 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_20xi32_8(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>)
1535 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 2 , i32 7, i32 1, i32 2>
1536 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 1 , i32 5, i32 2, i32 2>
1537 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 2 , i32 0, i32 6, i32 3>
1538 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 2, i32 1, i32 0, i32 6>
1539 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 0, i32 0, i32 6, i32 3>
1540 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %0, align 16
1541 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %1, align 16
1542 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %2, align 16
1543 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %3, align 16
1544 ; CHECK-NEXT: ret <4 x i32> %7
1545
1546 define <20 x i32> @shuffle_4xi32_to_20xi32_9(<4 x i32>, <4 x i32>) {
1547 %3 = shufflevector <4 x i32> %0, <4 x i32> %1, <20 x i32> <i32 2, i32 5, i32 1 , i32 2, i32 0, i32 3, i32 5, i32 4, i32 4, i32 2, i32 3, i32 2, i32 5, i32 0, i 32 0, i32 6, i32 4, i32 2, i32 3, i32 4>
1548 ret <20 x i32> %3
1549 }
1550 ; CHECK-LABEL: define <4 x i32> @shuffle_4xi32_to_20xi32_9(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>)
1551 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 2 , i32 5, i32 1, i32 2>
1552 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 0 , i32 3, i32 5, i32 4>
1553 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 0 , i32 6, i32 7, i32 6>
1554 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 1, i32 4, i32 4, i32 2>
1555 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 0, i32 6, i32 7, i32 0>
1556 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %0, align 16
1557 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %1, align 16
1558 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %2, align 16
1559 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %3, align 16
1560 ; CHECK-NEXT: ret <4 x i32> %7
1561
1562 define <2 x i32> @shuffle_6xi32_to_2xi32_0(<6 x i32>, <6 x i32>) {
1563 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <2 x i32> <i32 7, i32 3>
1564 ret <2 x i32> %3
1565 }
1566 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_2xi32_0(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1567 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> %0, <4 x i32> <i32 1 , i32 7, i32 7, i32 7>
1568 ; CHECK-NEXT: ret <4 x i32> %5
1569
1570 define <2 x i32> @shuffle_6xi32_to_2xi32_1(<6 x i32>, <6 x i32>) {
1571 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <2 x i32> <i32 6, i32 4>
1572 ret <2 x i32> %3
1573 }
1574 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_2xi32_1(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1575 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 0 , i32 4, i32 4, i32 4>
1576 ; CHECK-NEXT: ret <4 x i32> %5
1577
1578 define <2 x i32> @shuffle_6xi32_to_2xi32_2(<6 x i32>, <6 x i32>) {
1579 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <2 x i32> <i32 9, i32 3>
1580 ret <2 x i32> %3
1581 }
1582 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_2xi32_2(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1583 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> %0, <4 x i32> <i32 3 , i32 7, i32 7, i32 7>
1584 ; CHECK-NEXT: ret <4 x i32> %5
1585
1586 define <2 x i32> @shuffle_6xi32_to_2xi32_3(<6 x i32>, <6 x i32>) {
1587 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <2 x i32> <i32 7, i32 4>
1588 ret <2 x i32> %3
1589 }
1590 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_2xi32_3(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1591 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 1 , i32 4, i32 4, i32 4>
1592 ; CHECK-NEXT: ret <4 x i32> %5
1593
1594 define <2 x i32> @shuffle_6xi32_to_2xi32_4(<6 x i32>, <6 x i32>) {
1595 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <2 x i32> <i32 5, i32 9>
1596 ret <2 x i32> %3
1597 }
1598 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_2xi32_4(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1599 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 1 , i32 7, i32 7, i32 7>
1600 ; CHECK-NEXT: ret <4 x i32> %5
1601
1602 define <2 x i32> @shuffle_6xi32_to_2xi32_5(<6 x i32>, <6 x i32>) {
1603 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <2 x i32> <i32 0, i32 3>
1604 ret <2 x i32> %3
1605 }
1606 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_2xi32_5(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1607 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %0, <4 x i32> undef, <4 x i32> <i3 2 0, i32 3, i32 3, i32 3>
1608 ; CHECK-NEXT: ret <4 x i32> %5
1609
1610 define <2 x i32> @shuffle_6xi32_to_2xi32_6(<6 x i32>, <6 x i32>) {
1611 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <2 x i32> <i32 3, i32 7>
1612 ret <2 x i32> %3
1613 }
1614 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_2xi32_6(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1615 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %0, <4 x i32> %2, <4 x i32> <i32 3 , i32 5, i32 5, i32 5>
1616 ; CHECK-NEXT: ret <4 x i32> %5
1617
1618 define <2 x i32> @shuffle_6xi32_to_2xi32_7(<6 x i32>, <6 x i32>) {
1619 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <2 x i32> <i32 4, i32 1>
1620 ret <2 x i32> %3
1621 }
1622 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_2xi32_7(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1623 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %1, <4 x i32> %0, <4 x i32> <i32 0 , i32 5, i32 5, i32 5>
1624 ; CHECK-NEXT: ret <4 x i32> %5
1625
1626 define <2 x i32> @shuffle_6xi32_to_2xi32_8(<6 x i32>, <6 x i32>) {
1627 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <2 x i32> <i32 6, i32 3>
1628 ret <2 x i32> %3
1629 }
1630 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_2xi32_8(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1631 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> %0, <4 x i32> <i32 0 , i32 7, i32 7, i32 7>
1632 ; CHECK-NEXT: ret <4 x i32> %5
1633
1634 define <2 x i32> @shuffle_6xi32_to_2xi32_9(<6 x i32>, <6 x i32>) {
1635 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <2 x i32> <i32 7, i32 9>
1636 ret <2 x i32> %3
1637 }
1638 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_2xi32_9(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1639 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> undef, <4 x i32> <i3 2 1, i32 3, i32 3, i32 3>
1640 ; CHECK-NEXT: ret <4 x i32> %5
1641
1642 define <4 x i32> @shuffle_6xi32_to_4xi32_0(<6 x i32>, <6 x i32>) {
1643 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <4 x i32> <i32 9, i32 3, i32 5, i32 2>
1644 ret <4 x i32> %3
1645 }
1646 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_4xi32_0(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1647 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> %0, <4 x i32> <i32 3 , i32 7, i32 7, i32 7>
1648 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %5, <4 x i32> %1, <4 x i32> <i32 0 , i32 1, i32 5, i32 5>
1649 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %6, <4 x i32> %0, <4 x i32> <i32 0 , i32 1, i32 2, i32 6>
1650 ; CHECK-NEXT: ret <4 x i32> %7
1651
1652 define <4 x i32> @shuffle_6xi32_to_4xi32_1(<6 x i32>, <6 x i32>) {
1653 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <4 x i32> <i32 9, i32 0, i32 6, i32 4>
1654 ret <4 x i32> %3
1655 }
1656 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_4xi32_1(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1657 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> %0, <4 x i32> <i32 3 , i32 4, i32 0, i32 0>
1658 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %5, <4 x i32> %1, <4 x i32> <i32 0 , i32 1, i32 2, i32 4>
1659 ; CHECK-NEXT: ret <4 x i32> %6
1660
1661 define <4 x i32> @shuffle_6xi32_to_4xi32_2(<6 x i32>, <6 x i32>) {
1662 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <4 x i32> <i32 6, i32 3, i32 8, i32 0>
1663 ret <4 x i32> %3
1664 }
1665 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_4xi32_2(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1666 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> %0, <4 x i32> <i32 0 , i32 7, i32 2, i32 4>
1667 ; CHECK-NEXT: ret <4 x i32> %5
1668
1669 define <4 x i32> @shuffle_6xi32_to_4xi32_3(<6 x i32>, <6 x i32>) {
1670 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <4 x i32> <i32 8, i32 10, i32 4 , i32 6>
1671 ret <4 x i32> %3
1672 }
1673 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_4xi32_3(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1674 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 2 , i32 4, i32 4, i32 4>
1675 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %5, <4 x i32> %1, <4 x i32> <i32 0 , i32 1, i32 4, i32 4>
1676 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %6, <4 x i32> %2, <4 x i32> <i32 0 , i32 1, i32 2, i32 4>
1677 ; CHECK-NEXT: ret <4 x i32> %7
1678
1679 define <4 x i32> @shuffle_6xi32_to_4xi32_4(<6 x i32>, <6 x i32>) {
1680 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <4 x i32> <i32 1, i32 3, i32 0, i32 6>
1681 ret <4 x i32> %3
1682 }
1683 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_4xi32_4(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1684 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %0, <4 x i32> %2, <4 x i32> <i32 1 , i32 3, i32 0, i32 4>
1685 ; CHECK-NEXT: ret <4 x i32> %5
1686
1687 define <4 x i32> @shuffle_6xi32_to_4xi32_5(<6 x i32>, <6 x i32>) {
1688 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <4 x i32> <i32 1, i32 10, i32 9 , i32 3>
1689 ret <4 x i32> %3
1690 }
1691 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_4xi32_5(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1692 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %0, <4 x i32> %3, <4 x i32> <i32 1 , i32 4, i32 4, i32 4>
1693 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %5, <4 x i32> %2, <4 x i32> <i32 0 , i32 1, i32 7, i32 7>
1694 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %6, <4 x i32> %0, <4 x i32> <i32 0 , i32 1, i32 2, i32 7>
1695 ; CHECK-NEXT: ret <4 x i32> %7
1696
1697 define <4 x i32> @shuffle_6xi32_to_4xi32_6(<6 x i32>, <6 x i32>) {
1698 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <4 x i32> <i32 6, i32 10, i32 0 , i32 1>
1699 ret <4 x i32> %3
1700 }
1701 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_4xi32_6(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1702 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 0 , i32 4, i32 4, i32 4>
1703 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %5, <4 x i32> %0, <4 x i32> <i32 0 , i32 1, i32 4, i32 5>
1704 ; CHECK-NEXT: ret <4 x i32> %6
1705
1706 define <4 x i32> @shuffle_6xi32_to_4xi32_7(<6 x i32>, <6 x i32>) {
1707 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <4 x i32> <i32 7, i32 5, i32 6, i32 2>
1708 ret <4 x i32> %3
1709 }
1710 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_4xi32_7(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1711 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 1 , i32 5, i32 0, i32 0>
1712 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %5, <4 x i32> %0, <4 x i32> <i32 0 , i32 1, i32 2, i32 6>
1713 ; CHECK-NEXT: ret <4 x i32> %6
1714
1715 define <4 x i32> @shuffle_6xi32_to_4xi32_8(<6 x i32>, <6 x i32>) {
1716 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <4 x i32> <i32 8, i32 6, i32 4, i32 5>
1717 ret <4 x i32> %3
1718 }
1719 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_4xi32_8(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1720 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 2 , i32 0, i32 4, i32 5>
1721 ; CHECK-NEXT: ret <4 x i32> %5
1722
1723 define <4 x i32> @shuffle_6xi32_to_4xi32_9(<6 x i32>, <6 x i32>) {
1724 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <4 x i32> <i32 1, i32 7, i32 0, i32 5>
1725 ret <4 x i32> %3
1726 }
1727 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_4xi32_9(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1728 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %0, <4 x i32> %2, <4 x i32> <i32 1 , i32 5, i32 0, i32 0>
1729 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %5, <4 x i32> %1, <4 x i32> <i32 0 , i32 1, i32 2, i32 5>
1730 ; CHECK-NEXT: ret <4 x i32> %6
1731
1732 define <6 x i32> @shuffle_6xi32_to_6xi32_0(<6 x i32>, <6 x i32>) {
1733 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <6 x i32> <i32 2, i32 0, i32 6, i32 10, i32 5, i32 7>
1734 ret <6 x i32> %3
1735 }
1736 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_6xi32_0(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1737 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %1, <4 x i32> %3, <4 x i32> <i32 2 , i32 0, i32 4, i32 4>
1738 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %6, <4 x i32> %4, <4 x i32> <i32 0 , i32 1, i32 2, i32 4>
1739 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 1 , i32 5, i32 5, i32 5>
1740 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %0, align 16
1741 ; CHECK-NEXT: ret <4 x i32> %7
1742
1743 define <6 x i32> @shuffle_6xi32_to_6xi32_1(<6 x i32>, <6 x i32>) {
1744 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <6 x i32> <i32 7, i32 7, i32 3, i32 8, i32 8, i32 10>
1745 ret <6 x i32> %3
1746 }
1747 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_6xi32_1(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1748 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %3, <4 x i32> %1, <4 x i32> <i32 1 , i32 1, i32 7, i32 2>
1749 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 2 , i32 4, i32 4, i32 4>
1750 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
1751 ; CHECK-NEXT: ret <4 x i32> %6
1752
1753 define <6 x i32> @shuffle_6xi32_to_6xi32_2(<6 x i32>, <6 x i32>) {
1754 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <6 x i32> <i32 1, i32 5, i32 4, i32 0, i32 7, i32 4>
1755 ret <6 x i32> %3
1756 }
1757 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_6xi32_2(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1758 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 1 , i32 5, i32 4, i32 0>
1759 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 1 , i32 4, i32 4, i32 4>
1760 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
1761 ; CHECK-NEXT: ret <4 x i32> %6
1762
1763 define <6 x i32> @shuffle_6xi32_to_6xi32_3(<6 x i32>, <6 x i32>) {
1764 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <6 x i32> <i32 8, i32 2, i32 0, i32 3, i32 7, i32 0>
1765 ret <6 x i32> %3
1766 }
1767 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_6xi32_3(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1768 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %3, <4 x i32> %1, <4 x i32> <i32 2 , i32 6, i32 4, i32 7>
1769 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %3, <4 x i32> %1, <4 x i32> <i32 1 , i32 4, i32 4, i32 4>
1770 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
1771 ; CHECK-NEXT: ret <4 x i32> %6
1772
1773 define <6 x i32> @shuffle_6xi32_to_6xi32_4(<6 x i32>, <6 x i32>) {
1774 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <6 x i32> <i32 3, i32 5, i32 1, i32 4, i32 7, i32 4>
1775 ret <6 x i32> %3
1776 }
1777 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_6xi32_4(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1778 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 3 , i32 5, i32 1, i32 4>
1779 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 1 , i32 4, i32 4, i32 4>
1780 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
1781 ; CHECK-NEXT: ret <4 x i32> %6
1782
1783 define <6 x i32> @shuffle_6xi32_to_6xi32_5(<6 x i32>, <6 x i32>) {
1784 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <6 x i32> <i32 8, i32 4, i32 3, i32 7, i32 3, i32 2>
1785 ret <6 x i32> %3
1786 }
1787 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_6xi32_5(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1788 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 2 , i32 4, i32 4, i32 4>
1789 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %6, <4 x i32> %1, <4 x i32> <i32 0 , i32 1, i32 7, i32 7>
1790 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %7, <4 x i32> %3, <4 x i32> <i32 0 , i32 1, i32 2, i32 5>
1791 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i3 2 3, i32 2, i32 2, i32 2>
1792 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %0, align 16
1793 ; CHECK-NEXT: ret <4 x i32> %8
1794
1795 define <6 x i32> @shuffle_6xi32_to_6xi32_6(<6 x i32>, <6 x i32>) {
1796 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <6 x i32> <i32 4, i32 3, i32 0, i32 0, i32 8, i32 5>
1797 ret <6 x i32> %3
1798 }
1799 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_6xi32_6(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1800 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 0 , i32 7, i32 4, i32 4>
1801 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 2 , i32 5, i32 5, i32 5>
1802 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
1803 ; CHECK-NEXT: ret <4 x i32> %6
1804
1805 define <6 x i32> @shuffle_6xi32_to_6xi32_7(<6 x i32>, <6 x i32>) {
1806 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <6 x i32> <i32 0, i32 2, i32 4, i32 0, i32 6, i32 2>
1807 ret <6 x i32> %3
1808 }
1809 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_6xi32_7(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1810 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 0 , i32 2, i32 4, i32 0>
1811 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %3, <4 x i32> %1, <4 x i32> <i32 0 , i32 6, i32 6, i32 6>
1812 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
1813 ; CHECK-NEXT: ret <4 x i32> %6
1814
1815 define <6 x i32> @shuffle_6xi32_to_6xi32_8(<6 x i32>, <6 x i32>) {
1816 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <6 x i32> <i32 9, i32 1, i32 0, i32 10, i32 1, i32 5>
1817 ret <6 x i32> %3
1818 }
1819 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_6xi32_8(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1820 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %3, <4 x i32> %1, <4 x i32> <i32 3 , i32 5, i32 4, i32 4>
1821 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %6, <4 x i32> %4, <4 x i32> <i32 0 , i32 1, i32 2, i32 4>
1822 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 1 , i32 5, i32 5, i32 5>
1823 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %0, align 16
1824 ; CHECK-NEXT: ret <4 x i32> %7
1825
1826 define <6 x i32> @shuffle_6xi32_to_6xi32_9(<6 x i32>, <6 x i32>) {
1827 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <6 x i32> <i32 6, i32 8, i32 3, i32 10, i32 3, i32 3>
1828 ret <6 x i32> %3
1829 }
1830 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_6xi32_9(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1831 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %3, <4 x i32> %1, <4 x i32> <i32 0 , i32 2, i32 7, i32 7>
1832 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %6, <4 x i32> %4, <4 x i32> <i32 0 , i32 1, i32 2, i32 4>
1833 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i3 2 3, i32 3, i32 3, i32 3>
1834 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %0, align 16
1835 ; CHECK-NEXT: ret <4 x i32> %7
1836
1837 define <8 x i32> @shuffle_6xi32_to_8xi32_0(<6 x i32>, <6 x i32>) {
1838 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <8 x i32> <i32 0, i32 5, i32 7, i32 9, i32 10, i32 3, i32 6, i32 9>
1839 ret <8 x i32> %3
1840 }
1841 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_8xi32_0(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1842 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 0 , i32 5, i32 5, i32 5>
1843 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %6, <4 x i32> %3, <4 x i32> <i32 0 , i32 1, i32 5, i32 7>
1844 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %4, <4 x i32> %1, <4 x i32> <i32 0 , i32 7, i32 7, i32 7>
1845 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %3, <4 x i32> <i32 0 , i32 1, i32 4, i32 7>
1846 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %0, align 16
1847 ; CHECK-NEXT: ret <4 x i32> %7
1848
1849 define <8 x i32> @shuffle_6xi32_to_8xi32_1(<6 x i32>, <6 x i32>) {
1850 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <8 x i32> <i32 0, i32 7, i32 9, i32 2, i32 3, i32 5, i32 5, i32 9>
1851 ret <8 x i32> %3
1852 }
1853 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_8xi32_1(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1854 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %1, <4 x i32> %3, <4 x i32> <i32 0 , i32 5, i32 7, i32 2>
1855 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 3 , i32 5, i32 5, i32 5>
1856 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %7, <4 x i32> %3, <4 x i32> <i32 0 , i32 1, i32 2, i32 7>
1857 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %0, align 16
1858 ; CHECK-NEXT: ret <4 x i32> %6
1859
1860 define <8 x i32> @shuffle_6xi32_to_8xi32_2(<6 x i32>, <6 x i32>) {
1861 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <8 x i32> <i32 4, i32 1, i32 10 , i32 1, i32 1, i32 5, i32 3, i32 4>
1862 ret <8 x i32> %3
1863 }
1864 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_8xi32_2(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1865 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 0 , i32 5, i32 5, i32 5>
1866 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %6, <4 x i32> %4, <4 x i32> <i32 0 , i32 1, i32 4, i32 4>
1867 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %7, <4 x i32> %1, <4 x i32> <i32 0 , i32 1, i32 2, i32 5>
1868 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 1 , i32 5, i32 3, i32 4>
1869 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %0, align 16
1870 ; CHECK-NEXT: ret <4 x i32> %8
1871
1872 define <8 x i32> @shuffle_6xi32_to_8xi32_3(<6 x i32>, <6 x i32>) {
1873 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <8 x i32> <i32 0, i32 8, i32 6, i32 4, i32 5, i32 2, i32 6, i32 9>
1874 ret <8 x i32> %3
1875 }
1876 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_8xi32_3(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1877 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %1, <4 x i32> %3, <4 x i32> <i32 0 , i32 6, i32 4, i32 4>
1878 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %6, <4 x i32> %2, <4 x i32> <i32 0 , i32 1, i32 2, i32 4>
1879 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 1 , i32 6, i32 6, i32 6>
1880 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %3, <4 x i32> <i32 0 , i32 1, i32 4, i32 7>
1881 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %0, align 16
1882 ; CHECK-NEXT: ret <4 x i32> %7
1883
1884 define <8 x i32> @shuffle_6xi32_to_8xi32_4(<6 x i32>, <6 x i32>) {
1885 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <8 x i32> <i32 1, i32 3, i32 0, i32 2, i32 9, i32 10, i32 1, i32 5>
1886 ret <8 x i32> %3
1887 }
1888 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_8xi32_4(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1889 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i3 2 1, i32 3, i32 0, i32 2>
1890 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 3 , i32 4, i32 4, i32 4>
1891 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %7, <4 x i32> %1, <4 x i32> <i32 0 , i32 1, i32 5, i32 5>
1892 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %2, <4 x i32> <i32 0 , i32 1, i32 2, i32 5>
1893 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %0, align 16
1894 ; CHECK-NEXT: ret <4 x i32> %6
1895
1896 define <8 x i32> @shuffle_6xi32_to_8xi32_5(<6 x i32>, <6 x i32>) {
1897 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <8 x i32> <i32 7, i32 6, i32 8, i32 6, i32 7, i32 4, i32 5, i32 8>
1898 ret <8 x i32> %3
1899 }
1900 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_8xi32_5(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1901 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %3, <4 x i32> undef, <4 x i32> <i3 2 1, i32 0, i32 2, i32 0>
1902 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 1 , i32 4, i32 5, i32 2>
1903 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
1904 ; CHECK-NEXT: ret <4 x i32> %6
1905
1906 define <8 x i32> @shuffle_6xi32_to_8xi32_6(<6 x i32>, <6 x i32>) {
1907 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <8 x i32> <i32 1, i32 10, i32 0 , i32 1, i32 7, i32 7, i32 5, i32 1>
1908 ret <8 x i32> %3
1909 }
1910 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_8xi32_6(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1911 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %1, <4 x i32> %4, <4 x i32> <i32 1 , i32 4, i32 0, i32 1>
1912 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 1 , i32 1, i32 5, i32 5>
1913 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %7, <4 x i32> %1, <4 x i32> <i32 0 , i32 1, i32 2, i32 5>
1914 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %0, align 16
1915 ; CHECK-NEXT: ret <4 x i32> %6
1916
1917 define <8 x i32> @shuffle_6xi32_to_8xi32_7(<6 x i32>, <6 x i32>) {
1918 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <8 x i32> <i32 1, i32 3, i32 8, i32 6, i32 8, i32 10, i32 6, i32 8>
1919 ret <8 x i32> %3
1920 }
1921 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_8xi32_7(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1922 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %1, <4 x i32> %3, <4 x i32> <i32 1 , i32 3, i32 6, i32 4>
1923 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 2 , i32 4, i32 0, i32 2>
1924 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
1925 ; CHECK-NEXT: ret <4 x i32> %6
1926
1927 define <8 x i32> @shuffle_6xi32_to_8xi32_8(<6 x i32>, <6 x i32>) {
1928 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <8 x i32> <i32 9, i32 2, i32 6, i32 2, i32 8, i32 9, i32 6, i32 3>
1929 ret <8 x i32> %3
1930 }
1931 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_8xi32_8(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1932 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %3, <4 x i32> %1, <4 x i32> <i32 3 , i32 6, i32 0, i32 6>
1933 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %3, <4 x i32> %1, <4 x i32> <i32 2 , i32 3, i32 0, i32 7>
1934 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
1935 ; CHECK-NEXT: ret <4 x i32> %6
1936
1937 define <8 x i32> @shuffle_6xi32_to_8xi32_9(<6 x i32>, <6 x i32>) {
1938 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <8 x i32> <i32 10, i32 3, i32 0 , i32 1, i32 10, i32 3, i32 3, i32 10>
1939 ret <8 x i32> %3
1940 }
1941 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_8xi32_9(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1942 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %4, <4 x i32> %1, <4 x i32> <i32 0 , i32 7, i32 4, i32 5>
1943 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %4, <4 x i32> %1, <4 x i32> <i32 0 , i32 7, i32 7, i32 0>
1944 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
1945 ; CHECK-NEXT: ret <4 x i32> %6
1946
1947 define <12 x i32> @shuffle_6xi32_to_12xi32_0(<6 x i32>, <6 x i32>) {
1948 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <12 x i32> <i32 9, i32 9, i32 6 , i32 2, i32 1, i32 6, i32 1, i32 5, i32 6, i32 1, i32 7, i32 3>
1949 ret <12 x i32> %3
1950 }
1951 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_12xi32_0(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1952 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %4, <4 x i32> %2, <4 x i32> <i32 3 , i32 3, i32 0, i32 6>
1953 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %2, <4 x i32> %4, <4 x i32> <i32 1 , i32 4, i32 1, i32 1>
1954 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %3, <4 x i32> <i32 0 , i32 1, i32 2, i32 5>
1955 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %4, <4 x i32> %2, <4 x i32> <i32 0, i32 5, i32 1, i32 7>
1956 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %0, align 16
1957 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %1, align 16
1958 ; CHECK-NEXT: ret <4 x i32> %7
1959
1960 define <12 x i32> @shuffle_6xi32_to_12xi32_1(<6 x i32>, <6 x i32>) {
1961 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <12 x i32> <i32 3, i32 1, i32 0 , i32 1, i32 2, i32 0, i32 7, i32 10, i32 9, i32 4, i32 5, i32 5>
1962 ret <12 x i32> %3
1963 }
1964 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_12xi32_1(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1965 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %2, <4 x i32> undef, <4 x i32> <i3 2 3, i32 1, i32 0, i32 1>
1966 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %2, <4 x i32> %4, <4 x i32> <i32 2 , i32 0, i32 5, i32 5>
1967 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %5, <4 x i32> <i32 0 , i32 1, i32 2, i32 4>
1968 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 3, i32 4, i32 5, i32 5>
1969 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %0, align 16
1970 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %1, align 16
1971 ; CHECK-NEXT: ret <4 x i32> %7
1972
1973 define <12 x i32> @shuffle_6xi32_to_12xi32_2(<6 x i32>, <6 x i32>) {
1974 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <12 x i32> <i32 7, i32 6, i32 9 , i32 4, i32 4, i32 8, i32 8, i32 0, i32 9, i32 3, i32 9, i32 4>
1975 ret <12 x i32> %3
1976 }
1977 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_12xi32_2(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1978 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 1 , i32 0, i32 3, i32 4>
1979 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 0 , i32 6, i32 6, i32 6>
1980 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %2, <4 x i32> <i32 0 , i32 1, i32 2, i32 4>
1981 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %4, <4 x i32> %2, <4 x i32> <i32 3, i32 7, i32 3, i32 3>
1982 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
1983 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %0, align 16
1984 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
1985 ; CHECK-NEXT: ret <4 x i32> %7
1986
1987 define <12 x i32> @shuffle_6xi32_to_12xi32_3(<6 x i32>, <6 x i32>) {
1988 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <12 x i32> <i32 7, i32 10, i32 8, i32 4, i32 6, i32 9, i32 10, i32 10, i32 5, i32 1, i32 3, i32 0>
1989 ret <12 x i32> %3
1990 }
1991 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_12xi32_3(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
1992 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 1 , i32 4, i32 2, i32 2>
1993 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %7, <4 x i32> %3, <4 x i32> <i32 0 , i32 1, i32 2, i32 4>
1994 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 0 , i32 3, i32 4, i32 4>
1995 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 1, i32 5, i32 7, i32 4>
1996 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %0, align 16
1997 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %1, align 16
1998 ; CHECK-NEXT: ret <4 x i32> %8
1999
2000 define <12 x i32> @shuffle_6xi32_to_12xi32_4(<6 x i32>, <6 x i32>) {
2001 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <12 x i32> <i32 7, i32 1, i32 1 0, i32 3, i32 4, i32 4, i32 2, i32 9, i32 6, i32 4, i32 1, i32 8>
2002 ret <12 x i32> %3
2003 }
2004 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_12xi32_4(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2005 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %4, <4 x i32> %2, <4 x i32> <i32 1 , i32 5, i32 5, i32 5>
2006 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %7, <4 x i32> %5, <4 x i32> <i32 0 , i32 1, i32 4, i32 4>
2007 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %2, <4 x i32> <i32 0 , i32 1, i32 2, i32 7>
2008 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 0, i32 0, i32 6, i32 6>
2009 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
2010 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 0, i32 4, i32 4, i32 4>
2011 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
2012 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
2013 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %0, align 16
2014 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
2015 ; CHECK-NEXT: ret <4 x i32> %9
2016
2017 define <12 x i32> @shuffle_6xi32_to_12xi32_5(<6 x i32>, <6 x i32>) {
2018 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <12 x i32> <i32 4, i32 9, i32 1 0, i32 10, i32 5, i32 1, i32 1, i32 2, i32 5, i32 2, i32 0, i32 2>
2019 ret <12 x i32> %3
2020 }
2021 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_12xi32_5(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2022 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 0 , i32 7, i32 7, i32 7>
2023 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %7, <4 x i32> %5, <4 x i32> <i32 0 , i32 1, i32 4, i32 4>
2024 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 1 , i32 5, i32 5, i32 6>
2025 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 1, i32 6, i32 4, i32 6>
2026 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %0, align 16
2027 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %1, align 16
2028 ; CHECK-NEXT: ret <4 x i32> %8
2029
2030 define <12 x i32> @shuffle_6xi32_to_12xi32_6(<6 x i32>, <6 x i32>) {
2031 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <12 x i32> <i32 1, i32 7, i32 0 , i32 7, i32 7, i32 6, i32 0, i32 0, i32 1, i32 10, i32 2, i32 0>
2032 ret <12 x i32> %3
2033 }
2034 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_12xi32_6(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2035 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %2, <4 x i32> %4, <4 x i32> <i32 1 , i32 5, i32 0, i32 5>
2036 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %4, <4 x i32> %2, <4 x i32> <i32 1 , i32 0, i32 4, i32 4>
2037 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %2, <4 x i32> %5, <4 x i32> <i32 1 , i32 4, i32 2, i32 0>
2038 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %0, align 16
2039 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %1, align 16
2040 ; CHECK-NEXT: ret <4 x i32> %7
2041
2042 define <12 x i32> @shuffle_6xi32_to_12xi32_7(<6 x i32>, <6 x i32>) {
2043 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <12 x i32> <i32 1, i32 4, i32 7 , i32 1, i32 6, i32 2, i32 3, i32 2, i32 0, i32 5, i32 3, i32 5>
2044 ret <12 x i32> %3
2045 }
2046 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_12xi32_7(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2047 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 1 , i32 4, i32 4, i32 4>
2048 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %7, <4 x i32> %4, <4 x i32> <i32 0 , i32 1, i32 5, i32 5>
2049 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %2, <4 x i32> <i32 0 , i32 1, i32 2, i32 5>
2050 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %4, <4 x i32> %2, <4 x i32> <i32 0, i32 6, i32 7, i32 6>
2051 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 0, i32 5, i32 3, i32 5>
2052 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
2053 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
2054 ; CHECK-NEXT: ret <4 x i32> %9
2055
2056 define <12 x i32> @shuffle_6xi32_to_12xi32_8(<6 x i32>, <6 x i32>) {
2057 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <12 x i32> <i32 5, i32 10, i32 5, i32 2, i32 10, i32 7, i32 7, i32 0, i32 0, i32 0, i32 6, i32 9>
2058 ret <12 x i32> %3
2059 }
2060 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_12xi32_8(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2061 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %3, <4 x i32> %5, <4 x i32> <i32 1 , i32 4, i32 1, i32 1>
2062 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %7, <4 x i32> %2, <4 x i32> <i32 0 , i32 1, i32 2, i32 6>
2063 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 0 , i32 5, i32 5, i32 5>
2064 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
2065 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %2, <4 x i32> %4, <4 x i32> <i32 0, i32 0, i32 4, i32 7>
2066 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
2067 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
2068 ; CHECK-NEXT: ret <4 x i32> %8
2069
2070 define <12 x i32> @shuffle_6xi32_to_12xi32_9(<6 x i32>, <6 x i32>) {
2071 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <12 x i32> <i32 6, i32 6, i32 9 , i32 1, i32 8, i32 3, i32 9, i32 10, i32 10, i32 5, i32 6, i32 10>
2072 ret <12 x i32> %3
2073 }
2074 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_12xi32_9(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2075 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %4, <4 x i32> %2, <4 x i32> <i32 0 , i32 0, i32 3, i32 5>
2076 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %4, <4 x i32> %2, <4 x i32> <i32 2 , i32 7, i32 3, i32 3>
2077 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %5, <4 x i32> <i32 0 , i32 1, i32 2, i32 4>
2078 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %5, <4 x i32> %3, <4 x i32> <i32 0, i32 5, i32 5, i32 5>
2079 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
2080 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
2081 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %0, align 16
2082 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %1, align 16
2083 ; CHECK-NEXT: ret <4 x i32> %7
2084
2085 define <16 x i32> @shuffle_6xi32_to_16xi32_0(<6 x i32>, <6 x i32>) {
2086 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <16 x i32> <i32 7, i32 3, i32 9 , i32 5, i32 8, i32 5, i32 2, i32 1, i32 9, i32 5, i32 10, i32 7, i32 5, i32 7, i32 0, i32 3>
2087 ret <16 x i32> %3
2088 }
2089 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_16xi32_0(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32> , <4 x i32>)
2090 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %5, <4 x i32> %3, <4 x i32> <i32 1 , i32 7, i32 3, i32 3>
2091 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %4, <4 x i32> <i32 0 , i32 1, i32 2, i32 5>
2092 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 2, i32 5, i32 5, i32 5>
2093 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 6, i32 5>
2094 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 3, i32 5, i32 5, i32 5>
2095 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
2096 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
2097 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 1, i32 5, i32 5, i32 5>
2098 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 4, i32 7>
2099 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %0, align 16
2100 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
2101 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %2, align 16
2102 ; CHECK-NEXT: ret <4 x i32> %9
2103
2104 define <16 x i32> @shuffle_6xi32_to_16xi32_1(<6 x i32>, <6 x i32>) {
2105 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <16 x i32> <i32 6, i32 7, i32 1 0, i32 3, i32 10, i32 4, i32 2, i32 2, i32 3, i32 7, i32 6, i32 6, i32 9, i32 7, i32 0, i32 6>
2106 ret <16 x i32> %3
2107 }
2108 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_16xi32_1(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32> , <4 x i32>)
2109 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %5, <4 x i32> %6, <4 x i32> <i32 0 , i32 1, i32 4, i32 4>
2110 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %3, <4 x i32> <i32 0 , i32 1, i32 2, i32 7>
2111 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %6, <4 x i32> %4, <4 x i32> <i32 0, i32 4, i32 4, i32 4>
2112 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
2113 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %3, <4 x i32> %5, <4 x i32> <i32 3, i32 5, i32 4, i32 4>
2114 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %5, <4 x i32> %3, <4 x i32> <i32 3, i32 1, i32 4, i32 0>
2115 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %0, align 16
2116 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %1, align 16
2117 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %2, align 16
2118 ; CHECK-NEXT: ret <4 x i32> %9
2119
2120 define <16 x i32> @shuffle_6xi32_to_16xi32_2(<6 x i32>, <6 x i32>) {
2121 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <16 x i32> <i32 4, i32 1, i32 4 , i32 0, i32 7, i32 3, i32 6, i32 4, i32 3, i32 7, i32 7, i32 8, i32 9, i32 4, i 32 2, i32 0>
2122 ret <16 x i32> %3
2123 }
2124 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_16xi32_2(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32> , <4 x i32>)
2125 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 0 , i32 5, i32 0, i32 4>
2126 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %5, <4 x i32> %3, <4 x i32> <i32 1 , i32 7, i32 0, i32 0>
2127 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
2128 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %3, <4 x i32> %5, <4 x i32> <i32 3, i32 5, i32 5, i32 6>
2129 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 3, i32 4, i32 4, i32 4>
2130 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 6, i32 4>
2131 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
2132 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
2133 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %2, align 16
2134 ; CHECK-NEXT: ret <4 x i32> %8
2135
2136 define <16 x i32> @shuffle_6xi32_to_16xi32_3(<6 x i32>, <6 x i32>) {
2137 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <16 x i32> <i32 7, i32 9, i32 8 , i32 3, i32 6, i32 8, i32 0, i32 8, i32 7, i32 10, i32 1, i32 0, i32 4, i32 4, i32 3, i32 9>
2138 ret <16 x i32> %3
2139 }
2140 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_16xi32_3(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32> , <4 x i32>)
2141 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %5, <4 x i32> %3, <4 x i32> <i32 1 , i32 3, i32 2, i32 7>
2142 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %5, <4 x i32> %3, <4 x i32> <i32 0 , i32 2, i32 4, i32 2>
2143 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %5, <4 x i32> %6, <4 x i32> <i32 1, i32 4, i32 4, i32 4>
2144 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 5, i32 4>
2145 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 0, i32 0, i32 7, i32 7>
2146 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
2147 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %0, align 16
2148 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
2149 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %2, align 16
2150 ; CHECK-NEXT: ret <4 x i32> %8
2151
2152 define <16 x i32> @shuffle_6xi32_to_16xi32_4(<6 x i32>, <6 x i32>) {
2153 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <16 x i32> <i32 4, i32 8, i32 8 , i32 5, i32 2, i32 8, i32 8, i32 5, i32 10, i32 7, i32 9, i32 9, i32 5, i32 6, i32 1, i32 4>
2154 ret <16 x i32> %3
2155 }
2156 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_16xi32_4(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32> , <4 x i32>)
2157 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 0 , i32 6, i32 6, i32 1>
2158 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %3, <4 x i32> %5, <4 x i32> <i32 2 , i32 6, i32 6, i32 6>
2159 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
2160 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %6, <4 x i32> %5, <4 x i32> <i32 0, i32 5, i32 7, i32 7>
2161 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 1, i32 4, i32 4, i32 4>
2162 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
2163 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
2164 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
2165 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
2166 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %2, align 16
2167 ; CHECK-NEXT: ret <4 x i32> %8
2168
2169 define <16 x i32> @shuffle_6xi32_to_16xi32_5(<6 x i32>, <6 x i32>) {
2170 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <16 x i32> <i32 0, i32 8, i32 2 , i32 7, i32 6, i32 2, i32 9, i32 6, i32 1, i32 6, i32 6, i32 9, i32 7, i32 2, i 32 5, i32 4>
2171 ret <16 x i32> %3
2172 }
2173 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_16xi32_5(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32> , <4 x i32>)
2174 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %3, <4 x i32> %5, <4 x i32> <i32 0 , i32 6, i32 2, i32 5>
2175 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %5, <4 x i32> %3, <4 x i32> <i32 0 , i32 6, i32 3, i32 0>
2176 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %3, <4 x i32> %5, <4 x i32> <i32 1, i32 4, i32 4, i32 7>
2177 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %5, <4 x i32> %3, <4 x i32> <i32 1, i32 6, i32 6, i32 6>
2178 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 5, i32 4>
2179 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %0, align 16
2180 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %1, align 16
2181 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %2, align 16
2182 ; CHECK-NEXT: ret <4 x i32> %8
2183
2184 define <16 x i32> @shuffle_6xi32_to_16xi32_6(<6 x i32>, <6 x i32>) {
2185 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <16 x i32> <i32 2, i32 4, i32 1 0, i32 0, i32 2, i32 4, i32 8, i32 4, i32 2, i32 6, i32 4, i32 8, i32 4, i32 5, i32 7, i32 10>
2186 ret <16 x i32> %3
2187 }
2188 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_16xi32_6(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32> , <4 x i32>)
2189 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 2 , i32 4, i32 4, i32 4>
2190 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %6, <4 x i32> <i32 0 , i32 1, i32 4, i32 4>
2191 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
2192 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 2, i32 4, i32 4, i32 4>
2193 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
2194 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
2195 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %3, <4 x i32> %5, <4 x i32> <i32 2, i32 4, i32 4, i32 4>
2196 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
2197 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
2198 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
2199 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
2200 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
2201 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %1, align 16
2202 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16
2203 ; CHECK-NEXT: ret <4 x i32> %10
2204
2205 define <16 x i32> @shuffle_6xi32_to_16xi32_7(<6 x i32>, <6 x i32>) {
2206 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <16 x i32> <i32 0, i32 8, i32 3 , i32 0, i32 10, i32 10, i32 6, i32 6, i32 6, i32 8, i32 8, i32 10, i32 3, i32 4 , i32 6, i32 3>
2207 ret <16 x i32> %3
2208 }
2209 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_16xi32_7(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32> , <4 x i32>)
2210 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %3, <4 x i32> %5, <4 x i32> <i32 0 , i32 6, i32 3, i32 0>
2211 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %6, <4 x i32> %5, <4 x i32> <i32 0 , i32 0, i32 4, i32 4>
2212 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %5, <4 x i32> %6, <4 x i32> <i32 0, i32 2, i32 2, i32 4>
2213 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 3, i32 4, i32 4, i32 4>
2214 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
2215 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
2216 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %0, align 16
2217 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %1, align 16
2218 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %2, align 16
2219 ; CHECK-NEXT: ret <4 x i32> %8
2220
2221 define <16 x i32> @shuffle_6xi32_to_16xi32_8(<6 x i32>, <6 x i32>) {
2222 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <16 x i32> <i32 6, i32 0, i32 1 , i32 3, i32 0, i32 2, i32 2, i32 7, i32 8, i32 10, i32 2, i32 2, i32 0, i32 10, i32 8, i32 1>
2223 ret <16 x i32> %3
2224 }
2225 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_16xi32_8(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32> , <4 x i32>)
2226 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %5, <4 x i32> %3, <4 x i32> <i32 0 , i32 4, i32 5, i32 7>
2227 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %3, <4 x i32> %5, <4 x i32> <i32 0 , i32 2, i32 2, i32 5>
2228 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %5, <4 x i32> %6, <4 x i32> <i32 2, i32 4, i32 4, i32 4>
2229 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
2230 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %3, <4 x i32> %6, <4 x i32> <i32 0, i32 4, i32 4, i32 4>
2231 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
2232 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
2233 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %0, align 16
2234 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
2235 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %2, align 16
2236 ; CHECK-NEXT: ret <4 x i32> %8
2237
2238 define <16 x i32> @shuffle_6xi32_to_16xi32_9(<6 x i32>, <6 x i32>) {
2239 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <16 x i32> <i32 4, i32 9, i32 8 , i32 0, i32 3, i32 7, i32 5, i32 2, i32 4, i32 2, i32 5, i32 9, i32 8, i32 0, i 32 6, i32 1>
2240 ret <16 x i32> %3
2241 }
2242 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_16xi32_9(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32> , <4 x i32>)
2243 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 0 , i32 7, i32 6, i32 6>
2244 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %3, <4 x i32> <i32 0 , i32 1, i32 2, i32 4>
2245 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %3, <4 x i32> %5, <4 x i32> <i32 3, i32 5, i32 5, i32 5>
2246 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
2247 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
2248 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 0, i32 6, i32 1, i32 1>
2249 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
2250 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %5, <4 x i32> %3, <4 x i32> <i32 2, i32 4, i32 0, i32 5>
2251 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
2252 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
2253 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16
2254 ; CHECK-NEXT: ret <4 x i32> %9
2255
2256 define <20 x i32> @shuffle_6xi32_to_20xi32_0(<6 x i32>, <6 x i32>) {
2257 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <20 x i32> <i32 7, i32 4, i32 8 , i32 9, i32 7, i32 5, i32 7, i32 5, i32 3, i32 2, i32 1, i32 4, i32 9, i32 4, i 32 8, i32 4, i32 8, i32 6, i32 1, i32 0>
2258 ret <20 x i32> %3
2259 }
2260 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_20xi32_0(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2261 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %6, <4 x i32> %5, <4 x i32> <i32 1 , i32 4, i32 2, i32 3>
2262 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %6, <4 x i32> %5, <4 x i32> <i32 1, i32 5, i32 1, i32 5>
2263 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 3, i32 2, i32 1, i32 4>
2264 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %6, <4 x i32> %5, <4 x i32> <i32 3, i32 4, i32 2, i32 4>
2265 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %6, <4 x i32> %4, <4 x i32> <i32 2, i32 0, i32 5, i32 4>
2266 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
2267 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
2268 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %2, align 16
2269 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %3, align 16
2270 ; CHECK-NEXT: ret <4 x i32> %9
2271
2272 define <20 x i32> @shuffle_6xi32_to_20xi32_1(<6 x i32>, <6 x i32>) {
2273 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <20 x i32> <i32 8, i32 8, i32 1 , i32 0, i32 0, i32 7, i32 10, i32 8, i32 1, i32 6, i32 0, i32 8, i32 3, i32 2, i32 4, i32 7, i32 6, i32 6, i32 7, i32 4>
2274 ret <20 x i32> %3
2275 }
2276 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_20xi32_1(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2277 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %6, <4 x i32> %4, <4 x i32> <i32 2 , i32 2, i32 5, i32 4>
2278 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %4, <4 x i32> %6, <4 x i32> <i32 0, i32 5, i32 5, i32 5>
2279 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
2280 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
2281 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %4, <4 x i32> %6, <4 x i32> <i32 1, i32 4, i32 0, i32 6>
2282 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 3, i32 2, i32 4, i32 4>
2283 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
2284 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %6, <4 x i32> %5, <4 x i32> <i32 0, i32 0, i32 1, i32 4>
2285 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
2286 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %1, align 16
2287 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16
2288 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %3, align 16
2289 ; CHECK-NEXT: ret <4 x i32> %9
2290
2291 define <20 x i32> @shuffle_6xi32_to_20xi32_2(<6 x i32>, <6 x i32>) {
2292 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <20 x i32> <i32 0, i32 5, i32 9 , i32 9, i32 6, i32 5, i32 0, i32 3, i32 10, i32 1, i32 1, i32 10, i32 10, i32 1 0, i32 4, i32 5, i32 4, i32 4, i32 8, i32 7>
2293 ret <20 x i32> %3
2294 }
2295 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_20xi32_2(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2296 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 0 , i32 5, i32 5, i32 5>
2297 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
2298 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %6, <4 x i32> %5, <4 x i32> <i32 0, i32 5, i32 5, i32 5>
2299 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 4, i32 7>
2300 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %7, <4 x i32> %4, <4 x i32> <i32 0, i32 5, i32 5, i32 0>
2301 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %7, <4 x i32> %5, <4 x i32> <i32 0, i32 0, i32 4, i32 5>
2302 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %5, <4 x i32> %6, <4 x i32> <i32 0, i32 0, i32 6, i32 5>
2303 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
2304 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %1, align 16
2305 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %2, align 16
2306 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %3, align 16
2307 ; CHECK-NEXT: ret <4 x i32> %10
2308
2309 define <20 x i32> @shuffle_6xi32_to_20xi32_3(<6 x i32>, <6 x i32>) {
2310 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <20 x i32> <i32 0, i32 3, i32 1 , i32 5, i32 9, i32 7, i32 1, i32 1, i32 5, i32 3, i32 3, i32 10, i32 3, i32 7, i32 3, i32 2, i32 1, i32 2, i32 8, i32 6>
2311 ret <20 x i32> %3
2312 }
2313 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_20xi32_3(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2314 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 0 , i32 3, i32 1, i32 5>
2315 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %6, <4 x i32> %4, <4 x i32> <i32 3, i32 1, i32 5, i32 5>
2316 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 1, i32 7, i32 7, i32 7>
2317 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
2318 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %4, <4 x i32> %6, <4 x i32> <i32 3, i32 5, i32 3, i32 2>
2319 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %4, <4 x i32> %6, <4 x i32> <i32 1, i32 2, i32 6, i32 4>
2320 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
2321 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %1, align 16
2322 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %2, align 16
2323 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %3, align 16
2324 ; CHECK-NEXT: ret <4 x i32> %9
2325
2326 define <20 x i32> @shuffle_6xi32_to_20xi32_4(<6 x i32>, <6 x i32>) {
2327 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <20 x i32> <i32 10, i32 10, i32 2, i32 2, i32 5, i32 4, i32 10, i32 7, i32 6, i32 1, i32 0, i32 9, i32 6, i32 0 , i32 10, i32 6, i32 3, i32 2, i32 3, i32 9>
2328 ret <20 x i32> %3
2329 }
2330 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_20xi32_4(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2331 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %7, <4 x i32> %4, <4 x i32> <i32 0 , i32 0, i32 6, i32 6>
2332 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %5, <4 x i32> %7, <4 x i32> <i32 1, i32 0, i32 4, i32 4>
2333 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
2334 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %6, <4 x i32> %4, <4 x i32> <i32 0, i32 5, i32 4, i32 3>
2335 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %6, <4 x i32> %4, <4 x i32> <i32 0, i32 4, i32 4, i32 4>
2336 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
2337 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
2338 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %4, <4 x i32> %6, <4 x i32> <i32 3, i32 2, i32 3, i32 7>
2339 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %0, align 16
2340 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %1, align 16
2341 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16
2342 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %3, align 16
2343 ; CHECK-NEXT: ret <4 x i32> %9
2344
2345 define <20 x i32> @shuffle_6xi32_to_20xi32_5(<6 x i32>, <6 x i32>) {
2346 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <20 x i32> <i32 7, i32 5, i32 9 , i32 10, i32 10, i32 3, i32 1, i32 4, i32 4, i32 10, i32 7, i32 4, i32 6, i32 1 0, i32 10, i32 1, i32 0, i32 1, i32 1, i32 2>
2347 ret <20 x i32> %3
2348 }
2349 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_20xi32_5(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2350 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %6, <4 x i32> %5, <4 x i32> <i32 1 , i32 5, i32 3, i32 3>
2351 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
2352 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %7, <4 x i32> %4, <4 x i32> <i32 0, i32 7, i32 5, i32 5>
2353 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
2354 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %5, <4 x i32> %7, <4 x i32> <i32 0, i32 4, i32 4, i32 4>
2355 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
2356 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
2357 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %6, <4 x i32> %7, <4 x i32> <i32 0, i32 4, i32 4, i32 4>
2358 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
2359 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %4, <4 x i32> undef, <4 x i32> <i 32 0, i32 1, i32 1, i32 2>
2360 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
2361 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %1, align 16
2362 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %2, align 16
2363 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %3, align 16
2364 ; CHECK-NEXT: ret <4 x i32> %10
2365
2366 define <20 x i32> @shuffle_6xi32_to_20xi32_6(<6 x i32>, <6 x i32>) {
2367 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <20 x i32> <i32 5, i32 1, i32 5 , i32 6, i32 3, i32 8, i32 5, i32 5, i32 0, i32 8, i32 7, i32 5, i32 9, i32 6, i 32 10, i32 10, i32 5, i32 10, i32 8, i32 4>
2368 ret <20 x i32> %3
2369 }
2370 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_20xi32_6(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2371 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 1 , i32 5, i32 1, i32 1>
2372 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
2373 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %4, <4 x i32> %6, <4 x i32> <i32 3, i32 6, i32 6, i32 6>
2374 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
2375 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %4, <4 x i32> %6, <4 x i32> <i32 0, i32 6, i32 5, i32 5>
2376 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
2377 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %6, <4 x i32> %7, <4 x i32> <i32 3, i32 0, i32 4, i32 4>
2378 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %5, <4 x i32> %7, <4 x i32> <i32 1, i32 4, i32 4, i32 4>
2379 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
2380 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
2381 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
2382 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
2383 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16
2384 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %3, align 16
2385 ; CHECK-NEXT: ret <4 x i32> %10
2386
2387 define <20 x i32> @shuffle_6xi32_to_20xi32_7(<6 x i32>, <6 x i32>) {
2388 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <20 x i32> <i32 8, i32 5, i32 7 , i32 8, i32 1, i32 6, i32 1, i32 7, i32 2, i32 10, i32 2, i32 3, i32 8, i32 6, i32 0, i32 1, i32 3, i32 9, i32 4, i32 0>
2389 ret <20 x i32> %3
2390 }
2391 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_20xi32_7(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2392 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %6, <4 x i32> %5, <4 x i32> <i32 2 , i32 5, i32 1, i32 2>
2393 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %4, <4 x i32> %6, <4 x i32> <i32 1, i32 4, i32 1, i32 5>
2394 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %4, <4 x i32> %7, <4 x i32> <i32 2, i32 4, i32 2, i32 3>
2395 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %6, <4 x i32> %4, <4 x i32> <i32 2, i32 0, i32 4, i32 5>
2396 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %4, <4 x i32> %6, <4 x i32> <i32 3, i32 7, i32 7, i32 7>
2397 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
2398 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
2399 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
2400 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
2401 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %2, align 16
2402 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %3, align 16
2403 ; CHECK-NEXT: ret <4 x i32> %9
2404
2405 define <20 x i32> @shuffle_6xi32_to_20xi32_8(<6 x i32>, <6 x i32>) {
2406 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <20 x i32> <i32 1, i32 5, i32 1 0, i32 3, i32 10, i32 3, i32 10, i32 6, i32 8, i32 4, i32 0, i32 5, i32 7, i32 9 , i32 9, i32 1, i32 3, i32 9, i32 1, i32 9>
2407 ret <20 x i32> %3
2408 }
2409 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_20xi32_8(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2410 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 1 , i32 5, i32 5, i32 5>
2411 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
2412 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
2413 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %7, <4 x i32> %4, <4 x i32> <i32 0, i32 7, i32 0, i32 0>
2414 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
2415 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %6, <4 x i32> %5, <4 x i32> <i32 2, i32 4, i32 4, i32 4>
2416 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
2417 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
2418 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %6, <4 x i32> %4, <4 x i32> <i32 1, i32 3, i32 3, i32 5>
2419 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %4, <4 x i32> %6, <4 x i32> <i32 3, i32 7, i32 1, i32 7>
2420 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
2421 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %1, align 16
2422 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %2, align 16
2423 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %3, align 16
2424 ; CHECK-NEXT: ret <4 x i32> %11
2425
2426 define <20 x i32> @shuffle_6xi32_to_20xi32_9(<6 x i32>, <6 x i32>) {
2427 %3 = shufflevector <6 x i32> %0, <6 x i32> %1, <20 x i32> <i32 0, i32 9, i32 2 , i32 7, i32 1, i32 2, i32 5, i32 9, i32 1, i32 6, i32 3, i32 4, i32 8, i32 7, i 32 9, i32 2, i32 8, i32 7, i32 9, i32 9>
2428 ret <20 x i32> %3
2429 }
2430 ; CHECK-LABEL: define <4 x i32> @shuffle_6xi32_to_20xi32_9(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2431 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %4, <4 x i32> %6, <4 x i32> <i32 0 , i32 7, i32 2, i32 5>
2432 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 1, i32 2, i32 5, i32 5>
2433 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
2434 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %4, <4 x i32> %6, <4 x i32> <i32 1, i32 4, i32 3, i32 3>
2435 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
2436 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %6, <4 x i32> %4, <4 x i32> <i32 2, i32 1, i32 3, i32 6>
2437 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %6, <4 x i32> undef, <4 x i32> <i 32 2, i32 1, i32 3, i32 3>
2438 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %0, align 16
2439 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %1, align 16
2440 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %2, align 16
2441 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %3, align 16
2442 ; CHECK-NEXT: ret <4 x i32> %9
2443
2444 define <2 x i32> @shuffle_8xi32_to_2xi32_0(<8 x i32>, <8 x i32>) {
2445 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <2 x i32> <i32 5, i32 6>
2446 ret <2 x i32> %3
2447 }
2448 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_2xi32_0(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2449 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i3 2 1, i32 2, i32 2, i32 2>
2450 ; CHECK-NEXT: ret <4 x i32> %5
2451
2452 define <2 x i32> @shuffle_8xi32_to_2xi32_1(<8 x i32>, <8 x i32>) {
2453 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <2 x i32> <i32 5, i32 8>
2454 ret <2 x i32> %3
2455 }
2456 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_2xi32_1(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2457 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 1 , i32 4, i32 4, i32 4>
2458 ; CHECK-NEXT: ret <4 x i32> %5
2459
2460 define <2 x i32> @shuffle_8xi32_to_2xi32_2(<8 x i32>, <8 x i32>) {
2461 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <2 x i32> <i32 3, i32 5>
2462 ret <2 x i32> %3
2463 }
2464 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_2xi32_2(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2465 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %0, <4 x i32> %1, <4 x i32> <i32 3 , i32 5, i32 5, i32 5>
2466 ; CHECK-NEXT: ret <4 x i32> %5
2467
2468 define <2 x i32> @shuffle_8xi32_to_2xi32_3(<8 x i32>, <8 x i32>) {
2469 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <2 x i32> <i32 3, i32 12>
2470 ret <2 x i32> %3
2471 }
2472 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_2xi32_3(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2473 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %0, <4 x i32> %3, <4 x i32> <i32 3 , i32 4, i32 4, i32 4>
2474 ; CHECK-NEXT: ret <4 x i32> %5
2475
2476 define <2 x i32> @shuffle_8xi32_to_2xi32_4(<8 x i32>, <8 x i32>) {
2477 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <2 x i32> <i32 11, i32 3>
2478 ret <2 x i32> %3
2479 }
2480 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_2xi32_4(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2481 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> %0, <4 x i32> <i32 3 , i32 7, i32 7, i32 7>
2482 ; CHECK-NEXT: ret <4 x i32> %5
2483
2484 define <2 x i32> @shuffle_8xi32_to_2xi32_5(<8 x i32>, <8 x i32>) {
2485 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <2 x i32> <i32 2, i32 10>
2486 ret <2 x i32> %3
2487 }
2488 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_2xi32_5(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2489 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %0, <4 x i32> %2, <4 x i32> <i32 2 , i32 6, i32 6, i32 6>
2490 ; CHECK-NEXT: ret <4 x i32> %5
2491
2492 define <2 x i32> @shuffle_8xi32_to_2xi32_6(<8 x i32>, <8 x i32>) {
2493 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <2 x i32> <i32 10, i32 9>
2494 ret <2 x i32> %3
2495 }
2496 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_2xi32_6(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2497 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> undef, <4 x i32> <i3 2 2, i32 1, i32 1, i32 1>
2498 ; CHECK-NEXT: ret <4 x i32> %5
2499
2500 define <2 x i32> @shuffle_8xi32_to_2xi32_7(<8 x i32>, <8 x i32>) {
2501 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <2 x i32> <i32 4, i32 3>
2502 ret <2 x i32> %3
2503 }
2504 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_2xi32_7(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2505 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %1, <4 x i32> %0, <4 x i32> <i32 0 , i32 7, i32 7, i32 7>
2506 ; CHECK-NEXT: ret <4 x i32> %5
2507
2508 define <2 x i32> @shuffle_8xi32_to_2xi32_8(<8 x i32>, <8 x i32>) {
2509 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <2 x i32> <i32 10, i32 3>
2510 ret <2 x i32> %3
2511 }
2512 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_2xi32_8(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2513 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> %0, <4 x i32> <i32 2 , i32 7, i32 7, i32 7>
2514 ; CHECK-NEXT: ret <4 x i32> %5
2515
2516 define <2 x i32> @shuffle_8xi32_to_2xi32_9(<8 x i32>, <8 x i32>) {
2517 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <2 x i32> <i32 12, i32 5>
2518 ret <2 x i32> %3
2519 }
2520 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_2xi32_9(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2521 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %3, <4 x i32> %1, <4 x i32> <i32 0 , i32 5, i32 5, i32 5>
2522 ; CHECK-NEXT: ret <4 x i32> %5
2523
2524 define <4 x i32> @shuffle_8xi32_to_4xi32_0(<8 x i32>, <8 x i32>) {
2525 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <4 x i32> <i32 10, i32 4, i32 7 , i32 3>
2526 ret <4 x i32> %3
2527 }
2528 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_4xi32_0(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2529 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 2 , i32 4, i32 7, i32 7>
2530 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %5, <4 x i32> %0, <4 x i32> <i32 0 , i32 1, i32 2, i32 7>
2531 ; CHECK-NEXT: ret <4 x i32> %6
2532
2533 define <4 x i32> @shuffle_8xi32_to_4xi32_1(<8 x i32>, <8 x i32>) {
2534 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <4 x i32> <i32 4, i32 5, i32 4, i32 13>
2535 ret <4 x i32> %3
2536 }
2537 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_4xi32_1(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2538 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %1, <4 x i32> %3, <4 x i32> <i32 0 , i32 1, i32 0, i32 5>
2539 ; CHECK-NEXT: ret <4 x i32> %5
2540
2541 define <4 x i32> @shuffle_8xi32_to_4xi32_2(<8 x i32>, <8 x i32>) {
2542 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <4 x i32> <i32 8, i32 9, i32 2, i32 12>
2543 ret <4 x i32> %3
2544 }
2545 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_4xi32_2(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2546 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> %0, <4 x i32> <i32 0 , i32 1, i32 6, i32 6>
2547 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %5, <4 x i32> %3, <4 x i32> <i32 0 , i32 1, i32 2, i32 4>
2548 ; CHECK-NEXT: ret <4 x i32> %6
2549
2550 define <4 x i32> @shuffle_8xi32_to_4xi32_3(<8 x i32>, <8 x i32>) {
2551 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <4 x i32> <i32 3, i32 12, i32 1 4, i32 6>
2552 ret <4 x i32> %3
2553 }
2554 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_4xi32_3(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2555 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %0, <4 x i32> %3, <4 x i32> <i32 3 , i32 4, i32 6, i32 6>
2556 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %5, <4 x i32> %1, <4 x i32> <i32 0 , i32 1, i32 2, i32 6>
2557 ; CHECK-NEXT: ret <4 x i32> %6
2558
2559 define <4 x i32> @shuffle_8xi32_to_4xi32_4(<8 x i32>, <8 x i32>) {
2560 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <4 x i32> <i32 10, i32 9, i32 8 , i32 13>
2561 ret <4 x i32> %3
2562 }
2563 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_4xi32_4(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2564 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 2 , i32 1, i32 0, i32 5>
2565 ; CHECK-NEXT: ret <4 x i32> %5
2566
2567 define <4 x i32> @shuffle_8xi32_to_4xi32_5(<8 x i32>, <8 x i32>) {
2568 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <4 x i32> <i32 2, i32 10, i32 2 , i32 7>
2569 ret <4 x i32> %3
2570 }
2571 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_4xi32_5(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2572 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %0, <4 x i32> %2, <4 x i32> <i32 2 , i32 6, i32 2, i32 2>
2573 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %5, <4 x i32> %1, <4 x i32> <i32 0 , i32 1, i32 2, i32 7>
2574 ; CHECK-NEXT: ret <4 x i32> %6
2575
2576 define <4 x i32> @shuffle_8xi32_to_4xi32_6(<8 x i32>, <8 x i32>) {
2577 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <4 x i32> <i32 3, i32 8, i32 13 , i32 11>
2578 ret <4 x i32> %3
2579 }
2580 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_4xi32_6(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2581 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %0, <4 x i32> %2, <4 x i32> <i32 3 , i32 4, i32 4, i32 4>
2582 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %5, <4 x i32> %3, <4 x i32> <i32 0 , i32 1, i32 5, i32 5>
2583 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %6, <4 x i32> %2, <4 x i32> <i32 0 , i32 1, i32 2, i32 7>
2584 ; CHECK-NEXT: ret <4 x i32> %7
2585
2586 define <4 x i32> @shuffle_8xi32_to_4xi32_7(<8 x i32>, <8 x i32>) {
2587 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <4 x i32> <i32 11, i32 11, i32 11, i32 9>
2588 ret <4 x i32> %3
2589 }
2590 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_4xi32_7(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2591 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> undef, <4 x i32> <i3 2 3, i32 3, i32 3, i32 1>
2592 ; CHECK-NEXT: ret <4 x i32> %5
2593
2594 define <4 x i32> @shuffle_8xi32_to_4xi32_8(<8 x i32>, <8 x i32>) {
2595 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <4 x i32> <i32 10, i32 10, i32 11, i32 9>
2596 ret <4 x i32> %3
2597 }
2598 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_4xi32_8(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2599 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %2, <4 x i32> undef, <4 x i32> <i3 2 2, i32 2, i32 3, i32 1>
2600 ; CHECK-NEXT: ret <4 x i32> %5
2601
2602 define <4 x i32> @shuffle_8xi32_to_4xi32_9(<8 x i32>, <8 x i32>) {
2603 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <4 x i32> <i32 2, i32 5, i32 4, i32 4>
2604 ret <4 x i32> %3
2605 }
2606 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_4xi32_9(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2607 ; CHECK-NEXT: %5 = shufflevector <4 x i32> %0, <4 x i32> %1, <4 x i32> <i32 2 , i32 5, i32 4, i32 4>
2608 ; CHECK-NEXT: ret <4 x i32> %5
2609
2610 define <6 x i32> @shuffle_8xi32_to_6xi32_0(<8 x i32>, <8 x i32>) {
2611 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <6 x i32> <i32 5, i32 2, i32 14 , i32 4, i32 11, i32 7>
2612 ret <6 x i32> %3
2613 }
2614 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_6xi32_0(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2615 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 1 , i32 6, i32 6, i32 6>
2616 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %6, <4 x i32> %4, <4 x i32> <i32 0 , i32 1, i32 6, i32 6>
2617 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %7, <4 x i32> %2, <4 x i32> <i32 0 , i32 1, i32 2, i32 4>
2618 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 3 , i32 7, i32 7, i32 7>
2619 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %0, align 16
2620 ; CHECK-NEXT: ret <4 x i32> %8
2621
2622 define <6 x i32> @shuffle_8xi32_to_6xi32_1(<8 x i32>, <8 x i32>) {
2623 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <6 x i32> <i32 3, i32 3, i32 4, i32 1, i32 9, i32 3>
2624 ret <6 x i32> %3
2625 }
2626 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_6xi32_1(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2627 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 3 , i32 3, i32 4, i32 1>
2628 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %3, <4 x i32> %1, <4 x i32> <i32 1 , i32 7, i32 7, i32 7>
2629 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
2630 ; CHECK-NEXT: ret <4 x i32> %6
2631
2632 define <6 x i32> @shuffle_8xi32_to_6xi32_2(<8 x i32>, <8 x i32>) {
2633 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <6 x i32> <i32 14, i32 13, i32 2, i32 6, i32 2, i32 0>
2634 ret <6 x i32> %3
2635 }
2636 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_6xi32_2(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2637 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %4, <4 x i32> %1, <4 x i32> <i32 2 , i32 1, i32 6, i32 6>
2638 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %6, <4 x i32> %2, <4 x i32> <i32 0 , i32 1, i32 2, i32 6>
2639 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i3 2 2, i32 0, i32 0, i32 0>
2640 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %0, align 16
2641 ; CHECK-NEXT: ret <4 x i32> %7
2642
2643 define <6 x i32> @shuffle_8xi32_to_6xi32_3(<8 x i32>, <8 x i32>) {
2644 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <6 x i32> <i32 11, i32 11, i32 6, i32 6, i32 7, i32 11>
2645 ret <6 x i32> %3
2646 }
2647 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_6xi32_3(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2648 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 3 , i32 3, i32 6, i32 6>
2649 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 3 , i32 7, i32 7, i32 7>
2650 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
2651 ; CHECK-NEXT: ret <4 x i32> %6
2652
2653 define <6 x i32> @shuffle_8xi32_to_6xi32_4(<8 x i32>, <8 x i32>) {
2654 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <6 x i32> <i32 12, i32 1, i32 7 , i32 8, i32 4, i32 6>
2655 ret <6 x i32> %3
2656 }
2657 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_6xi32_4(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2658 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %4, <4 x i32> %1, <4 x i32> <i32 0 , i32 5, i32 5, i32 5>
2659 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %6, <4 x i32> %2, <4 x i32> <i32 0 , i32 1, i32 7, i32 7>
2660 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %7, <4 x i32> %3, <4 x i32> <i32 0 , i32 1, i32 2, i32 4>
2661 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %2, <4 x i32> undef, <4 x i32> <i3 2 0, i32 2, i32 2, i32 2>
2662 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %0, align 16
2663 ; CHECK-NEXT: ret <4 x i32> %8
2664
2665 define <6 x i32> @shuffle_8xi32_to_6xi32_5(<8 x i32>, <8 x i32>) {
2666 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <6 x i32> <i32 6, i32 11, i32 0 , i32 13, i32 0, i32 10>
2667 ret <6 x i32> %3
2668 }
2669 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_6xi32_5(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2670 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 2 , i32 7, i32 7, i32 7>
2671 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %6, <4 x i32> %1, <4 x i32> <i32 0 , i32 1, i32 4, i32 4>
2672 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %7, <4 x i32> %4, <4 x i32> <i32 0 , i32 1, i32 2, i32 5>
2673 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %1, <4 x i32> %3, <4 x i32> <i32 0 , i32 6, i32 6, i32 6>
2674 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %0, align 16
2675 ; CHECK-NEXT: ret <4 x i32> %8
2676
2677 define <6 x i32> @shuffle_8xi32_to_6xi32_6(<8 x i32>, <8 x i32>) {
2678 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <6 x i32> <i32 2, i32 5, i32 13 , i32 13, i32 6, i32 9>
2679 ret <6 x i32> %3
2680 }
2681 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_6xi32_6(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2682 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 2 , i32 5, i32 5, i32 5>
2683 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %6, <4 x i32> %4, <4 x i32> <i32 0 , i32 1, i32 5, i32 5>
2684 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 2 , i32 5, i32 5, i32 5>
2685 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %0, align 16
2686 ; CHECK-NEXT: ret <4 x i32> %7
2687
2688 define <6 x i32> @shuffle_8xi32_to_6xi32_7(<8 x i32>, <8 x i32>) {
2689 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <6 x i32> <i32 14, i32 14, i32 3, i32 4, i32 10, i32 6>
2690 ret <6 x i32> %3
2691 }
2692 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_6xi32_7(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2693 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %4, <4 x i32> %1, <4 x i32> <i32 2 , i32 2, i32 7, i32 7>
2694 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %6, <4 x i32> %2, <4 x i32> <i32 0 , i32 1, i32 2, i32 4>
2695 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 2 , i32 6, i32 6, i32 6>
2696 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %0, align 16
2697 ; CHECK-NEXT: ret <4 x i32> %7
2698
2699 define <6 x i32> @shuffle_8xi32_to_6xi32_8(<8 x i32>, <8 x i32>) {
2700 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <6 x i32> <i32 1, i32 6, i32 12 , i32 5, i32 1, i32 8>
2701 ret <6 x i32> %3
2702 }
2703 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_6xi32_8(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2704 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 1 , i32 6, i32 6, i32 6>
2705 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %6, <4 x i32> %4, <4 x i32> <i32 0 , i32 1, i32 4, i32 4>
2706 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %7, <4 x i32> %2, <4 x i32> <i32 0 , i32 1, i32 2, i32 5>
2707 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %1, <4 x i32> %3, <4 x i32> <i32 1 , i32 4, i32 4, i32 4>
2708 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %0, align 16
2709 ; CHECK-NEXT: ret <4 x i32> %8
2710
2711 define <6 x i32> @shuffle_8xi32_to_6xi32_9(<8 x i32>, <8 x i32>) {
2712 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <6 x i32> <i32 0, i32 8, i32 1, i32 8, i32 7, i32 9>
2713 ret <6 x i32> %3
2714 }
2715 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_6xi32_9(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2716 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %1, <4 x i32> %3, <4 x i32> <i32 0 , i32 4, i32 1, i32 4>
2717 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 3 , i32 5, i32 5, i32 5>
2718 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
2719 ; CHECK-NEXT: ret <4 x i32> %6
2720
2721 define <8 x i32> @shuffle_8xi32_to_8xi32_0(<8 x i32>, <8 x i32>) {
2722 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <8 x i32> <i32 13, i32 12, i32 1, i32 9, i32 5, i32 7, i32 0, i32 4>
2723 ret <8 x i32> %3
2724 }
2725 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_8xi32_0(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2726 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %4, <4 x i32> %1, <4 x i32> <i32 1 , i32 0, i32 5, i32 5>
2727 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %6, <4 x i32> %3, <4 x i32> <i32 0 , i32 1, i32 2, i32 5>
2728 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 1 , i32 3, i32 4, i32 0>
2729 ; CHECK-NEXT: store <4 x i32> %8, <4 x i32>* %0, align 16
2730 ; CHECK-NEXT: ret <4 x i32> %7
2731
2732 define <8 x i32> @shuffle_8xi32_to_8xi32_1(<8 x i32>, <8 x i32>) {
2733 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <8 x i32> <i32 1, i32 13, i32 1 4, i32 2, i32 0, i32 1, i32 14, i32 12>
2734 ret <8 x i32> %3
2735 }
2736 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_8xi32_1(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2737 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %1, <4 x i32> %4, <4 x i32> <i32 1 , i32 5, i32 6, i32 2>
2738 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %1, <4 x i32> %4, <4 x i32> <i32 0 , i32 1, i32 6, i32 4>
2739 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16
2740 ; CHECK-NEXT: ret <4 x i32> %6
2741
2742 define <8 x i32> @shuffle_8xi32_to_8xi32_2(<8 x i32>, <8 x i32>) {
2743 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <8 x i32> <i32 6, i32 13, i32 1 1, i32 13, i32 0, i32 11, i32 13, i32 14>
2744 ret <8 x i32> %3
2745 }
2746 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_8xi32_2(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2747 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %2, <4 x i32> %4, <4 x i32> <i32 2 , i32 5, i32 5, i32 5>
2748 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %6, <4 x i32> %3, <4 x i32> <i32 0 , i32 1, i32 7, i32 7>
2749 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %7, <4 x i32> %4, <4 x i32> <i32 0 , i32 1, i32 2, i32 5>
2750 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %1, <4 x i32> %3, <4 x i32> <i32 0 , i32 7, i32 7, i32 7>
2751 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 5, i32 6>
2752 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
2753 ; CHECK-NEXT: ret <4 x i32> %8
2754
2755 define <8 x i32> @shuffle_8xi32_to_8xi32_3(<8 x i32>, <8 x i32>) {
2756 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <8 x i32> <i32 1, i32 11, i32 1 2, i32 11, i32 4, i32 3, i32 0, i32 7>
2757 ret <8 x i32> %3
2758 }
2759 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_8xi32_3(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2760 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %1, <4 x i32> %3, <4 x i32> <i32 1 , i32 7, i32 7, i32 7>
2761 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %6, <4 x i32> %4, <4 x i32> <i32 0 , i32 1, i32 4, i32 4>
2762 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %7, <4 x i32> %3, <4 x i32> <i32 0 , i32 1, i32 2, i32 7>
2763 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 0 , i32 7, i32 4, i32 3>
2764 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %0, align 16
2765 ; CHECK-NEXT: ret <4 x i32> %8
2766
2767 define <8 x i32> @shuffle_8xi32_to_8xi32_4(<8 x i32>, <8 x i32>) {
2768 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <8 x i32> <i32 10, i32 10, i32 4, i32 6, i32 9, i32 7, i32 0, i32 11>
2769 ret <8 x i32> %3
2770 }
2771 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_8xi32_4(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2772 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 2 , i32 2, i32 4, i32 6>
2773 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 1 , i32 7, i32 7, i32 7>
2774 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %7, <4 x i32> %1, <4 x i32> <i32 0 , i32 1, i32 4, i32 4>
2775 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %3, <4 x i32> <i32 0 , i32 1, i32 2, i32 7>
2776 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %0, align 16
2777 ; CHECK-NEXT: ret <4 x i32> %6
2778
2779 define <8 x i32> @shuffle_8xi32_to_8xi32_5(<8 x i32>, <8 x i32>) {
2780 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <8 x i32> <i32 10, i32 1, i32 0 , i32 12, i32 3, i32 14, i32 7, i32 0>
2781 ret <8 x i32> %3
2782 }
2783 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_8xi32_5(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2784 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %3, <4 x i32> %1, <4 x i32> <i32 2 , i32 5, i32 4, i32 4>
2785 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %6, <4 x i32> %4, <4 x i32> <i32 0 , i32 1, i32 2, i32 4>
2786 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %1, <4 x i32> %4, <4 x i32> <i32 3 , i32 6, i32 6, i32 6>
2787 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %2, <4 x i32> <i32 0 , i32 1, i32 7, i32 7>
2788 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %1, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
2789 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
2790 ; CHECK-NEXT: ret <4 x i32> %7
2791
2792 define <8 x i32> @shuffle_8xi32_to_8xi32_6(<8 x i32>, <8 x i32>) {
2793 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <8 x i32> <i32 6, i32 12, i32 0 , i32 9, i32 12, i32 11, i32 0, i32 5>
2794 ret <8 x i32> %3
2795 }
2796 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_8xi32_6(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2797 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %2, <4 x i32> %4, <4 x i32> <i32 2 , i32 4, i32 4, i32 4>
2798 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %6, <4 x i32> %1, <4 x i32> <i32 0 , i32 1, i32 4, i32 4>
2799 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %7, <4 x i32> %3, <4 x i32> <i32 0 , i32 1, i32 2, i32 5>
2800 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 0 , i32 7, i32 7, i32 7>
2801 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %1, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
2802 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
2803 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %0, align 16
2804 ; CHECK-NEXT: ret <4 x i32> %8
2805
2806 define <8 x i32> @shuffle_8xi32_to_8xi32_7(<8 x i32>, <8 x i32>) {
2807 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <8 x i32> <i32 7, i32 11, i32 1 , i32 7, i32 3, i32 2, i32 13, i32 3>
2808 ret <8 x i32> %3
2809 }
2810 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_8xi32_7(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2811 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 3 , i32 7, i32 7, i32 7>
2812 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %6, <4 x i32> %1, <4 x i32> <i32 0 , i32 1, i32 5, i32 5>
2813 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %7, <4 x i32> %2, <4 x i32> <i32 0 , i32 1, i32 2, i32 7>
2814 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %1, <4 x i32> %4, <4 x i32> <i32 3 , i32 2, i32 5, i32 3>
2815 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %0, align 16
2816 ; CHECK-NEXT: ret <4 x i32> %8
2817
2818 define <8 x i32> @shuffle_8xi32_to_8xi32_8(<8 x i32>, <8 x i32>) {
2819 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <8 x i32> <i32 0, i32 4, i32 8, i32 5, i32 1, i32 13, i32 4, i32 8>
2820 ret <8 x i32> %3
2821 }
2822 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_8xi32_8(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2823 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 0 , i32 4, i32 4, i32 4>
2824 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %6, <4 x i32> %3, <4 x i32> <i32 0 , i32 1, i32 4, i32 4>
2825 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %7, <4 x i32> %2, <4 x i32> <i32 0 , i32 1, i32 2, i32 5>
2826 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %1, <4 x i32> %4, <4 x i32> <i32 1 , i32 5, i32 5, i32 5>
2827 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
2828 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
2829 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %0, align 16
2830 ; CHECK-NEXT: ret <4 x i32> %8
2831
2832 define <8 x i32> @shuffle_8xi32_to_8xi32_9(<8 x i32>, <8 x i32>) {
2833 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <8 x i32> <i32 8, i32 0, i32 6, i32 10, i32 9, i32 2, i32 8, i32 3>
2834 ret <8 x i32> %3
2835 }
2836 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_8xi32_9(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2837 ; CHECK-NEXT: %6 = shufflevector <4 x i32> %3, <4 x i32> %1, <4 x i32> <i32 0 , i32 4, i32 4, i32 4>
2838 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %6, <4 x i32> %2, <4 x i32> <i32 0 , i32 1, i32 6, i32 6>
2839 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %7, <4 x i32> %3, <4 x i32> <i32 0 , i32 1, i32 2, i32 6>
2840 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %3, <4 x i32> %1, <4 x i32> <i32 1 , i32 6, i32 0, i32 7>
2841 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %0, align 16
2842 ; CHECK-NEXT: ret <4 x i32> %8
2843
2844 define <12 x i32> @shuffle_8xi32_to_12xi32_0(<8 x i32>, <8 x i32>) {
2845 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <12 x i32> <i32 9, i32 4, i32 2 , i32 9, i32 8, i32 8, i32 9, i32 4, i32 6, i32 0, i32 14, i32 1>
2846 ret <12 x i32> %3
2847 }
2848 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_12xi32_0(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2849 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 1 , i32 4, i32 4, i32 4>
2850 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %7, <4 x i32> %2, <4 x i32> <i32 0 , i32 1, i32 6, i32 6>
2851 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %4, <4 x i32> <i32 0 , i32 1, i32 2, i32 5>
2852 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 0, i32 0, i32 1, i32 4>
2853 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 2, i32 4, i32 4, i32 4>
2854 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
2855 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
2856 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
2857 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %1, align 16
2858 ; CHECK-NEXT: ret <4 x i32> %9
2859
2860 define <12 x i32> @shuffle_8xi32_to_12xi32_1(<8 x i32>, <8 x i32>) {
2861 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <12 x i32> <i32 3, i32 9, i32 6 , i32 12, i32 0, i32 7, i32 14, i32 4, i32 12, i32 8, i32 8, i32 3>
2862 ret <12 x i32> %3
2863 }
2864 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_12xi32_1(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2865 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %2, <4 x i32> %4, <4 x i32> <i32 3 , i32 5, i32 5, i32 5>
2866 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %7, <4 x i32> %3, <4 x i32> <i32 0 , i32 1, i32 6, i32 6>
2867 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %5, <4 x i32> <i32 0 , i32 1, i32 2, i32 4>
2868 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 0, i32 7, i32 7, i32 7>
2869 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
2870 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
2871 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 0, i32 4, i32 4, i32 4>
2872 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
2873 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
2874 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
2875 ; CHECK-NEXT: ret <4 x i32> %9
2876
2877 define <12 x i32> @shuffle_8xi32_to_12xi32_2(<8 x i32>, <8 x i32>) {
2878 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <12 x i32> <i32 2, i32 9, i32 3 , i32 10, i32 9, i32 6, i32 4, i32 12, i32 1, i32 7, i32 3, i32 14>
2879 ret <12 x i32> %3
2880 }
2881 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_12xi32_2(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2882 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %2, <4 x i32> %4, <4 x i32> <i32 2 , i32 5, i32 3, i32 6>
2883 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 1 , i32 6, i32 4, i32 4>
2884 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %5, <4 x i32> <i32 0 , i32 1, i32 2, i32 4>
2885 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 1, i32 7, i32 3, i32 3>
2886 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
2887 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %0, align 16
2888 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
2889 ; CHECK-NEXT: ret <4 x i32> %7
2890
2891 define <12 x i32> @shuffle_8xi32_to_12xi32_3(<8 x i32>, <8 x i32>) {
2892 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <12 x i32> <i32 0, i32 13, i32 4, i32 7, i32 4, i32 2, i32 13, i32 5, i32 11, i32 6, i32 13, i32 1>
2893 ret <12 x i32> %3
2894 }
2895 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_12xi32_3(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2896 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %2, <4 x i32> %5, <4 x i32> <i32 0 , i32 5, i32 5, i32 5>
2897 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %7, <4 x i32> %3, <4 x i32> <i32 0 , i32 1, i32 4, i32 7>
2898 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 0 , i32 6, i32 6, i32 6>
2899 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
2900 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
2901 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 3, i32 6, i32 6, i32 6>
2902 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
2903 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
2904 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %0, align 16
2905 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
2906 ; CHECK-NEXT: ret <4 x i32> %8
2907
2908 define <12 x i32> @shuffle_8xi32_to_12xi32_4(<8 x i32>, <8 x i32>) {
2909 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <12 x i32> <i32 3, i32 7, i32 5 , i32 0, i32 2, i32 9, i32 13, i32 6, i32 0, i32 5, i32 4, i32 7>
2910 ret <12 x i32> %3
2911 }
2912 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_12xi32_4(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2913 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 3 , i32 7, i32 5, i32 0>
2914 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %2, <4 x i32> %4, <4 x i32> <i32 2 , i32 5, i32 5, i32 5>
2915 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %5, <4 x i32> <i32 0 , i32 1, i32 5, i32 5>
2916 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
2917 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 0, i32 5, i32 4, i32 7>
2918 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
2919 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
2920 ; CHECK-NEXT: ret <4 x i32> %7
2921
2922 define <12 x i32> @shuffle_8xi32_to_12xi32_5(<8 x i32>, <8 x i32>) {
2923 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <12 x i32> <i32 9, i32 4, i32 4 , i32 9, i32 11, i32 10, i32 3, i32 7, i32 10, i32 13, i32 1, i32 11>
2924 ret <12 x i32> %3
2925 }
2926 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_12xi32_5(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2927 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 1 , i32 4, i32 4, i32 1>
2928 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %4, <4 x i32> %2, <4 x i32> <i32 3 , i32 2, i32 7, i32 7>
2929 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %3, <4 x i32> <i32 0 , i32 1, i32 2, i32 7>
2930 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 2, i32 5, i32 5, i32 5>
2931 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
2932 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
2933 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %0, align 16
2934 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %1, align 16
2935 ; CHECK-NEXT: ret <4 x i32> %7
2936
2937 define <12 x i32> @shuffle_8xi32_to_12xi32_6(<8 x i32>, <8 x i32>) {
2938 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <12 x i32> <i32 10, i32 3, i32 7, i32 0, i32 7, i32 6, i32 0, i32 8, i32 10, i32 13, i32 0, i32 1>
2939 ret <12 x i32> %3
2940 }
2941 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_12xi32_6(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2942 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %4, <4 x i32> %2, <4 x i32> <i32 2 , i32 7, i32 7, i32 7>
2943 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %7, <4 x i32> %3, <4 x i32> <i32 0 , i32 1, i32 7, i32 7>
2944 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %2, <4 x i32> <i32 0 , i32 1, i32 2, i32 4>
2945 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 3, i32 2, i32 4, i32 4>
2946 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
2947 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 2, i32 5, i32 5, i32 5>
2948 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
2949 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %0, align 16
2950 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %1, align 16
2951 ; CHECK-NEXT: ret <4 x i32> %9
2952
2953 define <12 x i32> @shuffle_8xi32_to_12xi32_7(<8 x i32>, <8 x i32>) {
2954 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <12 x i32> <i32 9, i32 12, i32 8, i32 5, i32 0, i32 11, i32 8, i32 5, i32 10, i32 12, i32 6, i32 7>
2955 ret <12 x i32> %3
2956 }
2957 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_12xi32_7(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2958 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 1 , i32 4, i32 0, i32 0>
2959 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %7, <4 x i32> %3, <4 x i32> <i32 0 , i32 1, i32 2, i32 5>
2960 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %2, <4 x i32> %4, <4 x i32> <i32 0 , i32 7, i32 4, i32 4>
2961 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
2962 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 2, i32 4, i32 4, i32 4>
2963 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
2964 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
2965 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %1, align 16
2966 ; CHECK-NEXT: ret <4 x i32> %8
2967
2968 define <12 x i32> @shuffle_8xi32_to_12xi32_8(<8 x i32>, <8 x i32>) {
2969 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <12 x i32> <i32 13, i32 1, i32 14, i32 7, i32 9, i32 12, i32 1, i32 10, i32 12, i32 14, i32 4, i32 7>
2970 ret <12 x i32> %3
2971 }
2972 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_12xi32_8(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2973 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %5, <4 x i32> %2, <4 x i32> <i32 1 , i32 5, i32 2, i32 2>
2974 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %7, <4 x i32> %3, <4 x i32> <i32 0 , i32 1, i32 2, i32 7>
2975 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 1 , i32 4, i32 4, i32 4>
2976 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
2977 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
2978 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %5, <4 x i32> %3, <4 x i32> <i32 0, i32 2, i32 4, i32 7>
2979 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %0, align 16
2980 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %1, align 16
2981 ; CHECK-NEXT: ret <4 x i32> %8
2982
2983 define <12 x i32> @shuffle_8xi32_to_12xi32_9(<8 x i32>, <8 x i32>) {
2984 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <12 x i32> <i32 3, i32 10, i32 9, i32 1, i32 9, i32 0, i32 11, i32 5, i32 12, i32 10, i32 5, i32 5>
2985 ret <12 x i32> %3
2986 }
2987 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_12xi32_9(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
2988 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %2, <4 x i32> %4, <4 x i32> <i32 3 , i32 6, i32 5, i32 1>
2989 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %4, <4 x i32> %2, <4 x i32> <i32 1 , i32 4, i32 3, i32 3>
2990 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %3, <4 x i32> <i32 0 , i32 1, i32 2, i32 5>
2991 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 0, i32 6, i32 6, i32 6>
2992 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
2993 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %0, align 16
2994 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
2995 ; CHECK-NEXT: ret <4 x i32> %7
2996
2997 define <16 x i32> @shuffle_8xi32_to_16xi32_0(<8 x i32>, <8 x i32>) {
2998 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <16 x i32> <i32 4, i32 12, i32 5, i32 7, i32 3, i32 8, i32 14, i32 8, i32 6, i32 7, i32 7, i32 11, i32 11, i32 7, i32 11, i32 8>
2999 ret <16 x i32> %3
3000 }
3001 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_16xi32_0(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32> , <4 x i32>)
3002 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %4, <4 x i32> %6, <4 x i32> <i32 0 , i32 4, i32 1, i32 3>
3003 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %3, <4 x i32> %5, <4 x i32> <i32 3 , i32 4, i32 4, i32 4>
3004 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
3005 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
3006 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 2, i32 3, i32 3, i32 7>
3007 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 3, i32 7, i32 3, i32 0>
3008 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %0, align 16
3009 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %1, align 16
3010 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %2, align 16
3011 ; CHECK-NEXT: ret <4 x i32> %8
3012
3013 define <16 x i32> @shuffle_8xi32_to_16xi32_1(<8 x i32>, <8 x i32>) {
3014 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <16 x i32> <i32 0, i32 9, i32 1 0, i32 2, i32 8, i32 6, i32 11, i32 4, i32 7, i32 6, i32 9, i32 1, i32 9, i32 7, i32 7, i32 7>
3015 ret <16 x i32> %3
3016 }
3017 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_16xi32_1(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32> , <4 x i32>)
3018 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %3, <4 x i32> %5, <4 x i32> <i32 0 , i32 5, i32 6, i32 2>
3019 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 0 , i32 6, i32 3, i32 4>
3020 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 3, i32 2, i32 5, i32 5>
3021 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
3022 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 1, i32 7, i32 7, i32 7>
3023 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %0, align 16
3024 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
3025 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %2, align 16
3026 ; CHECK-NEXT: ret <4 x i32> %8
3027
3028 define <16 x i32> @shuffle_8xi32_to_16xi32_2(<8 x i32>, <8 x i32>) {
3029 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <16 x i32> <i32 11, i32 7, i32 9, i32 11, i32 9, i32 2, i32 5, i32 5, i32 8, i32 5, i32 4, i32 5, i32 8, i32 7, i32 9, i32 11>
3030 ret <16 x i32> %3
3031 }
3032 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_16xi32_2(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32> , <4 x i32>)
3033 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 3 , i32 7, i32 1, i32 3>
3034 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %5, <4 x i32> %3, <4 x i32> <i32 1 , i32 6, i32 6, i32 6>
3035 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
3036 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 0, i32 5, i32 4, i32 5>
3037 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 0, i32 7, i32 1, i32 3>
3038 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
3039 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
3040 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %2, align 16
3041 ; CHECK-NEXT: ret <4 x i32> %8
3042
3043 define <16 x i32> @shuffle_8xi32_to_16xi32_3(<8 x i32>, <8 x i32>) {
3044 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <16 x i32> <i32 14, i32 0, i32 13, i32 13, i32 14, i32 0, i32 10, i32 14, i32 12, i32 4, i32 1, i32 8, i32 1, i 32 11, i32 1, i32 1>
3045 ret <16 x i32> %3
3046 }
3047 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_16xi32_3(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32> , <4 x i32>)
3048 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %6, <4 x i32> %3, <4 x i32> <i32 2 , i32 4, i32 1, i32 1>
3049 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %6, <4 x i32> %3, <4 x i32> <i32 2 , i32 4, i32 4, i32 4>
3050 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
3051 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
3052 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %6, <4 x i32> %4, <4 x i32> <i32 0, i32 4, i32 4, i32 4>
3053 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
3054 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
3055 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %3, <4 x i32> %5, <4 x i32> <i32 1, i32 7, i32 1, i32 1>
3056 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %0, align 16
3057 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
3058 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16
3059 ; CHECK-NEXT: ret <4 x i32> %8
3060
3061 define <16 x i32> @shuffle_8xi32_to_16xi32_4(<8 x i32>, <8 x i32>) {
3062 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <16 x i32> <i32 14, i32 2, i32 9, i32 11, i32 7, i32 13, i32 10, i32 0, i32 4, i32 9, i32 7, i32 7, i32 13, i32 12, i32 7, i32 13>
3063 ret <16 x i32> %3
3064 }
3065 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_16xi32_4(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32> , <4 x i32>)
3066 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %6, <4 x i32> %3, <4 x i32> <i32 2 , i32 6, i32 6, i32 6>
3067 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %5, <4 x i32> <i32 0 , i32 1, i32 5, i32 7>
3068 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %4, <4 x i32> %6, <4 x i32> <i32 3, i32 5, i32 5, i32 5>
3069 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
3070 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
3071 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 0, i32 5, i32 3, i32 3>
3072 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %6, <4 x i32> %4, <4 x i32> <i32 1, i32 0, i32 7, i32 1>
3073 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
3074 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %1, align 16
3075 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %2, align 16
3076 ; CHECK-NEXT: ret <4 x i32> %9
3077
3078 define <16 x i32> @shuffle_8xi32_to_16xi32_5(<8 x i32>, <8 x i32>) {
3079 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <16 x i32> <i32 12, i32 9, i32 0, i32 10, i32 12, i32 9, i32 12, i32 4, i32 0, i32 12, i32 6, i32 14, i32 3, i3 2 5, i32 0, i32 3>
3080 ret <16 x i32> %3
3081 }
3082 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_16xi32_5(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32> , <4 x i32>)
3083 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %6, <4 x i32> %5, <4 x i32> <i32 0 , i32 5, i32 5, i32 5>
3084 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %3, <4 x i32> <i32 0 , i32 1, i32 4, i32 4>
3085 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
3086 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %6, <4 x i32> %5, <4 x i32> <i32 0, i32 5, i32 0, i32 0>
3087 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
3088 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %3, <4 x i32> %6, <4 x i32> <i32 0, i32 4, i32 4, i32 4>
3089 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
3090 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
3091 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 3, i32 5, i32 0, i32 3>
3092 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
3093 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %1, align 16
3094 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %2, align 16
3095 ; CHECK-NEXT: ret <4 x i32> %10
3096
3097 define <16 x i32> @shuffle_8xi32_to_16xi32_6(<8 x i32>, <8 x i32>) {
3098 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <16 x i32> <i32 3, i32 9, i32 5 , i32 4, i32 4, i32 4, i32 4, i32 7, i32 3, i32 3, i32 10, i32 2, i32 11, i32 2, i32 2, i32 3>
3099 ret <16 x i32> %3
3100 }
3101 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_16xi32_6(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32> , <4 x i32>)
3102 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %3, <4 x i32> %5, <4 x i32> <i32 3 , i32 5, i32 5, i32 5>
3103 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %4, <4 x i32> <i32 0 , i32 1, i32 5, i32 4>
3104 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %4, <4 x i32> undef, <4 x i32> <i 32 0, i32 0, i32 0, i32 3>
3105 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %3, <4 x i32> %5, <4 x i32> <i32 3, i32 3, i32 6, i32 2>
3106 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %5, <4 x i32> %3, <4 x i32> <i32 3, i32 6, i32 6, i32 7>
3107 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
3108 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
3109 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %2, align 16
3110 ; CHECK-NEXT: ret <4 x i32> %9
3111
3112 define <16 x i32> @shuffle_8xi32_to_16xi32_7(<8 x i32>, <8 x i32>) {
3113 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <16 x i32> <i32 1, i32 13, i32 7, i32 2, i32 12, i32 7, i32 14, i32 2, i32 5, i32 10, i32 9, i32 9, i32 7, i32 13, i32 11, i32 7>
3114 ret <16 x i32> %3
3115 }
3116 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_16xi32_7(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32> , <4 x i32>)
3117 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %3, <4 x i32> %6, <4 x i32> <i32 1 , i32 5, i32 5, i32 5>
3118 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %4, <4 x i32> <i32 0 , i32 1, i32 7, i32 7>
3119 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
3120 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %6, <4 x i32> %4, <4 x i32> <i32 0, i32 7, i32 2, i32 2>
3121 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
3122 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 1, i32 6, i32 5, i32 5>
3123 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %4, <4 x i32> %6, <4 x i32> <i32 3, i32 5, i32 5, i32 5>
3124 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
3125 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
3126 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
3127 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %1, align 16
3128 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %2, align 16
3129 ; CHECK-NEXT: ret <4 x i32> %10
3130
3131 define <16 x i32> @shuffle_8xi32_to_16xi32_8(<8 x i32>, <8 x i32>) {
3132 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <16 x i32> <i32 14, i32 13, i32 2, i32 14, i32 13, i32 4, i32 7, i32 6, i32 1, i32 11, i32 3, i32 11, i32 2, i3 2 9, i32 9, i32 8>
3133 ret <16 x i32> %3
3134 }
3135 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_16xi32_8(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32> , <4 x i32>)
3136 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %6, <4 x i32> %3, <4 x i32> <i32 2 , i32 1, i32 6, i32 2>
3137 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %6, <4 x i32> %4, <4 x i32> <i32 1 , i32 4, i32 7, i32 6>
3138 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %3, <4 x i32> %5, <4 x i32> <i32 1, i32 7, i32 3, i32 7>
3139 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %3, <4 x i32> %5, <4 x i32> <i32 2, i32 5, i32 5, i32 4>
3140 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %0, align 16
3141 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %1, align 16
3142 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %2, align 16
3143 ; CHECK-NEXT: ret <4 x i32> %8
3144
3145 define <16 x i32> @shuffle_8xi32_to_16xi32_9(<8 x i32>, <8 x i32>) {
3146 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <16 x i32> <i32 1, i32 11, i32 6, i32 2, i32 3, i32 7, i32 11, i32 5, i32 3, i32 12, i32 1, i32 13, i32 13, i32 3, i32 4, i32 1>
3147 ret <16 x i32> %3
3148 }
3149 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_16xi32_9(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32> , <4 x i32>)
3150 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %3, <4 x i32> %5, <4 x i32> <i32 1 , i32 7, i32 7, i32 7>
3151 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %4, <4 x i32> <i32 0 , i32 1, i32 6, i32 6>
3152 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
3153 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 3, i32 7, i32 7, i32 7>
3154 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
3155 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
3156 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %3, <4 x i32> %6, <4 x i32> <i32 3, i32 4, i32 1, i32 5>
3157 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %6, <4 x i32> %3, <4 x i32> <i32 1, i32 7, i32 7, i32 7>
3158 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
3159 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
3160 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
3161 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
3162 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %2, align 16
3163 ; CHECK-NEXT: ret <4 x i32> %10
3164
3165 define <20 x i32> @shuffle_8xi32_to_20xi32_0(<8 x i32>, <8 x i32>) {
3166 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <20 x i32> <i32 4, i32 10, i32 14, i32 11, i32 10, i32 0, i32 4, i32 12, i32 2, i32 8, i32 0, i32 4, i32 8, i32 4, i32 11, i32 0, i32 11, i32 8, i32 1, i32 14>
3167 ret <20 x i32> %3
3168 }
3169 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_20xi32_0(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3170 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %5, <4 x i32> %6, <4 x i32> <i32 0 , i32 6, i32 6, i32 6>
3171 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
3172 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
3173 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %6, <4 x i32> %4, <4 x i32> <i32 2, i32 4, i32 4, i32 4>
3174 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
3175 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
3176 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %4, <4 x i32> %6, <4 x i32> <i32 2, i32 4, i32 0, i32 0>
3177 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
3178 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %6, <4 x i32> %5, <4 x i32> <i32 0, i32 4, i32 3, i32 3>
3179 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
3180 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %6, <4 x i32> %4, <4 x i32> <i32 3, i32 0, i32 5, i32 5>
3181 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %19, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
3182 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %0, align 16
3183 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %1, align 16
3184 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16
3185 ; CHECK-NEXT: store <4 x i32> %20, <4 x i32>* %3, align 16
3186 ; CHECK-NEXT: ret <4 x i32> %11
3187
3188 define <20 x i32> @shuffle_8xi32_to_20xi32_1(<8 x i32>, <8 x i32>) {
3189 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <20 x i32> <i32 1, i32 3, i32 8 , i32 5, i32 2, i32 2, i32 11, i32 10, i32 11, i32 10, i32 10, i32 6, i32 9, i32 7, i32 8, i32 6, i32 5, i32 14, i32 12, i32 14>
3190 ret <20 x i32> %3
3191 }
3192 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_20xi32_1(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3193 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %4, <4 x i32> %6, <4 x i32> <i32 1 , i32 3, i32 4, i32 4>
3194 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
3195 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %4, <4 x i32> %6, <4 x i32> <i32 2, i32 2, i32 7, i32 6>
3196 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %6, <4 x i32> %5, <4 x i32> <i32 3, i32 2, i32 2, i32 6>
3197 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %6, <4 x i32> %5, <4 x i32> <i32 1, i32 7, i32 0, i32 6>
3198 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %5, <4 x i32> %7, <4 x i32> <i32 1, i32 6, i32 4, i32 6>
3199 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %0, align 16
3200 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %1, align 16
3201 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %2, align 16
3202 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %3, align 16
3203 ; CHECK-NEXT: ret <4 x i32> %10
3204
3205 define <20 x i32> @shuffle_8xi32_to_20xi32_2(<8 x i32>, <8 x i32>) {
3206 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <20 x i32> <i32 3, i32 8, i32 1 1, i32 10, i32 11, i32 8, i32 10, i32 1, i32 6, i32 6, i32 6, i32 13, i32 3, i32 9, i32 12, i32 2, i32 3, i32 3, i32 7, i32 10>
3207 ret <20 x i32> %3
3208 }
3209 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_20xi32_2(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3210 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %4, <4 x i32> %6, <4 x i32> <i32 3 , i32 4, i32 7, i32 6>
3211 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %6, <4 x i32> %4, <4 x i32> <i32 3, i32 0, i32 2, i32 5>
3212 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %5, <4 x i32> %7, <4 x i32> <i32 2, i32 2, i32 2, i32 5>
3213 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %4, <4 x i32> %6, <4 x i32> <i32 3, i32 5, i32 5, i32 5>
3214 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
3215 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
3216 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 3, i32 3, i32 7, i32 7>
3217 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
3218 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
3219 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
3220 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %2, align 16
3221 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %3, align 16
3222 ; CHECK-NEXT: ret <4 x i32> %9
3223
3224 define <20 x i32> @shuffle_8xi32_to_20xi32_3(<8 x i32>, <8 x i32>) {
3225 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <20 x i32> <i32 2, i32 7, i32 1 1, i32 3, i32 11, i32 13, i32 13, i32 0, i32 11, i32 8, i32 1, i32 11, i32 2, i3 2 7, i32 1, i32 3, i32 2, i32 3, i32 0, i32 8>
3226 ret <20 x i32> %3
3227 }
3228 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_20xi32_3(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3229 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 2 , i32 7, i32 7, i32 7>
3230 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
3231 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
3232 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %6, <4 x i32> %7, <4 x i32> <i32 3, i32 5, i32 5, i32 5>
3233 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
3234 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %6, <4 x i32> %4, <4 x i32> <i32 3, i32 0, i32 5, i32 3>
3235 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 2, i32 7, i32 1, i32 3>
3236 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %4, <4 x i32> %6, <4 x i32> <i32 2, i32 3, i32 0, i32 4>
3237 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
3238 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
3239 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16
3240 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %3, align 16
3241 ; CHECK-NEXT: ret <4 x i32> %11
3242
3243 define <20 x i32> @shuffle_8xi32_to_20xi32_4(<8 x i32>, <8 x i32>) {
3244 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <20 x i32> <i32 1, i32 2, i32 1 , i32 0, i32 5, i32 9, i32 14, i32 2, i32 12, i32 0, i32 11, i32 2, i32 14, i32 6, i32 9, i32 14, i32 0, i32 3, i32 0, i32 10>
3245 ret <20 x i32> %3
3246 }
3247 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_20xi32_4(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3248 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %4, <4 x i32> undef, <4 x i32> <i3 2 1, i32 2, i32 1, i32 0>
3249 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %5, <4 x i32> %6, <4 x i32> <i32 1, i32 5, i32 5, i32 5>
3250 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
3251 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
3252 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %7, <4 x i32> %4, <4 x i32> <i32 0, i32 4, i32 4, i32 4>
3253 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
3254 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
3255 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %7, <4 x i32> %5, <4 x i32> <i32 2, i32 6, i32 6, i32 6>
3256 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
3257 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
3258 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %4, <4 x i32> %6, <4 x i32> <i32 0, i32 3, i32 0, i32 6>
3259 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
3260 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %1, align 16
3261 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16
3262 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16
3263 ; CHECK-NEXT: ret <4 x i32> %9
3264
3265 define <20 x i32> @shuffle_8xi32_to_20xi32_5(<8 x i32>, <8 x i32>) {
3266 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <20 x i32> <i32 14, i32 4, i32 10, i32 1, i32 3, i32 14, i32 6, i32 7, i32 14, i32 3, i32 8, i32 8, i32 8, i32 8, i32 1, i32 12, i32 10, i32 14, i32 10, i32 0>
3267 ret <20 x i32> %3
3268 }
3269 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_20xi32_5(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3270 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %7, <4 x i32> %5, <4 x i32> <i32 2 , i32 4, i32 4, i32 4>
3271 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
3272 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
3273 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %4, <4 x i32> %7, <4 x i32> <i32 3, i32 6, i32 6, i32 6>
3274 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
3275 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %7, <4 x i32> %4, <4 x i32> <i32 2, i32 7, i32 7, i32 7>
3276 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
3277 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %6, <4 x i32> %4, <4 x i32> <i32 0, i32 0, i32 5, i32 5>
3278 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
3279 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %6, <4 x i32> %7, <4 x i32> <i32 2, i32 6, i32 2, i32 2>
3280 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
3281 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
3282 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %1, align 16
3283 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %2, align 16
3284 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16
3285 ; CHECK-NEXT: ret <4 x i32> %11
3286
3287 define <20 x i32> @shuffle_8xi32_to_20xi32_6(<8 x i32>, <8 x i32>) {
3288 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <20 x i32> <i32 14, i32 12, i32 9, i32 7, i32 5, i32 1, i32 10, i32 2, i32 6, i32 1, i32 8, i32 11, i32 3, i32 5, i32 5, i32 0, i32 2, i32 6, i32 5, i32 14>
3289 ret <20 x i32> %3
3290 }
3291 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_20xi32_6(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3292 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %7, <4 x i32> %6, <4 x i32> <i32 2 , i32 0, i32 5, i32 5>
3293 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
3294 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 1, i32 5, i32 5, i32 5>
3295 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
3296 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
3297 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 2, i32 5, i32 5, i32 5>
3298 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 4, i32 7>
3299 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 3, i32 5, i32 5, i32 0>
3300 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 2, i32 6, i32 5, i32 5>
3301 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
3302 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
3303 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %1, align 16
3304 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %2, align 16
3305 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %3, align 16
3306 ; CHECK-NEXT: ret <4 x i32> %10
3307
3308 define <20 x i32> @shuffle_8xi32_to_20xi32_7(<8 x i32>, <8 x i32>) {
3309 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <20 x i32> <i32 4, i32 1, i32 1 3, i32 13, i32 10, i32 6, i32 7, i32 7, i32 8, i32 6, i32 7, i32 0, i32 0, i32 1 1, i32 7, i32 3, i32 14, i32 2, i32 0, i32 0>
3310 ret <20 x i32> %3
3311 }
3312 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_20xi32_7(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3313 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 0 , i32 5, i32 5, i32 5>
3314 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
3315 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %6, <4 x i32> %5, <4 x i32> <i32 2, i32 6, i32 7, i32 7>
3316 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %6, <4 x i32> %5, <4 x i32> <i32 0, i32 6, i32 7, i32 7>
3317 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
3318 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %4, <4 x i32> %6, <4 x i32> <i32 0, i32 7, i32 7, i32 7>
3319 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
3320 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
3321 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %7, <4 x i32> %4, <4 x i32> <i32 2, i32 6, i32 4, i32 4>
3322 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %0, align 16
3323 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %1, align 16
3324 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %2, align 16
3325 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %3, align 16
3326 ; CHECK-NEXT: ret <4 x i32> %10
3327
3328 define <20 x i32> @shuffle_8xi32_to_20xi32_8(<8 x i32>, <8 x i32>) {
3329 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <20 x i32> <i32 5, i32 4, i32 3 , i32 1, i32 10, i32 0, i32 6, i32 3, i32 3, i32 13, i32 11, i32 2, i32 2, i32 1 2, i32 8, i32 13, i32 6, i32 5, i32 13, i32 13>
3330 ret <20 x i32> %3
3331 }
3332 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_20xi32_8(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3333 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 1 , i32 0, i32 7, i32 5>
3334 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %6, <4 x i32> %4, <4 x i32> <i32 2, i32 4, i32 4, i32 4>
3335 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
3336 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
3337 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %4, <4 x i32> %7, <4 x i32> <i32 3, i32 5, i32 5, i32 5>
3338 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
3339 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
3340 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %4, <4 x i32> %7, <4 x i32> <i32 2, i32 4, i32 4, i32 4>
3341 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
3342 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
3343 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %5, <4 x i32> %7, <4 x i32> <i32 2, i32 1, i32 5, i32 5>
3344 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
3345 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %1, align 16
3346 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16
3347 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16
3348 ; CHECK-NEXT: ret <4 x i32> %9
3349
3350 define <20 x i32> @shuffle_8xi32_to_20xi32_9(<8 x i32>, <8 x i32>) {
3351 %3 = shufflevector <8 x i32> %0, <8 x i32> %1, <20 x i32> <i32 3, i32 13, i32 0, i32 3, i32 0, i32 1, i32 9, i32 3, i32 4, i32 4, i32 5, i32 12, i32 4, i32 14 , i32 10, i32 11, i32 1, i32 7, i32 4, i32 9>
3352 ret <20 x i32> %3
3353 }
3354 ; CHECK-LABEL: define <4 x i32> @shuffle_8xi32_to_20xi32_9(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), < 4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3355 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %4, <4 x i32> %7, <4 x i32> <i32 3 , i32 5, i32 0, i32 3>
3356 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %4, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 5, i32 3>
3357 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %5, <4 x i32> %7, <4 x i32> <i32 0, i32 0, i32 1, i32 4>
3358 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %5, <4 x i32> %7, <4 x i32> <i32 0, i32 6, i32 6, i32 6>
3359 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
3360 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 1, i32 7, i32 4, i32 4>
3361 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
3362 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
3363 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16
3364 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %2, align 16
3365 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %3, align 16
3366 ; CHECK-NEXT: ret <4 x i32> %9
3367
3368 define <2 x i32> @shuffle_12xi32_to_2xi32_0(<12 x i32>, <12 x i32>) {
3369 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <2 x i32> <i32 0, i32 1>
3370 ret <2 x i32> %3
3371 }
3372 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_2xi32_0(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3373 ; CHECK-NEXT: ret <4 x i32> %0
3374
3375 define <2 x i32> @shuffle_12xi32_to_2xi32_1(<12 x i32>, <12 x i32>) {
3376 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <2 x i32> <i32 15, i32 16>
3377 ret <2 x i32> %3
3378 }
3379 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_2xi32_1(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3380 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 3 , i32 4, i32 4, i32 4>
3381 ; CHECK-NEXT: ret <4 x i32> %7
3382
3383 define <2 x i32> @shuffle_12xi32_to_2xi32_2(<12 x i32>, <12 x i32>) {
3384 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <2 x i32> <i32 2, i32 13>
3385 ret <2 x i32> %3
3386 }
3387 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_2xi32_2(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3388 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %0, <4 x i32> %3, <4 x i32> <i32 2 , i32 5, i32 5, i32 5>
3389 ; CHECK-NEXT: ret <4 x i32> %7
3390
3391 define <2 x i32> @shuffle_12xi32_to_2xi32_3(<12 x i32>, <12 x i32>) {
3392 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <2 x i32> <i32 0, i32 1>
3393 ret <2 x i32> %3
3394 }
3395 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_2xi32_3(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3396 ; CHECK-NEXT: ret <4 x i32> %0
3397
3398 define <2 x i32> @shuffle_12xi32_to_2xi32_4(<12 x i32>, <12 x i32>) {
3399 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <2 x i32> <i32 1, i32 6>
3400 ret <2 x i32> %3
3401 }
3402 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_2xi32_4(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3403 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %0, <4 x i32> %1, <4 x i32> <i32 1 , i32 6, i32 6, i32 6>
3404 ; CHECK-NEXT: ret <4 x i32> %7
3405
3406 define <2 x i32> @shuffle_12xi32_to_2xi32_5(<12 x i32>, <12 x i32>) {
3407 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <2 x i32> <i32 19, i32 17>
3408 ret <2 x i32> %3
3409 }
3410 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_2xi32_5(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3411 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %4, <4 x i32> undef, <4 x i32> <i3 2 3, i32 1, i32 1, i32 1>
3412 ; CHECK-NEXT: ret <4 x i32> %7
3413
3414 define <2 x i32> @shuffle_12xi32_to_2xi32_6(<12 x i32>, <12 x i32>) {
3415 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <2 x i32> <i32 22, i32 13>
3416 ret <2 x i32> %3
3417 }
3418 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_2xi32_6(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3419 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %5, <4 x i32> %3, <4 x i32> <i32 2 , i32 5, i32 5, i32 5>
3420 ; CHECK-NEXT: ret <4 x i32> %7
3421
3422 define <2 x i32> @shuffle_12xi32_to_2xi32_7(<12 x i32>, <12 x i32>) {
3423 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <2 x i32> <i32 3, i32 12>
3424 ret <2 x i32> %3
3425 }
3426 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_2xi32_7(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3427 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %0, <4 x i32> %3, <4 x i32> <i32 3 , i32 4, i32 4, i32 4>
3428 ; CHECK-NEXT: ret <4 x i32> %7
3429
3430 define <2 x i32> @shuffle_12xi32_to_2xi32_8(<12 x i32>, <12 x i32>) {
3431 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <2 x i32> <i32 6, i32 14>
3432 ret <2 x i32> %3
3433 }
3434 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_2xi32_8(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3435 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %1, <4 x i32> %3, <4 x i32> <i32 2 , i32 6, i32 6, i32 6>
3436 ; CHECK-NEXT: ret <4 x i32> %7
3437
3438 define <2 x i32> @shuffle_12xi32_to_2xi32_9(<12 x i32>, <12 x i32>) {
3439 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <2 x i32> <i32 2, i32 15>
3440 ret <2 x i32> %3
3441 }
3442 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_2xi32_9(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3443 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %0, <4 x i32> %3, <4 x i32> <i32 2 , i32 7, i32 7, i32 7>
3444 ; CHECK-NEXT: ret <4 x i32> %7
3445
3446 define <4 x i32> @shuffle_12xi32_to_4xi32_0(<12 x i32>, <12 x i32>) {
3447 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <4 x i32> <i32 14, i32 9, i32 11, i32 14>
3448 ret <4 x i32> %3
3449 }
3450 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_4xi32_0(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3451 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 2 , i32 5, i32 7, i32 2>
3452 ; CHECK-NEXT: ret <4 x i32> %7
3453
3454 define <4 x i32> @shuffle_12xi32_to_4xi32_1(<12 x i32>, <12 x i32>) {
3455 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <4 x i32> <i32 16, i32 0, i32 7, i32 6>
3456 ret <4 x i32> %3
3457 }
3458 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_4xi32_1(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3459 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %4, <4 x i32> %0, <4 x i32> <i32 0 , i32 4, i32 4, i32 4>
3460 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %7, <4 x i32> %1, <4 x i32> <i32 0 , i32 1, i32 7, i32 6>
3461 ; CHECK-NEXT: ret <4 x i32> %8
3462
3463 define <4 x i32> @shuffle_12xi32_to_4xi32_2(<12 x i32>, <12 x i32>) {
3464 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <4 x i32> <i32 0, i32 17, i32 2, i32 8>
3465 ret <4 x i32> %3
3466 }
3467 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_4xi32_2(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3468 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %0, <4 x i32> %4, <4 x i32> <i32 0 , i32 5, i32 2, i32 2>
3469 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %7, <4 x i32> %2, <4 x i32> <i32 0 , i32 1, i32 2, i32 4>
3470 ; CHECK-NEXT: ret <4 x i32> %8
3471
3472 define <4 x i32> @shuffle_12xi32_to_4xi32_3(<12 x i32>, <12 x i32>) {
3473 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <4 x i32> <i32 7, i32 17, i32 18, i32 4>
3474 ret <4 x i32> %3
3475 }
3476 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_4xi32_3(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3477 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %1, <4 x i32> %4, <4 x i32> <i32 3 , i32 5, i32 6, i32 0>
3478 ; CHECK-NEXT: ret <4 x i32> %7
3479
3480 define <4 x i32> @shuffle_12xi32_to_4xi32_4(<12 x i32>, <12 x i32>) {
3481 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <4 x i32> <i32 7, i32 13, i32 12, i32 5>
3482 ret <4 x i32> %3
3483 }
3484 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_4xi32_4(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3485 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %1, <4 x i32> %3, <4 x i32> <i32 3 , i32 5, i32 4, i32 1>
3486 ; CHECK-NEXT: ret <4 x i32> %7
3487
3488 define <4 x i32> @shuffle_12xi32_to_4xi32_5(<12 x i32>, <12 x i32>) {
3489 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <4 x i32> <i32 11, i32 21, i3 2 11, i32 22>
3490 ret <4 x i32> %3
3491 }
3492 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_4xi32_5(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3493 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %2, <4 x i32> %5, <4 x i32> <i32 3 , i32 5, i32 3, i32 6>
3494 ; CHECK-NEXT: ret <4 x i32> %7
3495
3496 define <4 x i32> @shuffle_12xi32_to_4xi32_6(<12 x i32>, <12 x i32>) {
3497 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <4 x i32> <i32 21, i32 14, i3 2 20, i32 15>
3498 ret <4 x i32> %3
3499 }
3500 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_4xi32_6(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3501 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %5, <4 x i32> %3, <4 x i32> <i32 1 , i32 6, i32 0, i32 7>
3502 ; CHECK-NEXT: ret <4 x i32> %7
3503
3504 define <4 x i32> @shuffle_12xi32_to_4xi32_7(<12 x i32>, <12 x i32>) {
3505 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <4 x i32> <i32 3, i32 12, i32 14, i32 4>
3506 ret <4 x i32> %3
3507 }
3508 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_4xi32_7(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3509 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %0, <4 x i32> %3, <4 x i32> <i32 3 , i32 4, i32 6, i32 6>
3510 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %7, <4 x i32> %1, <4 x i32> <i32 0 , i32 1, i32 2, i32 4>
3511 ; CHECK-NEXT: ret <4 x i32> %8
3512
3513 define <4 x i32> @shuffle_12xi32_to_4xi32_8(<12 x i32>, <12 x i32>) {
3514 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <4 x i32> <i32 8, i32 16, i32 0, i32 6>
3515 ret <4 x i32> %3
3516 }
3517 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_4xi32_8(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3518 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %2, <4 x i32> %4, <4 x i32> <i32 0 , i32 4, i32 4, i32 4>
3519 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %7, <4 x i32> %0, <4 x i32> <i32 0 , i32 1, i32 4, i32 4>
3520 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %1, <4 x i32> <i32 0 , i32 1, i32 2, i32 6>
3521 ; CHECK-NEXT: ret <4 x i32> %9
3522
3523 define <4 x i32> @shuffle_12xi32_to_4xi32_9(<12 x i32>, <12 x i32>) {
3524 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <4 x i32> <i32 18, i32 19, i3 2 8, i32 5>
3525 ret <4 x i32> %3
3526 }
3527 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_4xi32_9(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3528 ; CHECK-NEXT: %7 = shufflevector <4 x i32> %4, <4 x i32> %2, <4 x i32> <i32 2 , i32 3, i32 4, i32 4>
3529 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %7, <4 x i32> %1, <4 x i32> <i32 0 , i32 1, i32 2, i32 5>
3530 ; CHECK-NEXT: ret <4 x i32> %8
3531
3532 define <6 x i32> @shuffle_12xi32_to_6xi32_0(<12 x i32>, <12 x i32>) {
3533 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <6 x i32> <i32 11, i32 13, i3 2 6, i32 20, i32 12, i32 7>
3534 ret <6 x i32> %3
3535 }
3536 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_6xi32_0(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>)
3537 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 3 , i32 5, i32 5, i32 5>
3538 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %2, <4 x i32> <i32 0 , i32 1, i32 6, i32 6>
3539 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
3540 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %4, <4 x i32> %2, <4 x i32> <i32 0, i32 7, i32 7, i32 7>
3541 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %0, align 16
3542 ; CHECK-NEXT: ret <4 x i32> %10
3543
3544 define <6 x i32> @shuffle_12xi32_to_6xi32_1(<12 x i32>, <12 x i32>) {
3545 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <6 x i32> <i32 17, i32 4, i32 15, i32 7, i32 19, i32 16>
3546 ret <6 x i32> %3
3547 }
3548 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_6xi32_1(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>)
3549 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %5, <4 x i32> %2, <4 x i32> <i32 1 , i32 4, i32 4, i32 4>
3550 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %4, <4 x i32> <i32 0 , i32 1, i32 7, i32 7>
3551 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
3552 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %5, <4 x i32> undef, <4 x i32> <i 32 3, i32 0, i32 0, i32 0>
3553 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %0, align 16
3554 ; CHECK-NEXT: ret <4 x i32> %10
3555
3556 define <6 x i32> @shuffle_12xi32_to_6xi32_2(<12 x i32>, <12 x i32>) {
3557 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <6 x i32> <i32 6, i32 2, i32 21, i32 8, i32 22, i32 12>
3558 ret <6 x i32> %3
3559 }
3560 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_6xi32_2(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>)
3561 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 2 , i32 6, i32 6, i32 6>
3562 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %6, <4 x i32> <i32 0 , i32 1, i32 5, i32 5>
3563 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
3564 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %6, <4 x i32> %4, <4 x i32> <i32 2, i32 4, i32 4, i32 4>
3565 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %0, align 16
3566 ; CHECK-NEXT: ret <4 x i32> %10
3567
3568 define <6 x i32> @shuffle_12xi32_to_6xi32_3(<12 x i32>, <12 x i32>) {
3569 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <6 x i32> <i32 11, i32 6, i32 0, i32 11, i32 16, i32 5>
3570 ret <6 x i32> %3
3571 }
3572 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_6xi32_3(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>)
3573 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 3 , i32 6, i32 6, i32 6>
3574 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %1, <4 x i32> <i32 0 , i32 1, i32 4, i32 4>
3575 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
3576 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %5, <4 x i32> %2, <4 x i32> <i32 0, i32 5, i32 5, i32 5>
3577 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %0, align 16
3578 ; CHECK-NEXT: ret <4 x i32> %10
3579
3580 define <6 x i32> @shuffle_12xi32_to_6xi32_4(<12 x i32>, <12 x i32>) {
3581 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <6 x i32> <i32 21, i32 5, i32 11, i32 8, i32 21, i32 12>
3582 ret <6 x i32> %3
3583 }
3584 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_6xi32_4(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>)
3585 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %6, <4 x i32> %2, <4 x i32> <i32 1 , i32 5, i32 5, i32 5>
3586 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %3, <4 x i32> <i32 0 , i32 1, i32 7, i32 4>
3587 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %6, <4 x i32> %4, <4 x i32> <i32 1, i32 4, i32 4, i32 4>
3588 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
3589 ; CHECK-NEXT: ret <4 x i32> %9
3590
3591 define <6 x i32> @shuffle_12xi32_to_6xi32_5(<12 x i32>, <12 x i32>) {
3592 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <6 x i32> <i32 0, i32 15, i32 3, i32 14, i32 11, i32 18>
3593 ret <6 x i32> %3
3594 }
3595 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_6xi32_5(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>)
3596 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %1, <4 x i32> %4, <4 x i32> <i32 0 , i32 7, i32 3, i32 6>
3597 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %3, <4 x i32> %5, <4 x i32> <i32 3 , i32 6, i32 6, i32 6>
3598 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %0, align 16
3599 ; CHECK-NEXT: ret <4 x i32> %8
3600
3601 define <6 x i32> @shuffle_12xi32_to_6xi32_6(<12 x i32>, <12 x i32>) {
3602 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <6 x i32> <i32 9, i32 12, i32 8, i32 19, i32 5, i32 5>
3603 ret <6 x i32> %3
3604 }
3605 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_6xi32_6(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>)
3606 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 1 , i32 4, i32 0, i32 0>
3607 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %5, <4 x i32> <i32 0 , i32 1, i32 2, i32 7>
3608 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %2, <4 x i32> undef, <4 x i32> <i 32 1, i32 1, i32 1, i32 1>
3609 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
3610 ; CHECK-NEXT: ret <4 x i32> %9
3611
3612 define <6 x i32> @shuffle_12xi32_to_6xi32_7(<12 x i32>, <12 x i32>) {
3613 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <6 x i32> <i32 17, i32 3, i32 18, i32 16, i32 9, i32 18>
3614 ret <6 x i32> %3
3615 }
3616 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_6xi32_7(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>)
3617 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %5, <4 x i32> %1, <4 x i32> <i32 1 , i32 7, i32 2, i32 0>
3618 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %3, <4 x i32> %5, <4 x i32> <i32 1 , i32 6, i32 6, i32 6>
3619 ; CHECK-NEXT: store <4 x i32> %9, <4 x i32>* %0, align 16
3620 ; CHECK-NEXT: ret <4 x i32> %8
3621
3622 define <6 x i32> @shuffle_12xi32_to_6xi32_8(<12 x i32>, <12 x i32>) {
3623 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <6 x i32> <i32 11, i32 14, i3 2 6, i32 20, i32 15, i32 0>
3624 ret <6 x i32> %3
3625 }
3626 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_6xi32_8(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>)
3627 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 3 , i32 6, i32 6, i32 6>
3628 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %2, <4 x i32> <i32 0 , i32 1, i32 6, i32 6>
3629 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
3630 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %4, <4 x i32> %1, <4 x i32> <i32 3, i32 4, i32 4, i32 4>
3631 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %0, align 16
3632 ; CHECK-NEXT: ret <4 x i32> %10
3633
3634 define <6 x i32> @shuffle_12xi32_to_6xi32_9(<12 x i32>, <12 x i32>) {
3635 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <6 x i32> <i32 12, i32 20, i3 2 10, i32 10, i32 14, i32 14>
3636 ret <6 x i32> %3
3637 }
3638 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_6xi32_9(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>)
3639 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %4, <4 x i32> %6, <4 x i32> <i32 0 , i32 4, i32 4, i32 4>
3640 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %3, <4 x i32> <i32 0 , i32 1, i32 6, i32 6>
3641 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %4, <4 x i32> undef, <4 x i32> <i 32 2, i32 2, i32 2, i32 2>
3642 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
3643 ; CHECK-NEXT: ret <4 x i32> %9
3644
3645 define <8 x i32> @shuffle_12xi32_to_8xi32_0(<12 x i32>, <12 x i32>) {
3646 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <8 x i32> <i32 7, i32 14, i32 14, i32 18, i32 18, i32 20, i32 22, i32 15>
3647 ret <8 x i32> %3
3648 }
3649 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_8xi32_0(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>)
3650 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %2, <4 x i32> %4, <4 x i32> <i32 3 , i32 6, i32 6, i32 6>
3651 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %5, <4 x i32> <i32 0 , i32 1, i32 2, i32 6>
3652 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %5, <4 x i32> %6, <4 x i32> <i32 2, i32 4, i32 6, i32 6>
3653 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
3654 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %0, align 16
3655 ; CHECK-NEXT: ret <4 x i32> %9
3656
3657 define <8 x i32> @shuffle_12xi32_to_8xi32_1(<12 x i32>, <12 x i32>) {
3658 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <8 x i32> <i32 5, i32 7, i32 16, i32 22, i32 16, i32 2, i32 16, i32 20>
3659 ret <8 x i32> %3
3660 }
3661 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_8xi32_1(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>)
3662 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %2, <4 x i32> %5, <4 x i32> <i32 1 , i32 3, i32 4, i32 4>
3663 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %6, <4 x i32> <i32 0 , i32 1, i32 2, i32 6>
3664 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %5, <4 x i32> %1, <4 x i32> <i32 0, i32 6, i32 0, i32 0>
3665 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
3666 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %0, align 16
3667 ; CHECK-NEXT: ret <4 x i32> %9
3668
3669 define <8 x i32> @shuffle_12xi32_to_8xi32_2(<12 x i32>, <12 x i32>) {
3670 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <8 x i32> <i32 3, i32 3, i32 1, i32 0, i32 5, i32 22, i32 5, i32 9>
3671 ret <8 x i32> %3
3672 }
3673 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_8xi32_2(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>)
3674 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i3 2 3, i32 3, i32 1, i32 0>
3675 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %2, <4 x i32> %6, <4 x i32> <i32 1 , i32 6, i32 1, i32 1>
3676 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
3677 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
3678 ; CHECK-NEXT: ret <4 x i32> %8
3679
3680 define <8 x i32> @shuffle_12xi32_to_8xi32_3(<12 x i32>, <12 x i32>) {
3681 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <8 x i32> <i32 5, i32 1, i32 18, i32 1, i32 13, i32 6, i32 7, i32 14>
3682 ret <8 x i32> %3
3683 }
3684 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_8xi32_3(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>)
3685 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 1 , i32 5, i32 5, i32 5>
3686 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %5, <4 x i32> <i32 0 , i32 1, i32 6, i32 6>
3687 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %1, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
3688 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %4, <4 x i32> %2, <4 x i32> <i32 1, i32 6, i32 7, i32 2>
3689 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %0, align 16
3690 ; CHECK-NEXT: ret <4 x i32> %10
3691
3692 define <8 x i32> @shuffle_12xi32_to_8xi32_4(<12 x i32>, <12 x i32>) {
3693 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <8 x i32> <i32 21, i32 21, i3 2 7, i32 11, i32 17, i32 19, i32 3, i32 16>
3694 ret <8 x i32> %3
3695 }
3696 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_8xi32_4(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>)
3697 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %6, <4 x i32> %2, <4 x i32> <i32 1 , i32 1, i32 7, i32 7>
3698 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %3, <4 x i32> <i32 0 , i32 1, i32 2, i32 7>
3699 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %5, <4 x i32> %1, <4 x i32> <i32 1, i32 3, i32 7, i32 0>
3700 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
3701 ; CHECK-NEXT: ret <4 x i32> %9
3702
3703 define <8 x i32> @shuffle_12xi32_to_8xi32_5(<12 x i32>, <12 x i32>) {
3704 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <8 x i32> <i32 14, i32 9, i32 22, i32 12, i32 13, i32 1, i32 3, i32 0>
3705 ret <8 x i32> %3
3706 }
3707 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_8xi32_5(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>)
3708 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 2 , i32 5, i32 5, i32 5>
3709 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %6, <4 x i32> <i32 0 , i32 1, i32 6, i32 6>
3710 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
3711 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %4, <4 x i32> %1, <4 x i32> <i32 1, i32 5, i32 7, i32 4>
3712 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %0, align 16
3713 ; CHECK-NEXT: ret <4 x i32> %10
3714
3715 define <8 x i32> @shuffle_12xi32_to_8xi32_6(<12 x i32>, <12 x i32>) {
3716 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <8 x i32> <i32 15, i32 7, i32 0, i32 6, i32 2, i32 3, i32 7, i32 12>
3717 ret <8 x i32> %3
3718 }
3719 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_8xi32_6(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>)
3720 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %4, <4 x i32> %2, <4 x i32> <i32 3 , i32 7, i32 7, i32 7>
3721 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %1, <4 x i32> <i32 0 , i32 1, i32 4, i32 4>
3722 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
3723 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 2, i32 3, i32 7, i32 7>
3724 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
3725 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
3726 ; CHECK-NEXT: ret <4 x i32> %10
3727
3728 define <8 x i32> @shuffle_12xi32_to_8xi32_7(<12 x i32>, <12 x i32>) {
3729 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <8 x i32> <i32 22, i32 20, i3 2 9, i32 8, i32 5, i32 5, i32 22, i32 9>
3730 ret <8 x i32> %3
3731 }
3732 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_8xi32_7(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>)
3733 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %6, <4 x i32> %3, <4 x i32> <i32 2 , i32 0, i32 5, i32 4>
3734 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %2, <4 x i32> %6, <4 x i32> <i32 1 , i32 1, i32 6, i32 6>
3735 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
3736 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16
3737 ; CHECK-NEXT: ret <4 x i32> %8
3738
3739 define <8 x i32> @shuffle_12xi32_to_8xi32_8(<12 x i32>, <12 x i32>) {
3740 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <8 x i32> <i32 5, i32 20, i32 19, i32 3, i32 7, i32 18, i32 3, i32 1>
3741 ret <8 x i32> %3
3742 }
3743 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_8xi32_8(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>)
3744 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %2, <4 x i32> %6, <4 x i32> <i32 1 , i32 4, i32 4, i32 4>
3745 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %5, <4 x i32> <i32 0 , i32 1, i32 7, i32 7>
3746 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %1, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
3747 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %2, <4 x i32> %5, <4 x i32> <i32 3, i32 6, i32 6, i32 6>
3748 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %1, <4 x i32> <i32 0, i32 1, i32 7, i32 5>
3749 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
3750 ; CHECK-NEXT: ret <4 x i32> %10
3751
3752 define <8 x i32> @shuffle_12xi32_to_8xi32_9(<12 x i32>, <12 x i32>) {
3753 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <8 x i32> <i32 19, i32 21, i3 2 15, i32 11, i32 16, i32 1, i32 10, i32 3>
3754 ret <8 x i32> %3
3755 }
3756 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_8xi32_9(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>)
3757 ; CHECK-NEXT: %8 = shufflevector <4 x i32> %5, <4 x i32> %6, <4 x i32> <i32 3 , i32 5, i32 5, i32 5>
3758 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %8, <4 x i32> %4, <4 x i32> <i32 0 , i32 1, i32 7, i32 7>
3759 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
3760 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %5, <4 x i32> %1, <4 x i32> <i32 0, i32 5, i32 5, i32 5>
3761 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
3762 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %1, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
3763 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
3764 ; CHECK-NEXT: ret <4 x i32> %10
3765
3766 define <12 x i32> @shuffle_12xi32_to_12xi32_0(<12 x i32>, <12 x i32>) {
3767 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <12 x i32> <i32 18, i32 14, i 32 14, i32 4, i32 15, i32 11, i32 12, i32 14, i32 17, i32 8, i32 0, i32 3>
3768 ret <12 x i32> %3
3769 }
3770 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_12xi32_0(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3771 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %6, <4 x i32> %5, <4 x i32> <i32 2 , i32 6, i32 6, i32 6>
3772 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
3773 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 3, i32 7, i32 0, i32 2>
3774 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %6, <4 x i32> %4, <4 x i32> <i32 1, i32 4, i32 4, i32 4>
3775 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 4, i32 7>
3776 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %0, align 16
3777 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %1, align 16
3778 ; CHECK-NEXT: ret <4 x i32> %10
3779
3780 define <12 x i32> @shuffle_12xi32_to_12xi32_1(<12 x i32>, <12 x i32>) {
3781 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <12 x i32> <i32 3, i32 2, i32 10, i32 19, i32 1, i32 11, i32 21, i32 0, i32 14, i32 14, i32 13, i32 0>
3782 ret <12 x i32> %3
3783 }
3784 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_12xi32_1(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3785 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %2, <4 x i32> %4, <4 x i32> <i32 3 , i32 2, i32 6, i32 6>
3786 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
3787 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %2, <4 x i32> %4, <4 x i32> <i32 1, i32 7, i32 7, i32 7>
3788 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
3789 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
3790 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %5, <4 x i32> %2, <4 x i32> <i32 2, i32 2, i32 1, i32 4>
3791 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
3792 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
3793 ; CHECK-NEXT: ret <4 x i32> %10
3794
3795 define <12 x i32> @shuffle_12xi32_to_12xi32_2(<12 x i32>, <12 x i32>) {
3796 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <12 x i32> <i32 7, i32 13, i3 2 1, i32 10, i32 9, i32 18, i32 2, i32 17, i32 8, i32 11, i32 2, i32 18>
3797 ret <12 x i32> %3
3798 }
3799 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_12xi32_2(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3800 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %3, <4 x i32> %5, <4 x i32> <i32 3 , i32 5, i32 5, i32 5>
3801 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
3802 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
3803 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %4, <4 x i32> %6, <4 x i32> <i32 1, i32 6, i32 6, i32 6>
3804 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
3805 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
3806 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %4, <4 x i32> %2, <4 x i32> <i32 0, i32 3, i32 6, i32 6>
3807 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
3808 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %0, align 16
3809 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %1, align 16
3810 ; CHECK-NEXT: ret <4 x i32> %11
3811
3812 define <12 x i32> @shuffle_12xi32_to_12xi32_3(<12 x i32>, <12 x i32>) {
3813 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <12 x i32> <i32 5, i32 20, i3 2 1, i32 3, i32 14, i32 18, i32 10, i32 1, i32 6, i32 16, i32 21, i32 22>
3814 ret <12 x i32> %3
3815 }
3816 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_12xi32_3(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3817 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %3, <4 x i32> %7, <4 x i32> <i32 1 , i32 4, i32 4, i32 4>
3818 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 5, i32 7>
3819 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %5, <4 x i32> %6, <4 x i32> <i32 2, i32 6, i32 6, i32 6>
3820 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
3821 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
3822 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %3, <4 x i32> %6, <4 x i32> <i32 2, i32 4, i32 4, i32 4>
3823 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 5, i32 6>
3824 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
3825 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %1, align 16
3826 ; CHECK-NEXT: ret <4 x i32> %10
3827
3828 define <12 x i32> @shuffle_12xi32_to_12xi32_4(<12 x i32>, <12 x i32>) {
3829 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <12 x i32> <i32 7, i32 9, i32 16, i32 5, i32 13, i32 19, i32 6, i32 9, i32 6, i32 15, i32 8, i32 0>
3830 ret <12 x i32> %3
3831 }
3832 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_12xi32_4(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3833 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 3 , i32 5, i32 5, i32 5>
3834 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
3835 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
3836 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %5, <4 x i32> %6, <4 x i32> <i32 1, i32 7, i32 7, i32 7>
3837 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
3838 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
3839 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %3, <4 x i32> %5, <4 x i32> <i32 2, i32 7, i32 7, i32 7>
3840 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
3841 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
3842 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %0, align 16
3843 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16
3844 ; CHECK-NEXT: ret <4 x i32> %11
3845
3846 define <12 x i32> @shuffle_12xi32_to_12xi32_5(<12 x i32>, <12 x i32>) {
3847 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <12 x i32> <i32 2, i32 11, i3 2 19, i32 2, i32 14, i32 21, i32 17, i32 3, i32 1, i32 4, i32 3, i32 11>
3848 ret <12 x i32> %3
3849 }
3850 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_12xi32_5(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3851 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %2, <4 x i32> %4, <4 x i32> <i32 2 , i32 7, i32 7, i32 7>
3852 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
3853 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
3854 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %5, <4 x i32> %7, <4 x i32> <i32 2, i32 5, i32 5, i32 5>
3855 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
3856 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
3857 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %2, <4 x i32> %3, <4 x i32> <i32 1, i32 4, i32 3, i32 3>
3858 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
3859 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %0, align 16
3860 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %1, align 16
3861 ; CHECK-NEXT: ret <4 x i32> %11
3862
3863 define <12 x i32> @shuffle_12xi32_to_12xi32_6(<12 x i32>, <12 x i32>) {
3864 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <12 x i32> <i32 20, i32 6, i3 2 9, i32 13, i32 20, i32 19, i32 17, i32 21, i32 12, i32 8, i32 8, i32 8>
3865 ret <12 x i32> %3
3866 }
3867 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_12xi32_6(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3868 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %7, <4 x i32> %3, <4 x i32> <i32 0 , i32 6, i32 6, i32 6>
3869 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
3870 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
3871 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %7, <4 x i32> %6, <4 x i32> <i32 0, i32 7, i32 5, i32 1>
3872 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 0, i32 4, i32 4, i32 4>
3873 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
3874 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %1, align 16
3875 ; CHECK-NEXT: ret <4 x i32> %11
3876
3877 define <12 x i32> @shuffle_12xi32_to_12xi32_7(<12 x i32>, <12 x i32>) {
3878 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <12 x i32> <i32 10, i32 15, i 32 5, i32 15, i32 15, i32 21, i32 3, i32 16, i32 10, i32 4, i32 0, i32 17>
3879 ret <12 x i32> %3
3880 }
3881 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_12xi32_7(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3882 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 2 , i32 7, i32 7, i32 7>
3883 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
3884 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
3885 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %5, <4 x i32> %7, <4 x i32> <i32 3, i32 5, i32 5, i32 5>
3886 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
3887 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
3888 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 2, i32 4, i32 4, i32 4>
3889 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
3890 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
3891 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %0, align 16
3892 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16
3893 ; CHECK-NEXT: ret <4 x i32> %11
3894
3895 define <12 x i32> @shuffle_12xi32_to_12xi32_8(<12 x i32>, <12 x i32>) {
3896 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <12 x i32> <i32 12, i32 7, i3 2 3, i32 10, i32 11, i32 4, i32 11, i32 20, i32 15, i32 19, i32 20, i32 17>
3897 ret <12 x i32> %3
3898 }
3899 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_12xi32_8(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3900 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %5, <4 x i32> %3, <4 x i32> <i32 0 , i32 7, i32 7, i32 7>
3901 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
3902 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
3903 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 3, i32 4, i32 3, i32 3>
3904 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
3905 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %5, <4 x i32> %6, <4 x i32> <i32 3, i32 7, i32 7, i32 7>
3906 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
3907 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
3908 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
3909 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %1, align 16
3910 ; CHECK-NEXT: ret <4 x i32> %11
3911
3912 define <12 x i32> @shuffle_12xi32_to_12xi32_9(<12 x i32>, <12 x i32>) {
3913 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <12 x i32> <i32 5, i32 14, i3 2 9, i32 5, i32 15, i32 18, i32 11, i32 18, i32 19, i32 3, i32 7, i32 15>
3914 ret <12 x i32> %3
3915 }
3916 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_12xi32_9(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
3917 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %3, <4 x i32> %5, <4 x i32> <i32 1 , i32 6, i32 6, i32 6>
3918 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
3919 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
3920 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %5, <4 x i32> %6, <4 x i32> <i32 3, i32 6, i32 6, i32 6>
3921 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
3922 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
3923 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %6, <4 x i32> %2, <4 x i32> <i32 3, i32 7, i32 7, i32 7>
3924 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
3925 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
3926 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %0, align 16
3927 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16
3928 ; CHECK-NEXT: ret <4 x i32> %11
3929
3930 define <16 x i32> @shuffle_12xi32_to_16xi32_0(<12 x i32>, <12 x i32>) {
3931 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <16 x i32> <i32 15, i32 11, i 32 14, i32 12, i32 2, i32 14, i32 18, i32 2, i32 14, i32 0, i32 10, i32 5, i32 9 , i32 9, i32 21, i32 0>
3932 ret <16 x i32> %3
3933 }
3934 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_16xi32_0(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>)
3935 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %6, <4 x i32> %5, <4 x i32> <i32 3, i32 7, i32 2, i32 0>
3936 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %3, <4 x i32> %6, <4 x i32> <i32 2, i32 6, i32 6, i32 6>
3937 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
3938 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
3939 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %6, <4 x i32> %3, <4 x i32> <i32 2, i32 4, i32 4, i32 4>
3940 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
3941 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
3942 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %5, <4 x i32> %8, <4 x i32> <i32 1, i32 1, i32 5, i32 5>
3943 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
3944 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
3945 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %1, align 16
3946 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16
3947 ; CHECK-NEXT: ret <4 x i32> %10
3948
3949 define <16 x i32> @shuffle_12xi32_to_16xi32_1(<12 x i32>, <12 x i32>) {
3950 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <16 x i32> <i32 1, i32 9, i32 12, i32 2, i32 15, i32 8, i32 0, i32 20, i32 10, i32 16, i32 18, i32 17, i32 9, i32 17, i32 0, i32 18>
3951 ret <16 x i32> %3
3952 }
3953 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_16xi32_1(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>)
3954 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %3, <4 x i32> %5, <4 x i32> <i32 1, i32 5, i32 5, i32 5>
3955 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
3956 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
3957 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %6, <4 x i32> %5, <4 x i32> <i32 3, i32 4, i32 4, i32 4>
3958 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
3959 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
3960 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %5, <4 x i32> %7, <4 x i32> <i32 2, i32 4, i32 6, i32 5>
3961 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %5, <4 x i32> %7, <4 x i32> <i32 1, i32 5, i32 5, i32 5>
3962 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
3963 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
3964 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %0, align 16
3965 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %1, align 16
3966 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %2, align 16
3967 ; CHECK-NEXT: ret <4 x i32> %12
3968
3969 define <16 x i32> @shuffle_12xi32_to_16xi32_2(<12 x i32>, <12 x i32>) {
3970 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <16 x i32> <i32 18, i32 5, i3 2 6, i32 3, i32 7, i32 10, i32 22, i32 18, i32 15, i32 14, i32 14, i32 10, i32 6 , i32 14, i32 9, i32 6>
3971 ret <16 x i32> %3
3972 }
3973 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_16xi32_2(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>)
3974 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %7, <4 x i32> %4, <4 x i32> <i32 2, i32 5, i32 6, i32 6>
3975 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
3976 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 3, i32 6, i32 6, i32 6>
3977 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
3978 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
3979 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %6, <4 x i32> %5, <4 x i32> <i32 3, i32 2, i32 2, i32 6>
3980 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %4, <4 x i32> %6, <4 x i32> <i32 2, i32 6, i32 6, i32 6>
3981 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
3982 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
3983 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %0, align 16
3984 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %1, align 16
3985 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16
3986 ; CHECK-NEXT: ret <4 x i32> %11
3987
3988 define <16 x i32> @shuffle_12xi32_to_16xi32_3(<12 x i32>, <12 x i32>) {
3989 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <16 x i32> <i32 17, i32 11, i 32 6, i32 13, i32 6, i32 15, i32 22, i32 13, i32 12, i32 18, i32 15, i32 13, i32 9, i32 21, i32 22, i32 3>
3990 ret <16 x i32> %3
3991 }
3992 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_16xi32_3(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>)
3993 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %7, <4 x i32> %5, <4 x i32> <i32 1, i32 7, i32 7, i32 7>
3994 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
3995 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
3996 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %4, <4 x i32> %6, <4 x i32> <i32 2, i32 7, i32 7, i32 7>
3997 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
3998 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
3999 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %6, <4 x i32> %7, <4 x i32> <i32 0, i32 6, i32 3, i32 1>
4000 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %5, <4 x i32> %8, <4 x i32> <i32 1, i32 5, i32 6, i32 6>
4001 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
4002 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %0, align 16
4003 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %1, align 16
4004 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16
4005 ; CHECK-NEXT: ret <4 x i32> %12
4006
4007 define <16 x i32> @shuffle_12xi32_to_16xi32_4(<12 x i32>, <12 x i32>) {
4008 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <16 x i32> <i32 9, i32 6, i32 16, i32 18, i32 6, i32 8, i32 8, i32 15, i32 10, i32 18, i32 16, i32 18, i32 6, i32 1, i32 22, i32 2>
4009 ret <16 x i32> %3
4010 }
4011 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_16xi32_4(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>)
4012 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 1, i32 6, i32 6, i32 6>
4013 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 4, i32 6>
4014 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 2, i32 4, i32 4, i32 4>
4015 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
4016 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %5, <4 x i32> %7, <4 x i32> <i32 2, i32 6, i32 4, i32 6>
4017 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 2, i32 5, i32 5, i32 5>
4018 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
4019 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
4020 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
4021 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
4022 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %2, align 16
4023 ; CHECK-NEXT: ret <4 x i32> %11
4024
4025 define <16 x i32> @shuffle_12xi32_to_16xi32_5(<12 x i32>, <12 x i32>) {
4026 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <16 x i32> <i32 15, i32 3, i3 2 8, i32 18, i32 18, i32 9, i32 14, i32 4, i32 11, i32 5, i32 2, i32 6, i32 6, i 32 19, i32 0, i32 19>
4027 ret <16 x i32> %3
4028 }
4029 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_16xi32_5(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>)
4030 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %6, <4 x i32> %3, <4 x i32> <i32 3, i32 7, i32 7, i32 7>
4031 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
4032 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
4033 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %7, <4 x i32> %5, <4 x i32> <i32 2, i32 5, i32 5, i32 5>
4034 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
4035 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
4036 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 3, i32 5, i32 5, i32 5>
4037 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
4038 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
4039 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %4, <4 x i32> %7, <4 x i32> <i32 2, i32 7, i32 7, i32 7>
4040 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %19, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
4041 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %20, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
4042 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %0, align 16
4043 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %1, align 16
4044 ; CHECK-NEXT: store <4 x i32> %21, <4 x i32>* %2, align 16
4045 ; CHECK-NEXT: ret <4 x i32> %12
4046
4047 define <16 x i32> @shuffle_12xi32_to_16xi32_6(<12 x i32>, <12 x i32>) {
4048 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <16 x i32> <i32 6, i32 7, i32 18, i32 5, i32 1, i32 16, i32 21, i32 11, i32 2, i32 2, i32 0, i32 19, i32 10, i32 10, i32 21, i32 19>
4049 ret <16 x i32> %3
4050 }
4051 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_16xi32_6(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>)
4052 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %4, <4 x i32> %7, <4 x i32> <i32 2, i32 3, i32 6, i32 1>
4053 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %3, <4 x i32> %7, <4 x i32> <i32 1, i32 4, i32 4, i32 4>
4054 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
4055 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
4056 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %3, <4 x i32> %7, <4 x i32> <i32 2, i32 2, i32 0, i32 7>
4057 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %5, <4 x i32> %8, <4 x i32> <i32 2, i32 2, i32 5, i32 5>
4058 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
4059 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
4060 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
4061 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %2, align 16
4062 ; CHECK-NEXT: ret <4 x i32> %10
4063
4064 define <16 x i32> @shuffle_12xi32_to_16xi32_7(<12 x i32>, <12 x i32>) {
4065 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <16 x i32> <i32 19, i32 21, i 32 22, i32 12, i32 18, i32 11, i32 20, i32 5, i32 12, i32 5, i32 22, i32 16, i32 6, i32 9, i32 13, i32 17>
4066 ret <16 x i32> %3
4067 }
4068 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_16xi32_7(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>)
4069 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %7, <4 x i32> %8, <4 x i32> <i32 3, i32 5, i32 6, i32 6>
4070 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
4071 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %7, <4 x i32> %5, <4 x i32> <i32 2, i32 7, i32 7, i32 7>
4072 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
4073 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
4074 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %6, <4 x i32> %4, <4 x i32> <i32 0, i32 5, i32 5, i32 5>
4075 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
4076 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
4077 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 2, i32 5, i32 5, i32 5>
4078 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
4079 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %19, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
4080 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %0, align 16
4081 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16
4082 ; CHECK-NEXT: store <4 x i32> %20, <4 x i32>* %2, align 16
4083 ; CHECK-NEXT: ret <4 x i32> %11
4084
4085 define <16 x i32> @shuffle_12xi32_to_16xi32_8(<12 x i32>, <12 x i32>) {
4086 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <16 x i32> <i32 0, i32 17, i3 2 16, i32 3, i32 12, i32 3, i32 20, i32 22, i32 8, i32 9, i32 0, i32 20, i32 11, i32 20, i32 13, i32 6>
4087 ret <16 x i32> %3
4088 }
4089 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_16xi32_8(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>)
4090 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %3, <4 x i32> %7, <4 x i32> <i32 0, i32 5, i32 4, i32 3>
4091 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %6, <4 x i32> %3, <4 x i32> <i32 0, i32 7, i32 7, i32 7>
4092 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 4, i32 6>
4093 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %5, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
4094 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
4095 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %5, <4 x i32> %8, <4 x i32> <i32 3, i32 4, i32 4, i32 4>
4096 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
4097 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
4098 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
4099 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
4100 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %2, align 16
4101 ; CHECK-NEXT: ret <4 x i32> %10
4102
4103 define <16 x i32> @shuffle_12xi32_to_16xi32_9(<12 x i32>, <12 x i32>) {
4104 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <16 x i32> <i32 0, i32 6, i32 10, i32 3, i32 9, i32 2, i32 22, i32 22, i32 5, i32 9, i32 21, i32 17, i32 6, i 32 2, i32 12, i32 20>
4105 ret <16 x i32> %3
4106 }
4107 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_16xi32_9(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>)
4108 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 0, i32 6, i32 6, i32 6>
4109 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
4110 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
4111 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %5, <4 x i32> %3, <4 x i32> <i32 1, i32 6, i32 6, i32 6>
4112 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
4113 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 1, i32 5, i32 5, i32 5>
4114 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
4115 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
4116 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 2, i32 6, i32 6, i32 6>
4117 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
4118 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %19, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
4119 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %0, align 16
4120 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16
4121 ; CHECK-NEXT: store <4 x i32> %20, <4 x i32>* %2, align 16
4122 ; CHECK-NEXT: ret <4 x i32> %12
4123
4124 define <20 x i32> @shuffle_12xi32_to_20xi32_0(<12 x i32>, <12 x i32>) {
4125 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <20 x i32> <i32 13, i32 15, i 32 10, i32 6, i32 14, i32 0, i32 3, i32 9, i32 14, i32 4, i32 8, i32 20, i32 19, i32 1, i32 16, i32 20, i32 7, i32 7, i32 13, i32 20>
4126 ret <20 x i32> %3
4127 }
4128 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_20xi32_0(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4129 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %7, <4 x i32> %6, <4 x i32> <i32 1, i32 3, i32 6, i32 6>
4130 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
4131 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %7, <4 x i32> %4, <4 x i32> <i32 2, i32 4, i32 7, i32 7>
4132 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
4133 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %7, <4 x i32> %5, <4 x i32> <i32 2, i32 4, i32 4, i32 4>
4134 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
4135 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
4136 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %8, <4 x i32> %4, <4 x i32> <i32 3, i32 5, i32 0, i32 0>
4137 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
4138 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %5, <4 x i32> %7, <4 x i32> <i32 3, i32 3, i32 5, i32 5>
4139 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %20, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
4140 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %0, align 16
4141 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16
4142 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %2, align 16
4143 ; CHECK-NEXT: store <4 x i32> %21, <4 x i32>* %3, align 16
4144 ; CHECK-NEXT: ret <4 x i32> %12
4145
4146 define <20 x i32> @shuffle_12xi32_to_20xi32_1(<12 x i32>, <12 x i32>) {
4147 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <20 x i32> <i32 4, i32 2, i32 9, i32 14, i32 22, i32 17, i32 12, i32 10, i32 6, i32 13, i32 21, i32 14, i32 2 , i32 19, i32 17, i32 12, i32 15, i32 17, i32 9, i32 12>
4148 ret <20 x i32> %3
4149 }
4150 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_20xi32_1(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4151 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 0, i32 6, i32 6, i32 6>
4152 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
4153 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
4154 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %9, <4 x i32> %8, <4 x i32> <i32 2, i32 5, i32 5, i32 5>
4155 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
4156 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
4157 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %5, <4 x i32> %7, <4 x i32> <i32 2, i32 5, i32 5, i32 5>
4158 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
4159 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
4160 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %4, <4 x i32> %8, <4 x i32> <i32 2, i32 7, i32 5, i32 5>
4161 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %20, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
4162 ; CHECK-NEXT: %22 = shufflevector <4 x i32> %7, <4 x i32> %8, <4 x i32> <i32 3, i32 5, i32 5, i32 5>
4163 ; CHECK-NEXT: %23 = shufflevector <4 x i32> %22, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
4164 ; CHECK-NEXT: %24 = shufflevector <4 x i32> %23, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
4165 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
4166 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %1, align 16
4167 ; CHECK-NEXT: store <4 x i32> %21, <4 x i32>* %2, align 16
4168 ; CHECK-NEXT: store <4 x i32> %24, <4 x i32>* %3, align 16
4169 ; CHECK-NEXT: ret <4 x i32> %13
4170
4171 define <20 x i32> @shuffle_12xi32_to_20xi32_2(<12 x i32>, <12 x i32>) {
4172 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <20 x i32> <i32 3, i32 1, i32 10, i32 4, i32 17, i32 18, i32 9, i32 17, i32 9, i32 13, i32 1, i32 20, i32 11, i32 0, i32 15, i32 15, i32 16, i32 3, i32 19, i32 12>
4173 ret <20 x i32> %3
4174 }
4175 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_20xi32_2(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4176 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %4, <4 x i32> %6, <4 x i32> <i32 3, i32 1, i32 6, i32 6>
4177 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
4178 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %8, <4 x i32> %6, <4 x i32> <i32 1, i32 2, i32 5, i32 1>
4179 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %6, <4 x i32> %7, <4 x i32> <i32 1, i32 5, i32 5, i32 5>
4180 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
4181 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
4182 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %6, <4 x i32> %4, <4 x i32> <i32 3, i32 4, i32 4, i32 4>
4183 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
4184 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %8, <4 x i32> %4, <4 x i32> <i32 0, i32 7, i32 3, i32 3>
4185 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %19, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
4186 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
4187 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %1, align 16
4188 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16
4189 ; CHECK-NEXT: store <4 x i32> %20, <4 x i32>* %3, align 16
4190 ; CHECK-NEXT: ret <4 x i32> %12
4191
4192 define <20 x i32> @shuffle_12xi32_to_20xi32_3(<12 x i32>, <12 x i32>) {
4193 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <20 x i32> <i32 2, i32 4, i32 0, i32 22, i32 17, i32 18, i32 15, i32 7, i32 4, i32 9, i32 2, i32 9, i32 10, i 32 6, i32 19, i32 6, i32 15, i32 7, i32 5, i32 5>
4194 ret <20 x i32> %3
4195 }
4196 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_20xi32_3(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4197 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 2, i32 4, i32 0, i32 0>
4198 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
4199 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %8, <4 x i32> %7, <4 x i32> <i32 1, i32 2, i32 7, i32 7>
4200 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
4201 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %5, <4 x i32> %6, <4 x i32> <i32 0, i32 5, i32 5, i32 5>
4202 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
4203 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
4204 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %6, <4 x i32> %5, <4 x i32> <i32 2, i32 6, i32 6, i32 6>
4205 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
4206 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %19, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
4207 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %7, <4 x i32> %5, <4 x i32> <i32 3, i32 7, i32 5, i32 5>
4208 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %0, align 16
4209 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16
4210 ; CHECK-NEXT: store <4 x i32> %20, <4 x i32>* %2, align 16
4211 ; CHECK-NEXT: store <4 x i32> %21, <4 x i32>* %3, align 16
4212 ; CHECK-NEXT: ret <4 x i32> %12
4213
4214 define <20 x i32> @shuffle_12xi32_to_20xi32_4(<12 x i32>, <12 x i32>) {
4215 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <20 x i32> <i32 4, i32 20, i3 2 1, i32 15, i32 17, i32 13, i32 7, i32 8, i32 10, i32 22, i32 7, i32 8, i32 11, i32 14, i32 0, i32 12, i32 12, i32 14, i32 19, i32 3>
4216 ret <20 x i32> %3
4217 }
4218 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_20xi32_4(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4219 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %5, <4 x i32> %9, <4 x i32> <i32 0, i32 4, i32 4, i32 4>
4220 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
4221 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
4222 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %8, <4 x i32> %7, <4 x i32> <i32 1, i32 5, i32 5, i32 5>
4223 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
4224 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
4225 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %6, <4 x i32> %9, <4 x i32> <i32 2, i32 6, i32 6, i32 6>
4226 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
4227 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
4228 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %6, <4 x i32> %7, <4 x i32> <i32 3, i32 6, i32 6, i32 6>
4229 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %20, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
4230 ; CHECK-NEXT: %22 = shufflevector <4 x i32> %21, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
4231 ; CHECK-NEXT: %23 = shufflevector <4 x i32> %7, <4 x i32> %8, <4 x i32> <i32 0, i32 2, i32 7, i32 7>
4232 ; CHECK-NEXT: %24 = shufflevector <4 x i32> %23, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
4233 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
4234 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %1, align 16
4235 ; CHECK-NEXT: store <4 x i32> %22, <4 x i32>* %2, align 16
4236 ; CHECK-NEXT: store <4 x i32> %24, <4 x i32>* %3, align 16
4237 ; CHECK-NEXT: ret <4 x i32> %13
4238
4239 define <20 x i32> @shuffle_12xi32_to_20xi32_5(<12 x i32>, <12 x i32>) {
4240 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <20 x i32> <i32 20, i32 21, i 32 13, i32 7, i32 13, i32 6, i32 20, i32 17, i32 1, i32 9, i32 16, i32 8, i32 21 , i32 21, i32 7, i32 10, i32 5, i32 10, i32 8, i32 18>
4241 ret <20 x i32> %3
4242 }
4243 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_20xi32_5(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4244 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %9, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
4245 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
4246 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %7, <4 x i32> %5, <4 x i32> <i32 1, i32 6, i32 6, i32 6>
4247 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
4248 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
4249 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %4, <4 x i32> %6, <4 x i32> <i32 1, i32 5, i32 5, i32 5>
4250 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
4251 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
4252 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %9, <4 x i32> %5, <4 x i32> <i32 1, i32 1, i32 7, i32 7>
4253 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %19, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
4254 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %5, <4 x i32> %6, <4 x i32> <i32 1, i32 6, i32 4, i32 4>
4255 ; CHECK-NEXT: %22 = shufflevector <4 x i32> %21, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
4256 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %0, align 16
4257 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %1, align 16
4258 ; CHECK-NEXT: store <4 x i32> %20, <4 x i32>* %2, align 16
4259 ; CHECK-NEXT: store <4 x i32> %22, <4 x i32>* %3, align 16
4260 ; CHECK-NEXT: ret <4 x i32> %12
4261
4262 define <20 x i32> @shuffle_12xi32_to_20xi32_6(<12 x i32>, <12 x i32>) {
4263 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <20 x i32> <i32 14, i32 19, i 32 14, i32 3, i32 6, i32 9, i32 17, i32 21, i32 8, i32 16, i32 16, i32 7, i32 13 , i32 20, i32 4, i32 11, i32 10, i32 4, i32 4, i32 19>
4264 ret <20 x i32> %3
4265 }
4266 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_20xi32_6(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4267 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %7, <4 x i32> %8, <4 x i32> <i32 2, i32 7, i32 2, i32 2>
4268 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
4269 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %5, <4 x i32> %6, <4 x i32> <i32 2, i32 5, i32 5, i32 5>
4270 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
4271 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
4272 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %6, <4 x i32> %8, <4 x i32> <i32 0, i32 4, i32 4, i32 4>
4273 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
4274 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %7, <4 x i32> %9, <4 x i32> <i32 1, i32 4, i32 4, i32 4>
4275 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
4276 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %19, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
4277 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %6, <4 x i32> %5, <4 x i32> <i32 2, i32 4, i32 4, i32 4>
4278 ; CHECK-NEXT: %22 = shufflevector <4 x i32> %21, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
4279 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %0, align 16
4280 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16
4281 ; CHECK-NEXT: store <4 x i32> %20, <4 x i32>* %2, align 16
4282 ; CHECK-NEXT: store <4 x i32> %22, <4 x i32>* %3, align 16
4283 ; CHECK-NEXT: ret <4 x i32> %12
4284
4285 define <20 x i32> @shuffle_12xi32_to_20xi32_7(<12 x i32>, <12 x i32>) {
4286 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <20 x i32> <i32 22, i32 5, i3 2 5, i32 6, i32 9, i32 16, i32 19, i32 16, i32 14, i32 9, i32 10, i32 5, i32 3, i32 10, i32 20, i32 18, i32 18, i32 11, i32 17, i32 7>
4287 ret <20 x i32> %3
4288 }
4289 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_20xi32_7(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4290 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %9, <4 x i32> %5, <4 x i32> <i32 2, i32 5, i32 5, i32 6>
4291 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %6, <4 x i32> %8, <4 x i32> <i32 1, i32 4, i32 7, i32 4>
4292 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %7, <4 x i32> %6, <4 x i32> <i32 2, i32 5, i32 6, i32 6>
4293 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
4294 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %4, <4 x i32> %6, <4 x i32> <i32 3, i32 6, i32 6, i32 6>
4295 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
4296 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
4297 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %8, <4 x i32> %6, <4 x i32> <i32 2, i32 7, i32 1, i32 1>
4298 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
4299 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
4300 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
4301 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %2, align 16
4302 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16
4303 ; CHECK-NEXT: ret <4 x i32> %11
4304
4305 define <20 x i32> @shuffle_12xi32_to_20xi32_8(<12 x i32>, <12 x i32>) {
4306 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <20 x i32> <i32 18, i32 21, i 32 0, i32 1, i32 4, i32 4, i32 11, i32 10, i32 9, i32 21, i32 16, i32 6, i32 7, i32 1, i32 9, i32 14, i32 11, i32 1, i32 18, i32 18>
4307 ret <20 x i32> %3
4308 }
4309 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_20xi32_8(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4310 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %8, <4 x i32> %9, <4 x i32> <i32 2, i32 5, i32 5, i32 5>
4311 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
4312 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %5, <4 x i32> %6, <4 x i32> <i32 0, i32 0, i32 7, i32 6>
4313 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %6, <4 x i32> %9, <4 x i32> <i32 1, i32 5, i32 5, i32 5>
4314 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
4315 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
4316 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 3, i32 5, i32 5, i32 5>
4317 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
4318 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
4319 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %6, <4 x i32> %4, <4 x i32> <i32 3, i32 5, i32 5, i32 5>
4320 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %20, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
4321 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
4322 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %1, align 16
4323 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %2, align 16
4324 ; CHECK-NEXT: store <4 x i32> %21, <4 x i32>* %3, align 16
4325 ; CHECK-NEXT: ret <4 x i32> %12
4326
4327 define <20 x i32> @shuffle_12xi32_to_20xi32_9(<12 x i32>, <12 x i32>) {
4328 %3 = shufflevector <12 x i32> %0, <12 x i32> %1, <20 x i32> <i32 21, i32 10, i 32 18, i32 0, i32 7, i32 16, i32 4, i32 15, i32 5, i32 20, i32 8, i32 19, i32 4, i32 20, i32 20, i32 7, i32 13, i32 7, i32 9, i32 13>
4329 ret <20 x i32> %3
4330 }
4331 ; CHECK-LABEL: define <4 x i32> @shuffle_12xi32_to_20xi32_9(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4332 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %9, <4 x i32> %6, <4 x i32> <i32 1, i32 6, i32 6, i32 6>
4333 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
4334 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
4335 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %5, <4 x i32> %8, <4 x i32> <i32 3, i32 4, i32 0, i32 0>
4336 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
4337 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %5, <4 x i32> %9, <4 x i32> <i32 1, i32 4, i32 4, i32 4>
4338 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
4339 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
4340 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %5, <4 x i32> %9, <4 x i32> <i32 0, i32 4, i32 4, i32 3>
4341 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %7, <4 x i32> %5, <4 x i32> <i32 1, i32 7, i32 7, i32 7>
4342 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %20, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
4343 ; CHECK-NEXT: %22 = shufflevector <4 x i32> %21, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
4344 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %0, align 16
4345 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %1, align 16
4346 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %2, align 16
4347 ; CHECK-NEXT: store <4 x i32> %22, <4 x i32>* %3, align 16
4348 ; CHECK-NEXT: ret <4 x i32> %13
4349
4350 define <2 x i32> @shuffle_16xi32_to_2xi32_0(<16 x i32>, <16 x i32>) {
4351 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <2 x i32> <i32 3, i32 12>
4352 ret <2 x i32> %3
4353 }
4354 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_2xi32_0(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4355 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %0, <4 x i32> %3, <4 x i32> <i32 3 , i32 4, i32 4, i32 4>
4356 ; CHECK-NEXT: ret <4 x i32> %9
4357
4358 define <2 x i32> @shuffle_16xi32_to_2xi32_1(<16 x i32>, <16 x i32>) {
4359 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <2 x i32> <i32 1, i32 2>
4360 ret <2 x i32> %3
4361 }
4362 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_2xi32_1(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4363 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %0, <4 x i32> undef, <4 x i32> <i3 2 1, i32 2, i32 2, i32 2>
4364 ; CHECK-NEXT: ret <4 x i32> %9
4365
4366 define <2 x i32> @shuffle_16xi32_to_2xi32_2(<16 x i32>, <16 x i32>) {
4367 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <2 x i32> <i32 14, i32 1>
4368 ret <2 x i32> %3
4369 }
4370 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_2xi32_2(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4371 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %3, <4 x i32> %0, <4 x i32> <i32 2 , i32 5, i32 5, i32 5>
4372 ; CHECK-NEXT: ret <4 x i32> %9
4373
4374 define <2 x i32> @shuffle_16xi32_to_2xi32_3(<16 x i32>, <16 x i32>) {
4375 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <2 x i32> <i32 21, i32 25>
4376 ret <2 x i32> %3
4377 }
4378 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_2xi32_3(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4379 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %5, <4 x i32> %6, <4 x i32> <i32 1 , i32 5, i32 5, i32 5>
4380 ; CHECK-NEXT: ret <4 x i32> %9
4381
4382 define <2 x i32> @shuffle_16xi32_to_2xi32_4(<16 x i32>, <16 x i32>) {
4383 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <2 x i32> <i32 18, i32 6>
4384 ret <2 x i32> %3
4385 }
4386 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_2xi32_4(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4387 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %4, <4 x i32> %1, <4 x i32> <i32 2 , i32 6, i32 6, i32 6>
4388 ; CHECK-NEXT: ret <4 x i32> %9
4389
4390 define <2 x i32> @shuffle_16xi32_to_2xi32_5(<16 x i32>, <16 x i32>) {
4391 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <2 x i32> <i32 13, i32 20>
4392 ret <2 x i32> %3
4393 }
4394 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_2xi32_5(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4395 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %3, <4 x i32> %5, <4 x i32> <i32 1 , i32 4, i32 4, i32 4>
4396 ; CHECK-NEXT: ret <4 x i32> %9
4397
4398 define <2 x i32> @shuffle_16xi32_to_2xi32_6(<16 x i32>, <16 x i32>) {
4399 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <2 x i32> <i32 10, i32 0>
4400 ret <2 x i32> %3
4401 }
4402 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_2xi32_6(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4403 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %2, <4 x i32> %0, <4 x i32> <i32 2 , i32 4, i32 4, i32 4>
4404 ; CHECK-NEXT: ret <4 x i32> %9
4405
4406 define <2 x i32> @shuffle_16xi32_to_2xi32_7(<16 x i32>, <16 x i32>) {
4407 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <2 x i32> <i32 12, i32 24>
4408 ret <2 x i32> %3
4409 }
4410 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_2xi32_7(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4411 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %3, <4 x i32> %6, <4 x i32> <i32 0 , i32 4, i32 4, i32 4>
4412 ; CHECK-NEXT: ret <4 x i32> %9
4413
4414 define <2 x i32> @shuffle_16xi32_to_2xi32_8(<16 x i32>, <16 x i32>) {
4415 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <2 x i32> <i32 22, i32 21>
4416 ret <2 x i32> %3
4417 }
4418 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_2xi32_8(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4419 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %5, <4 x i32> undef, <4 x i32> <i3 2 2, i32 1, i32 1, i32 1>
4420 ; CHECK-NEXT: ret <4 x i32> %9
4421
4422 define <2 x i32> @shuffle_16xi32_to_2xi32_9(<16 x i32>, <16 x i32>) {
4423 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <2 x i32> <i32 27, i32 20>
4424 ret <2 x i32> %3
4425 }
4426 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_2xi32_9(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4427 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %6, <4 x i32> %5, <4 x i32> <i32 3 , i32 4, i32 4, i32 4>
4428 ; CHECK-NEXT: ret <4 x i32> %9
4429
4430 define <4 x i32> @shuffle_16xi32_to_4xi32_0(<16 x i32>, <16 x i32>) {
4431 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <4 x i32> <i32 22, i32 6, i32 29, i32 29>
4432 ret <4 x i32> %3
4433 }
4434 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_4xi32_0(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4435 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %5, <4 x i32> %1, <4 x i32> <i32 2 , i32 6, i32 6, i32 6>
4436 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
4437 ; CHECK-NEXT: ret <4 x i32> %10
4438
4439 define <4 x i32> @shuffle_16xi32_to_4xi32_1(<16 x i32>, <16 x i32>) {
4440 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <4 x i32> <i32 28, i32 29, i3 2 14, i32 17>
4441 ret <4 x i32> %3
4442 }
4443 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_4xi32_1(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4444 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %7, <4 x i32> %3, <4 x i32> <i32 0 , i32 1, i32 6, i32 6>
4445 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
4446 ; CHECK-NEXT: ret <4 x i32> %10
4447
4448 define <4 x i32> @shuffle_16xi32_to_4xi32_2(<16 x i32>, <16 x i32>) {
4449 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <4 x i32> <i32 18, i32 5, i32 4, i32 10>
4450 ret <4 x i32> %3
4451 }
4452 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_4xi32_2(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4453 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %4, <4 x i32> %1, <4 x i32> <i32 2 , i32 5, i32 4, i32 4>
4454 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
4455 ; CHECK-NEXT: ret <4 x i32> %10
4456
4457 define <4 x i32> @shuffle_16xi32_to_4xi32_3(<16 x i32>, <16 x i32>) {
4458 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <4 x i32> <i32 9, i32 19, i32 22, i32 22>
4459 ret <4 x i32> %3
4460 }
4461 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_4xi32_3(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4462 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %2, <4 x i32> %4, <4 x i32> <i32 1 , i32 7, i32 7, i32 7>
4463 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
4464 ; CHECK-NEXT: ret <4 x i32> %10
4465
4466 define <4 x i32> @shuffle_16xi32_to_4xi32_4(<16 x i32>, <16 x i32>) {
4467 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <4 x i32> <i32 28, i32 13, i3 2 0, i32 26>
4468 ret <4 x i32> %3
4469 }
4470 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_4xi32_4(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4471 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %7, <4 x i32> %3, <4 x i32> <i32 0 , i32 5, i32 5, i32 5>
4472 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %0, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
4473 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
4474 ; CHECK-NEXT: ret <4 x i32> %11
4475
4476 define <4 x i32> @shuffle_16xi32_to_4xi32_5(<16 x i32>, <16 x i32>) {
4477 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <4 x i32> <i32 24, i32 1, i32 25, i32 27>
4478 ret <4 x i32> %3
4479 }
4480 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_4xi32_5(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4481 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %6, <4 x i32> %0, <4 x i32> <i32 0 , i32 5, i32 1, i32 3>
4482 ; CHECK-NEXT: ret <4 x i32> %9
4483
4484 define <4 x i32> @shuffle_16xi32_to_4xi32_6(<16 x i32>, <16 x i32>) {
4485 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <4 x i32> <i32 12, i32 6, i32 19, i32 11>
4486 ret <4 x i32> %3
4487 }
4488 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_4xi32_6(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4489 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %3, <4 x i32> %1, <4 x i32> <i32 0 , i32 6, i32 6, i32 6>
4490 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
4491 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
4492 ; CHECK-NEXT: ret <4 x i32> %11
4493
4494 define <4 x i32> @shuffle_16xi32_to_4xi32_7(<16 x i32>, <16 x i32>) {
4495 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <4 x i32> <i32 12, i32 14, i3 2 19, i32 17>
4496 ret <4 x i32> %3
4497 }
4498 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_4xi32_7(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4499 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 0 , i32 2, i32 7, i32 5>
4500 ; CHECK-NEXT: ret <4 x i32> %9
4501
4502 define <4 x i32> @shuffle_16xi32_to_4xi32_8(<16 x i32>, <16 x i32>) {
4503 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <4 x i32> <i32 12, i32 11, i3 2 24, i32 4>
4504 ret <4 x i32> %3
4505 }
4506 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_4xi32_8(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4507 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 0 , i32 7, i32 7, i32 7>
4508 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
4509 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %1, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
4510 ; CHECK-NEXT: ret <4 x i32> %11
4511
4512 define <4 x i32> @shuffle_16xi32_to_4xi32_9(<16 x i32>, <16 x i32>) {
4513 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <4 x i32> <i32 2, i32 0, i32 20, i32 28>
4514 ret <4 x i32> %3
4515 }
4516 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_4xi32_9(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4517 ; CHECK-NEXT: %9 = shufflevector <4 x i32> %0, <4 x i32> %5, <4 x i32> <i32 2 , i32 0, i32 4, i32 4>
4518 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %9, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
4519 ; CHECK-NEXT: ret <4 x i32> %10
4520
4521 define <6 x i32> @shuffle_16xi32_to_6xi32_0(<16 x i32>, <16 x i32>) {
4522 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <6 x i32> <i32 21, i32 11, i3 2 20, i32 26, i32 25, i32 5>
4523 ret <6 x i32> %3
4524 }
4525 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_6xi32_0(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>)
4526 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %6, <4 x i32> %3, <4 x i32> <i32 1, i32 7, i32 0, i32 0>
4527 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
4528 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %7, <4 x i32> %2, <4 x i32> <i32 1, i32 5, i32 5, i32 5>
4529 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
4530 ; CHECK-NEXT: ret <4 x i32> %11
4531
4532 define <6 x i32> @shuffle_16xi32_to_6xi32_1(<16 x i32>, <16 x i32>) {
4533 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <6 x i32> <i32 14, i32 12, i3 2 17, i32 30, i32 28, i32 15>
4534 ret <6 x i32> %3
4535 }
4536 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_6xi32_1(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>)
4537 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 2, i32 0, i32 5, i32 5>
4538 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
4539 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %8, <4 x i32> %4, <4 x i32> <i32 0, i32 7, i32 7, i32 7>
4540 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
4541 ; CHECK-NEXT: ret <4 x i32> %11
4542
4543 define <6 x i32> @shuffle_16xi32_to_6xi32_2(<16 x i32>, <16 x i32>) {
4544 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <6 x i32> <i32 25, i32 3, i32 21, i32 5, i32 8, i32 30>
4545 ret <6 x i32> %3
4546 }
4547 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_6xi32_2(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>)
4548 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %7, <4 x i32> %1, <4 x i32> <i32 1, i32 7, i32 7, i32 7>
4549 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
4550 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
4551 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %3, <4 x i32> %8, <4 x i32> <i32 0, i32 6, i32 6, i32 6>
4552 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
4553 ; CHECK-NEXT: ret <4 x i32> %12
4554
4555 define <6 x i32> @shuffle_16xi32_to_6xi32_3(<16 x i32>, <16 x i32>) {
4556 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <6 x i32> <i32 8, i32 16, i32 28, i32 18, i32 7, i32 19>
4557 ret <6 x i32> %3
4558 }
4559 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_6xi32_3(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>)
4560 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %3, <4 x i32> %5, <4 x i32> <i32 0, i32 4, i32 4, i32 4>
4561 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
4562 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
4563 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %2, <4 x i32> %5, <4 x i32> <i32 3, i32 7, i32 7, i32 7>
4564 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
4565 ; CHECK-NEXT: ret <4 x i32> %12
4566
4567 define <6 x i32> @shuffle_16xi32_to_6xi32_4(<16 x i32>, <16 x i32>) {
4568 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <6 x i32> <i32 13, i32 7, i32 8, i32 5, i32 13, i32 19>
4569 ret <6 x i32> %3
4570 }
4571 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_6xi32_4(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>)
4572 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %4, <4 x i32> %2, <4 x i32> <i32 1, i32 7, i32 7, i32 7>
4573 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
4574 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
4575 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 1, i32 7, i32 7, i32 7>
4576 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
4577 ; CHECK-NEXT: ret <4 x i32> %12
4578
4579 define <6 x i32> @shuffle_16xi32_to_6xi32_5(<16 x i32>, <16 x i32>) {
4580 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <6 x i32> <i32 26, i32 0, i32 0, i32 2, i32 16, i32 9>
4581 ret <6 x i32> %3
4582 }
4583 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_6xi32_5(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>)
4584 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %7, <4 x i32> %1, <4 x i32> <i32 2, i32 4, i32 4, i32 6>
4585 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %5, <4 x i32> %3, <4 x i32> <i32 0, i32 5, i32 5, i32 5>
4586 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %0, align 16
4587 ; CHECK-NEXT: ret <4 x i32> %10
4588
4589 define <6 x i32> @shuffle_16xi32_to_6xi32_6(<16 x i32>, <16 x i32>) {
4590 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <6 x i32> <i32 20, i32 30, i3 2 11, i32 0, i32 20, i32 3>
4591 ret <6 x i32> %3
4592 }
4593 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_6xi32_6(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>)
4594 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %6, <4 x i32> %8, <4 x i32> <i32 0, i32 6, i32 6, i32 6>
4595 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
4596 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %1, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
4597 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %6, <4 x i32> %1, <4 x i32> <i32 0, i32 7, i32 7, i32 7>
4598 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
4599 ; CHECK-NEXT: ret <4 x i32> %12
4600
4601 define <6 x i32> @shuffle_16xi32_to_6xi32_7(<16 x i32>, <16 x i32>) {
4602 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <6 x i32> <i32 10, i32 3, i32 7, i32 6, i32 2, i32 11>
4603 ret <6 x i32> %3
4604 }
4605 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_6xi32_7(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>)
4606 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %3, <4 x i32> %1, <4 x i32> <i32 2, i32 7, i32 7, i32 7>
4607 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 7, i32 6>
4608 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %1, <4 x i32> %3, <4 x i32> <i32 2, i32 7, i32 7, i32 7>
4609 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
4610 ; CHECK-NEXT: ret <4 x i32> %11
4611
4612 define <6 x i32> @shuffle_16xi32_to_6xi32_8(<16 x i32>, <16 x i32>) {
4613 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <6 x i32> <i32 15, i32 16, i3 2 19, i32 12, i32 18, i32 29>
4614 ret <6 x i32> %3
4615 }
4616 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_6xi32_8(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>)
4617 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 3, i32 4, i32 7, i32 0>
4618 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %5, <4 x i32> %8, <4 x i32> <i32 2, i32 5, i32 5, i32 5>
4619 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %0, align 16
4620 ; CHECK-NEXT: ret <4 x i32> %10
4621
4622 define <6 x i32> @shuffle_16xi32_to_6xi32_9(<16 x i32>, <16 x i32>) {
4623 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <6 x i32> <i32 15, i32 4, i32 4, i32 15, i32 0, i32 16>
4624 ret <6 x i32> %3
4625 }
4626 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_6xi32_9(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>)
4627 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %4, <4 x i32> %2, <4 x i32> <i32 3, i32 4, i32 4, i32 3>
4628 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %1, <4 x i32> %5, <4 x i32> <i32 0, i32 4, i32 4, i32 4>
4629 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %0, align 16
4630 ; CHECK-NEXT: ret <4 x i32> %10
4631
4632 define <8 x i32> @shuffle_16xi32_to_8xi32_0(<16 x i32>, <16 x i32>) {
4633 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <8 x i32> <i32 17, i32 20, i3 2 29, i32 9, i32 9, i32 7, i32 17, i32 22>
4634 ret <8 x i32> %3
4635 }
4636 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_8xi32_0(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>)
4637 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %5, <4 x i32> %6, <4 x i32> <i32 1, i32 4, i32 4, i32 4>
4638 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
4639 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
4640 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 1, i32 7, i32 7, i32 7>
4641 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
4642 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
4643 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %0, align 16
4644 ; CHECK-NEXT: ret <4 x i32> %12
4645
4646 define <8 x i32> @shuffle_16xi32_to_8xi32_1(<16 x i32>, <16 x i32>) {
4647 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <8 x i32> <i32 1, i32 12, i32 18, i32 23, i32 15, i32 6, i32 0, i32 28>
4648 ret <8 x i32> %3
4649 }
4650 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_8xi32_1(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>)
4651 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %1, <4 x i32> %4, <4 x i32> <i32 1, i32 4, i32 4, i32 4>
4652 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
4653 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
4654 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %4, <4 x i32> %2, <4 x i32> <i32 3, i32 6, i32 6, i32 6>
4655 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %1, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
4656 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
4657 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %0, align 16
4658 ; CHECK-NEXT: ret <4 x i32> %12
4659
4660 define <8 x i32> @shuffle_16xi32_to_8xi32_2(<16 x i32>, <16 x i32>) {
4661 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <8 x i32> <i32 21, i32 6, i32 11, i32 22, i32 23, i32 30, i32 1, i32 2>
4662 ret <8 x i32> %3
4663 }
4664 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_8xi32_2(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>)
4665 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %6, <4 x i32> %2, <4 x i32> <i32 1, i32 6, i32 6, i32 6>
4666 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
4667 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
4668 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %6, <4 x i32> %8, <4 x i32> <i32 3, i32 6, i32 6, i32 6>
4669 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %1, <4 x i32> <i32 0, i32 1, i32 5, i32 6>
4670 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %0, align 16
4671 ; CHECK-NEXT: ret <4 x i32> %12
4672
4673 define <8 x i32> @shuffle_16xi32_to_8xi32_3(<16 x i32>, <16 x i32>) {
4674 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <8 x i32> <i32 12, i32 29, i3 2 3, i32 24, i32 29, i32 4, i32 8, i32 2>
4675 ret <8 x i32> %3
4676 }
4677 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_8xi32_3(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>)
4678 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %4, <4 x i32> %8, <4 x i32> <i32 0, i32 5, i32 5, i32 5>
4679 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %1, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
4680 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
4681 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %8, <4 x i32> %2, <4 x i32> <i32 1, i32 4, i32 4, i32 4>
4682 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
4683 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %1, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
4684 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %0, align 16
4685 ; CHECK-NEXT: ret <4 x i32> %12
4686
4687 define <8 x i32> @shuffle_16xi32_to_8xi32_4(<16 x i32>, <16 x i32>) {
4688 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <8 x i32> <i32 26, i32 30, i3 2 25, i32 27, i32 9, i32 24, i32 4, i32 1>
4689 ret <8 x i32> %3
4690 }
4691 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_8xi32_4(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>)
4692 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %7, <4 x i32> %8, <4 x i32> <i32 2, i32 6, i32 1, i32 3>
4693 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %3, <4 x i32> %7, <4 x i32> <i32 1, i32 4, i32 4, i32 4>
4694 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
4695 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %1, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
4696 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16
4697 ; CHECK-NEXT: ret <4 x i32> %10
4698
4699 define <8 x i32> @shuffle_16xi32_to_8xi32_5(<16 x i32>, <16 x i32>) {
4700 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <8 x i32> <i32 0, i32 5, i32 0, i32 17, i32 30, i32 12, i32 23, i32 1>
4701 ret <8 x i32> %3
4702 }
4703 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_8xi32_5(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>)
4704 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 0, i32 5, i32 0, i32 0>
4705 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
4706 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %8, <4 x i32> %4, <4 x i32> <i32 2, i32 4, i32 4, i32 4>
4707 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
4708 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %1, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
4709 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %0, align 16
4710 ; CHECK-NEXT: ret <4 x i32> %11
4711
4712 define <8 x i32> @shuffle_16xi32_to_8xi32_6(<16 x i32>, <16 x i32>) {
4713 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <8 x i32> <i32 13, i32 1, i32 0, i32 6, i32 24, i32 16, i32 23, i32 14>
4714 ret <8 x i32> %3
4715 }
4716 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_8xi32_6(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>)
4717 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %4, <4 x i32> %1, <4 x i32> <i32 1, i32 5, i32 4, i32 4>
4718 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
4719 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %7, <4 x i32> %5, <4 x i32> <i32 0, i32 4, i32 4, i32 4>
4720 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
4721 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
4722 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %0, align 16
4723 ; CHECK-NEXT: ret <4 x i32> %11
4724
4725 define <8 x i32> @shuffle_16xi32_to_8xi32_7(<16 x i32>, <16 x i32>) {
4726 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <8 x i32> <i32 4, i32 21, i32 17, i32 2, i32 15, i32 30, i32 10, i32 14>
4727 ret <8 x i32> %3
4728 }
4729 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_8xi32_7(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>)
4730 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %2, <4 x i32> %6, <4 x i32> <i32 0, i32 5, i32 5, i32 5>
4731 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
4732 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %1, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
4733 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %4, <4 x i32> %8, <4 x i32> <i32 3, i32 6, i32 6, i32 6>
4734 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
4735 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
4736 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %0, align 16
4737 ; CHECK-NEXT: ret <4 x i32> %12
4738
4739 define <8 x i32> @shuffle_16xi32_to_8xi32_8(<16 x i32>, <16 x i32>) {
4740 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <8 x i32> <i32 18, i32 1, i32 1, i32 24, i32 2, i32 19, i32 21, i32 6>
4741 ret <8 x i32> %3
4742 }
4743 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_8xi32_8(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>)
4744 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %5, <4 x i32> %1, <4 x i32> <i32 2, i32 5, i32 5, i32 5>
4745 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %10, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
4746 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %1, <4 x i32> %5, <4 x i32> <i32 2, i32 7, i32 7, i32 7>
4747 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
4748 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
4749 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %0, align 16
4750 ; CHECK-NEXT: ret <4 x i32> %11
4751
4752 define <8 x i32> @shuffle_16xi32_to_8xi32_9(<16 x i32>, <16 x i32>) {
4753 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <8 x i32> <i32 4, i32 14, i32 14, i32 4, i32 30, i32 23, i32 23, i32 11>
4754 ret <8 x i32> %3
4755 }
4756 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_8xi32_9(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>)
4757 ; CHECK-NEXT: %10 = shufflevector <4 x i32> %2, <4 x i32> %4, <4 x i32> <i32 0, i32 6, i32 6, i32 0>
4758 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %8, <4 x i32> %6, <4 x i32> <i32 2, i32 7, i32 7, i32 7>
4759 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
4760 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
4761 ; CHECK-NEXT: ret <4 x i32> %10
4762
4763 define <12 x i32> @shuffle_16xi32_to_12xi32_0(<16 x i32>, <16 x i32>) {
4764 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <12 x i32> <i32 3, i32 24, i3 2 25, i32 17, i32 11, i32 21, i32 30, i32 0, i32 22, i32 19, i32 0, i32 23>
4765 ret <12 x i32> %3
4766 }
4767 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_12xi32_0(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4768 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %2, <4 x i32> %8, <4 x i32> <i32 3, i32 4, i32 5, i32 5>
4769 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
4770 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %4, <4 x i32> %7, <4 x i32> <i32 3, i32 5, i32 5, i32 5>
4771 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
4772 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
4773 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %7, <4 x i32> %6, <4 x i32> <i32 2, i32 7, i32 7, i32 7>
4774 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
4775 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
4776 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %0, align 16
4777 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %1, align 16
4778 ; CHECK-NEXT: ret <4 x i32> %12
4779
4780 define <12 x i32> @shuffle_16xi32_to_12xi32_1(<16 x i32>, <16 x i32>) {
4781 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <12 x i32> <i32 21, i32 3, i3 2 9, i32 20, i32 21, i32 22, i32 14, i32 25, i32 5, i32 28, i32 29, i32 1>
4782 ret <12 x i32> %3
4783 }
4784 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_12xi32_1(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4785 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %7, <4 x i32> %2, <4 x i32> <i32 1, i32 7, i32 7, i32 7>
4786 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
4787 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
4788 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %7, <4 x i32> %5, <4 x i32> <i32 1, i32 2, i32 6, i32 6>
4789 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
4790 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %3, <4 x i32> %9, <4 x i32> <i32 1, i32 4, i32 5, i32 5>
4791 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
4792 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %0, align 16
4793 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16
4794 ; CHECK-NEXT: ret <4 x i32> %13
4795
4796 define <12 x i32> @shuffle_16xi32_to_12xi32_2(<16 x i32>, <16 x i32>) {
4797 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <12 x i32> <i32 20, i32 1, i3 2 8, i32 28, i32 9, i32 28, i32 14, i32 29, i32 2, i32 14, i32 29, i32 6>
4798 ret <12 x i32> %3
4799 }
4800 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_12xi32_2(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4801 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %7, <4 x i32> %2, <4 x i32> <i32 0, i32 5, i32 5, i32 5>
4802 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
4803 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
4804 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %4, <4 x i32> %9, <4 x i32> <i32 1, i32 4, i32 4, i32 4>
4805 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
4806 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
4807 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %2, <4 x i32> %5, <4 x i32> <i32 2, i32 6, i32 6, i32 6>
4808 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
4809 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
4810 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
4811 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %1, align 16
4812 ; CHECK-NEXT: ret <4 x i32> %13
4813
4814 define <12 x i32> @shuffle_16xi32_to_12xi32_3(<16 x i32>, <16 x i32>) {
4815 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <12 x i32> <i32 25, i32 12, i 32 6, i32 23, i32 21, i32 16, i32 19, i32 7, i32 8, i32 24, i32 27, i32 5>
4816 ret <12 x i32> %3
4817 }
4818 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_12xi32_3(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4819 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %8, <4 x i32> %5, <4 x i32> <i32 1, i32 4, i32 4, i32 4>
4820 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
4821 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
4822 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %7, <4 x i32> %6, <4 x i32> <i32 1, i32 4, i32 7, i32 7>
4823 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
4824 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %4, <4 x i32> %8, <4 x i32> <i32 0, i32 4, i32 7, i32 7>
4825 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
4826 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %0, align 16
4827 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16
4828 ; CHECK-NEXT: ret <4 x i32> %13
4829
4830 define <12 x i32> @shuffle_16xi32_to_12xi32_4(<16 x i32>, <16 x i32>) {
4831 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <12 x i32> <i32 26, i32 25, i 32 30, i32 27, i32 4, i32 28, i32 16, i32 5, i32 25, i32 28, i32 23, i32 15>
4832 ret <12 x i32> %3
4833 }
4834 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_12xi32_4(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4835 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %8, <4 x i32> %9, <4 x i32> <i32 2, i32 1, i32 6, i32 3>
4836 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %3, <4 x i32> %9, <4 x i32> <i32 0, i32 4, i32 4, i32 4>
4837 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
4838 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
4839 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %8, <4 x i32> %9, <4 x i32> <i32 1, i32 4, i32 4, i32 4>
4840 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
4841 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
4842 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %0, align 16
4843 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16
4844 ; CHECK-NEXT: ret <4 x i32> %11
4845
4846 define <12 x i32> @shuffle_16xi32_to_12xi32_5(<16 x i32>, <16 x i32>) {
4847 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <12 x i32> <i32 4, i32 21, i3 2 11, i32 5, i32 2, i32 19, i32 10, i32 1, i32 27, i32 17, i32 8, i32 24>
4848 ret <12 x i32> %3
4849 }
4850 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_12xi32_5(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4851 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %3, <4 x i32> %7, <4 x i32> <i32 0, i32 5, i32 5, i32 5>
4852 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
4853 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
4854 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %2, <4 x i32> %6, <4 x i32> <i32 2, i32 7, i32 7, i32 7>
4855 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
4856 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
4857 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %8, <4 x i32> %6, <4 x i32> <i32 3, i32 5, i32 5, i32 5>
4858 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
4859 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
4860 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
4861 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %1, align 16
4862 ; CHECK-NEXT: ret <4 x i32> %13
4863
4864 define <12 x i32> @shuffle_16xi32_to_12xi32_6(<16 x i32>, <16 x i32>) {
4865 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <12 x i32> <i32 9, i32 29, i3 2 28, i32 9, i32 24, i32 3, i32 3, i32 27, i32 4, i32 9, i32 8, i32 21>
4866 ret <12 x i32> %3
4867 }
4868 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_12xi32_6(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4869 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %4, <4 x i32> %9, <4 x i32> <i32 1, i32 5, i32 4, i32 1>
4870 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %8, <4 x i32> %2, <4 x i32> <i32 0, i32 7, i32 7, i32 3>
4871 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 0, i32 5, i32 4, i32 4>
4872 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
4873 ; CHECK-NEXT: store <4 x i32> %12, <4 x i32>* %0, align 16
4874 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16
4875 ; CHECK-NEXT: ret <4 x i32> %11
4876
4877 define <12 x i32> @shuffle_16xi32_to_12xi32_7(<16 x i32>, <16 x i32>) {
4878 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <12 x i32> <i32 1, i32 1, i32 19, i32 8, i32 4, i32 13, i32 22, i32 17, i32 7, i32 10, i32 26, i32 5>
4879 ret <12 x i32> %3
4880 }
4881 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_12xi32_7(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4882 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %2, <4 x i32> %6, <4 x i32> <i32 1, i32 1, i32 7, i32 7>
4883 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
4884 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %3, <4 x i32> %5, <4 x i32> <i32 0, i32 5, i32 5, i32 5>
4885 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
4886 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
4887 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 3, i32 6, i32 6, i32 6>
4888 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
4889 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
4890 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %0, align 16
4891 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %1, align 16
4892 ; CHECK-NEXT: ret <4 x i32> %12
4893
4894 define <12 x i32> @shuffle_16xi32_to_12xi32_8(<16 x i32>, <16 x i32>) {
4895 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <12 x i32> <i32 8, i32 18, i3 2 30, i32 9, i32 14, i32 12, i32 2, i32 1, i32 19, i32 7, i32 16, i32 17>
4896 ret <12 x i32> %3
4897 }
4898 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_12xi32_8(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4899 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %4, <4 x i32> %6, <4 x i32> <i32 0, i32 6, i32 6, i32 6>
4900 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
4901 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
4902 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %5, <4 x i32> %2, <4 x i32> <i32 2, i32 0, i32 6, i32 5>
4903 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %6, <4 x i32> %3, <4 x i32> <i32 3, i32 7, i32 0, i32 1>
4904 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %0, align 16
4905 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %1, align 16
4906 ; CHECK-NEXT: ret <4 x i32> %13
4907
4908 define <12 x i32> @shuffle_16xi32_to_12xi32_9(<16 x i32>, <16 x i32>) {
4909 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <12 x i32> <i32 29, i32 30, i 32 1, i32 18, i32 18, i32 22, i32 5, i32 22, i32 1, i32 26, i32 5, i32 13>
4910 ret <12 x i32> %3
4911 }
4912 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_12xi32_9(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4913 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %9, <4 x i32> %2, <4 x i32> <i32 1, i32 2, i32 5, i32 5>
4914 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
4915 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %6, <4 x i32> %7, <4 x i32> <i32 2, i32 6, i32 6, i32 6>
4916 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
4917 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
4918 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %2, <4 x i32> %8, <4 x i32> <i32 1, i32 6, i32 6, i32 6>
4919 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
4920 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
4921 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %0, align 16
4922 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %1, align 16
4923 ; CHECK-NEXT: ret <4 x i32> %12
4924
4925 define <16 x i32> @shuffle_16xi32_to_16xi32_0(<16 x i32>, <16 x i32>) {
4926 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <16 x i32> <i32 0, i32 25, i3 2 0, i32 24, i32 6, i32 17, i32 23, i32 21, i32 15, i32 16, i32 24, i32 17, i32 26, i32 26, i32 24, i32 21>
4927 ret <16 x i32> %3
4928 }
4929 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_16xi32_0(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4930 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %3, <4 x i32> %9, <4 x i32> <i32 0, i32 5, i32 0, i32 4>
4931 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %4, <4 x i32> %7, <4 x i32> <i32 2, i32 5, i32 5, i32 5>
4932 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 7, i32 5>
4933 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %6, <4 x i32> %7, <4 x i32> <i32 3, i32 4, i32 4, i32 4>
4934 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
4935 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
4936 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %9, <4 x i32> %8, <4 x i32> <i32 2, i32 2, i32 0, i32 5>
4937 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %0, align 16
4938 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16
4939 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16
4940 ; CHECK-NEXT: ret <4 x i32> %12
4941
4942 define <16 x i32> @shuffle_16xi32_to_16xi32_1(<16 x i32>, <16 x i32>) {
4943 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <16 x i32> <i32 13, i32 4, i3 2 10, i32 19, i32 21, i32 13, i32 27, i32 21, i32 21, i32 14, i32 5, i32 2, i32 11, i32 15, i32 15, i32 16>
4944 ret <16 x i32> %3
4945 }
4946 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_16xi32_1(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4947 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %6, <4 x i32> %4, <4 x i32> <i32 1, i32 4, i32 4, i32 4>
4948 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
4949 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
4950 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %8, <4 x i32> %6, <4 x i32> <i32 1, i32 5, i32 5, i32 5>
4951 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
4952 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
4953 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %8, <4 x i32> %6, <4 x i32> <i32 1, i32 6, i32 6, i32 6>
4954 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
4955 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %19, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
4956 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %5, <4 x i32> %6, <4 x i32> <i32 3, i32 7, i32 7, i32 7>
4957 ; CHECK-NEXT: %22 = shufflevector <4 x i32> %21, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
4958 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %0, align 16
4959 ; CHECK-NEXT: store <4 x i32> %20, <4 x i32>* %1, align 16
4960 ; CHECK-NEXT: store <4 x i32> %22, <4 x i32>* %2, align 16
4961 ; CHECK-NEXT: ret <4 x i32> %14
4962
4963 define <16 x i32> @shuffle_16xi32_to_16xi32_2(<16 x i32>, <16 x i32>) {
4964 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <16 x i32> <i32 19, i32 15, i 32 12, i32 18, i32 24, i32 27, i32 0, i32 29, i32 15, i32 11, i32 11, i32 25, i3 2 13, i32 30, i32 12, i32 19>
4965 ret <16 x i32> %3
4966 }
4967 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_16xi32_2(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4968 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %7, <4 x i32> %6, <4 x i32> <i32 3, i32 7, i32 4, i32 2>
4969 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %9, <4 x i32> %3, <4 x i32> <i32 0, i32 3, i32 4, i32 4>
4970 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %10, <4 x i32> <i3 2 0, i32 1, i32 2, i32 5>
4971 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %6, <4 x i32> %5, <4 x i32> <i32 3, i32 7, i32 7, i32 7>
4972 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
4973 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %6, <4 x i32> %10, <4 x i32> <i32 1, i32 6, i32 0, i32 0>
4974 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
4975 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %0, align 16
4976 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %1, align 16
4977 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16
4978 ; CHECK-NEXT: ret <4 x i32> %12
4979
4980 define <16 x i32> @shuffle_16xi32_to_16xi32_3(<16 x i32>, <16 x i32>) {
4981 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <16 x i32> <i32 4, i32 28, i3 2 27, i32 23, i32 6, i32 29, i32 17, i32 23, i32 20, i32 12, i32 12, i32 18, i32 30, i32 28, i32 20, i32 8>
4982 ret <16 x i32> %3
4983 }
4984 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_16xi32_3(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
4985 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %4, <4 x i32> %10, <4 x i32> <i32 0, i32 4, i32 4, i32 4>
4986 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
4987 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
4988 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %4, <4 x i32> %10, <4 x i32> <i32 2, i32 5, i32 5, i32 5>
4989 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
4990 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
4991 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %8, <4 x i32> %6, <4 x i32> <i32 0, i32 4, i32 4, i32 4>
4992 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
4993 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %10, <4 x i32> %8, <4 x i32> <i32 2, i32 0, i32 4, i32 4>
4994 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %20, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
4995 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %0, align 16
4996 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %1, align 16
4997 ; CHECK-NEXT: store <4 x i32> %21, <4 x i32>* %2, align 16
4998 ; CHECK-NEXT: ret <4 x i32> %14
4999
5000 define <16 x i32> @shuffle_16xi32_to_16xi32_4(<16 x i32>, <16 x i32>) {
5001 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <16 x i32> <i32 20, i32 6, i3 2 14, i32 26, i32 20, i32 30, i32 18, i32 25, i32 1, i32 21, i32 3, i32 12, i32 8, i32 29, i32 26, i32 17>
5002 ret <16 x i32> %3
5003 }
5004 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_16xi32_4(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5005 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %8, <4 x i32> %4, <4 x i32> <i32 0, i32 6, i32 6, i32 6>
5006 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
5007 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
5008 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %8, <4 x i32> %10, <4 x i32> <i32 0, i32 6, i32 6, i32 6>
5009 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
5010 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
5011 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %3, <4 x i32> %8, <4 x i32> <i32 1, i32 5, i32 3, i32 3>
5012 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
5013 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %5, <4 x i32> %10, <4 x i32> <i32 0, i32 5, i32 5, i32 5>
5014 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %20, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
5015 ; CHECK-NEXT: %22 = shufflevector <4 x i32> %21, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
5016 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %0, align 16
5017 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %1, align 16
5018 ; CHECK-NEXT: store <4 x i32> %22, <4 x i32>* %2, align 16
5019 ; CHECK-NEXT: ret <4 x i32> %14
5020
5021 define <16 x i32> @shuffle_16xi32_to_16xi32_5(<16 x i32>, <16 x i32>) {
5022 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <16 x i32> <i32 27, i32 4, i3 2 0, i32 12, i32 0, i32 11, i32 14, i32 15, i32 17, i32 9, i32 27, i32 23, i32 1 7, i32 7, i32 30, i32 22>
5023 ret <16 x i32> %3
5024 }
5025 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_16xi32_5(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5026 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %9, <4 x i32> %4, <4 x i32> <i32 3, i32 4, i32 4, i32 4>
5027 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
5028 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
5029 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %3, <4 x i32> %5, <4 x i32> <i32 0, i32 7, i32 7, i32 7>
5030 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
5031 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %7, <4 x i32> %5, <4 x i32> <i32 1, i32 5, i32 5, i32 5>
5032 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
5033 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
5034 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %7, <4 x i32> %4, <4 x i32> <i32 1, i32 7, i32 7, i32 7>
5035 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %20, <4 x i32> %10, <4 x i32> <i3 2 0, i32 1, i32 6, i32 6>
5036 ; CHECK-NEXT: %22 = shufflevector <4 x i32> %21, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
5037 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
5038 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %1, align 16
5039 ; CHECK-NEXT: store <4 x i32> %22, <4 x i32>* %2, align 16
5040 ; CHECK-NEXT: ret <4 x i32> %14
5041
5042 define <16 x i32> @shuffle_16xi32_to_16xi32_6(<16 x i32>, <16 x i32>) {
5043 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <16 x i32> <i32 16, i32 0, i3 2 7, i32 26, i32 3, i32 28, i32 21, i32 21, i32 30, i32 17, i32 28, i32 0, i32 8 , i32 24, i32 5, i32 7>
5044 ret <16 x i32> %3
5045 }
5046 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_16xi32_6(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5047 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %7, <4 x i32> %3, <4 x i32> <i32 0, i32 4, i32 4, i32 4>
5048 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
5049 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
5050 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %3, <4 x i32> %10, <4 x i32> <i32 3, i32 4, i32 4, i32 4>
5051 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
5052 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %10, <4 x i32> %7, <4 x i32> <i32 2, i32 5, i32 0, i32 0>
5053 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
5054 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %5, <4 x i32> %9, <4 x i32> <i32 0, i32 4, i32 4, i32 4>
5055 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %19, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 5, i32 7>
5056 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
5057 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %1, align 16
5058 ; CHECK-NEXT: store <4 x i32> %20, <4 x i32>* %2, align 16
5059 ; CHECK-NEXT: ret <4 x i32> %14
5060
5061 define <16 x i32> @shuffle_16xi32_to_16xi32_7(<16 x i32>, <16 x i32>) {
5062 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <16 x i32> <i32 13, i32 21, i 32 0, i32 29, i32 6, i32 2, i32 15, i32 5, i32 7, i32 18, i32 14, i32 13, i32 2, i32 1, i32 14, i32 11>
5063 ret <16 x i32> %3
5064 }
5065 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_16xi32_7(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5066 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %6, <4 x i32> %8, <4 x i32> <i32 1, i32 5, i32 5, i32 5>
5067 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
5068 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %10, <4 x i32> <i3 2 0, i32 1, i32 2, i32 5>
5069 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %4, <4 x i32> %3, <4 x i32> <i32 2, i32 6, i32 6, i32 6>
5070 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
5071 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
5072 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %4, <4 x i32> %7, <4 x i32> <i32 3, i32 6, i32 6, i32 6>
5073 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 6, i32 5>
5074 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %3, <4 x i32> %6, <4 x i32> <i32 2, i32 1, i32 6, i32 6>
5075 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %20, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
5076 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %0, align 16
5077 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %1, align 16
5078 ; CHECK-NEXT: store <4 x i32> %21, <4 x i32>* %2, align 16
5079 ; CHECK-NEXT: ret <4 x i32> %14
5080
5081 define <16 x i32> @shuffle_16xi32_to_16xi32_8(<16 x i32>, <16 x i32>) {
5082 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <16 x i32> <i32 0, i32 1, i32 19, i32 24, i32 6, i32 21, i32 24, i32 16, i32 19, i32 11, i32 3, i32 1, i32 5, i32 17, i32 27, i32 28>
5083 ret <16 x i32> %3
5084 }
5085 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_16xi32_8(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5086 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %3, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
5087 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
5088 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %4, <4 x i32> %8, <4 x i32> <i32 2, i32 5, i32 5, i32 5>
5089 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
5090 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
5091 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %7, <4 x i32> %5, <4 x i32> <i32 3, i32 7, i32 7, i32 7>
5092 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 7, i32 5>
5093 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %4, <4 x i32> %7, <4 x i32> <i32 1, i32 5, i32 5, i32 5>
5094 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %19, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
5095 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %20, <4 x i32> %10, <4 x i32> <i3 2 0, i32 1, i32 2, i32 4>
5096 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
5097 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %1, align 16
5098 ; CHECK-NEXT: store <4 x i32> %21, <4 x i32>* %2, align 16
5099 ; CHECK-NEXT: ret <4 x i32> %13
5100
5101 define <16 x i32> @shuffle_16xi32_to_16xi32_9(<16 x i32>, <16 x i32>) {
5102 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <16 x i32> <i32 14, i32 0, i3 2 13, i32 20, i32 29, i32 0, i32 24, i32 10, i32 4, i32 10, i32 16, i32 15, i32 18, i32 22, i32 22, i32 28>
5103 ret <16 x i32> %3
5104 }
5105 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_16xi32_9(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5106 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %6, <4 x i32> %3, <4 x i32> <i32 2, i32 4, i32 1, i32 1>
5107 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
5108 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %10, <4 x i32> %3, <4 x i32> <i32 1, i32 4, i32 4, i32 4>
5109 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
5110 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
5111 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 0, i32 6, i32 6, i32 6>
5112 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
5113 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
5114 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %7, <4 x i32> %8, <4 x i32> <i32 2, i32 6, i32 6, i32 6>
5115 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %20, <4 x i32> %10, <4 x i32> <i3 2 0, i32 1, i32 2, i32 4>
5116 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
5117 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %1, align 16
5118 ; CHECK-NEXT: store <4 x i32> %21, <4 x i32>* %2, align 16
5119 ; CHECK-NEXT: ret <4 x i32> %13
5120
5121 define <20 x i32> @shuffle_16xi32_to_20xi32_0(<16 x i32>, <16 x i32>) {
5122 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <20 x i32> <i32 18, i32 4, i3 2 4, i32 25, i32 5, i32 18, i32 0, i32 8, i32 28, i32 5, i32 17, i32 13, i32 0, i32 25, i32 7, i32 13, i32 9, i32 0, i32 15, i32 16>
5123 ret <20 x i32> %3
5124 }
5125 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_20xi32_0(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5126 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %8, <4 x i32> %5, <4 x i32> <i32 2, i32 4, i32 4, i32 4>
5127 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %10, <4 x i32> <i3 2 0, i32 1, i32 2, i32 5>
5128 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %5, <4 x i32> %8, <4 x i32> <i32 1, i32 6, i32 6, i32 6>
5129 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
5130 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
5131 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %11, <4 x i32> %5, <4 x i32> <i32 0, i32 5, i32 5, i32 5>
5132 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
5133 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %19, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
5134 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %4, <4 x i32> %10, <4 x i32> <i32 0, i32 5, i32 5, i32 5>
5135 ; CHECK-NEXT: %22 = shufflevector <4 x i32> %21, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
5136 ; CHECK-NEXT: %23 = shufflevector <4 x i32> %22, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
5137 ; CHECK-NEXT: %24 = shufflevector <4 x i32> %6, <4 x i32> %4, <4 x i32> <i32 1, i32 4, i32 4, i32 4>
5138 ; CHECK-NEXT: %25 = shufflevector <4 x i32> %24, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
5139 ; CHECK-NEXT: %26 = shufflevector <4 x i32> %25, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
5140 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %0, align 16
5141 ; CHECK-NEXT: store <4 x i32> %20, <4 x i32>* %1, align 16
5142 ; CHECK-NEXT: store <4 x i32> %23, <4 x i32>* %2, align 16
5143 ; CHECK-NEXT: store <4 x i32> %26, <4 x i32>* %3, align 16
5144 ; CHECK-NEXT: ret <4 x i32> %14
5145
5146 define <20 x i32> @shuffle_16xi32_to_20xi32_1(<16 x i32>, <16 x i32>) {
5147 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <20 x i32> <i32 2, i32 0, i32 25, i32 16, i32 29, i32 8, i32 9, i32 11, i32 11, i32 30, i32 29, i32 22, i32 1 , i32 9, i32 19, i32 18, i32 11, i32 14, i32 1, i32 9>
5148 ret <20 x i32> %3
5149 }
5150 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_20xi32_1(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5151 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %4, <4 x i32> %10, <4 x i32> <i32 2, i32 0, i32 5, i32 5>
5152 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
5153 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %11, <4 x i32> %6, <4 x i32> <i32 1, i32 4, i32 5, i32 7>
5154 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %6, <4 x i32> %11, <4 x i32> <i32 3, i32 6, i32 5, i32 5>
5155 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
5156 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %4, <4 x i32> %6, <4 x i32> <i32 1, i32 5, i32 5, i32 5>
5157 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 7, i32 6>
5158 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %6, <4 x i32> %7, <4 x i32> <i32 3, i32 6, i32 6, i32 6>
5159 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %20, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
5160 ; CHECK-NEXT: %22 = shufflevector <4 x i32> %21, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
5161 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %0, align 16
5162 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16
5163 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %2, align 16
5164 ; CHECK-NEXT: store <4 x i32> %22, <4 x i32>* %3, align 16
5165 ; CHECK-NEXT: ret <4 x i32> %14
5166
5167 define <20 x i32> @shuffle_16xi32_to_20xi32_2(<16 x i32>, <16 x i32>) {
5168 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <20 x i32> <i32 18, i32 15, i 32 28, i32 26, i32 17, i32 6, i32 8, i32 25, i32 13, i32 23, i32 30, i32 9, i32 10, i32 29, i32 6, i32 28, i32 4, i32 9, i32 13, i32 2>
5169 ret <20 x i32> %3
5170 }
5171 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_20xi32_2(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5172 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %8, <4 x i32> %7, <4 x i32> <i32 2, i32 7, i32 7, i32 7>
5173 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %11, <4 x i32> <i3 2 0, i32 1, i32 4, i32 4>
5174 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %10, <4 x i32> <i3 2 0, i32 1, i32 2, i32 6>
5175 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %8, <4 x i32> %5, <4 x i32> <i32 1, i32 6, i32 6, i32 6>
5176 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
5177 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %10, <4 x i32> <i3 2 0, i32 1, i32 2, i32 5>
5178 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %7, <4 x i32> %9, <4 x i32> <i32 1, i32 7, i32 7, i32 7>
5179 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %19, <4 x i32> %11, <4 x i32> <i3 2 0, i32 1, i32 6, i32 6>
5180 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %20, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
5181 ; CHECK-NEXT: %22 = shufflevector <4 x i32> %6, <4 x i32> %11, <4 x i32> <i32 2, i32 5, i32 5, i32 5>
5182 ; CHECK-NEXT: %23 = shufflevector <4 x i32> %22, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
5183 ; CHECK-NEXT: %24 = shufflevector <4 x i32> %23, <4 x i32> %11, <4 x i32> <i3 2 0, i32 1, i32 2, i32 4>
5184 ; CHECK-NEXT: %25 = shufflevector <4 x i32> %5, <4 x i32> %6, <4 x i32> <i32 0, i32 5, i32 5, i32 5>
5185 ; CHECK-NEXT: %26 = shufflevector <4 x i32> %25, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
5186 ; CHECK-NEXT: %27 = shufflevector <4 x i32> %26, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
5187 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %0, align 16
5188 ; CHECK-NEXT: store <4 x i32> %21, <4 x i32>* %1, align 16
5189 ; CHECK-NEXT: store <4 x i32> %24, <4 x i32>* %2, align 16
5190 ; CHECK-NEXT: store <4 x i32> %27, <4 x i32>* %3, align 16
5191 ; CHECK-NEXT: ret <4 x i32> %15
5192
5193 define <20 x i32> @shuffle_16xi32_to_20xi32_3(<16 x i32>, <16 x i32>) {
5194 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <20 x i32> <i32 21, i32 10, i 32 10, i32 16, i32 20, i32 15, i32 7, i32 4, i32 13, i32 15, i32 27, i32 8, i32 19, i32 16, i32 14, i32 25, i32 4, i32 19, i32 19, i32 29>
5195 ret <20 x i32> %3
5196 }
5197 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_20xi32_3(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5198 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %9, <4 x i32> %6, <4 x i32> <i32 1, i32 6, i32 6, i32 6>
5199 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
5200 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %9, <4 x i32> %7, <4 x i32> <i32 0, i32 7, i32 7, i32 7>
5201 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 7, i32 4>
5202 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %7, <4 x i32> %10, <4 x i32> <i32 1, i32 3, i32 7, i32 7>
5203 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
5204 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %8, <4 x i32> %7, <4 x i32> <i32 3, i32 0, i32 6, i32 6>
5205 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %19, <4 x i32> %10, <4 x i32> <i3 2 0, i32 1, i32 2, i32 5>
5206 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %5, <4 x i32> %8, <4 x i32> <i32 0, i32 7, i32 7, i32 7>
5207 ; CHECK-NEXT: %22 = shufflevector <4 x i32> %21, <4 x i32> %11, <4 x i32> <i3 2 0, i32 1, i32 2, i32 5>
5208 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
5209 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %1, align 16
5210 ; CHECK-NEXT: store <4 x i32> %20, <4 x i32>* %2, align 16
5211 ; CHECK-NEXT: store <4 x i32> %22, <4 x i32>* %3, align 16
5212 ; CHECK-NEXT: ret <4 x i32> %14
5213
5214 define <20 x i32> @shuffle_16xi32_to_20xi32_4(<16 x i32>, <16 x i32>) {
5215 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <20 x i32> <i32 17, i32 10, i 32 24, i32 1, i32 13, i32 9, i32 6, i32 10, i32 15, i32 27, i32 13, i32 7, i32 0 , i32 16, i32 30, i32 22, i32 29, i32 16, i32 23, i32 3>
5216 ret <20 x i32> %3
5217 }
5218 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_20xi32_4(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5219 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %8, <4 x i32> %6, <4 x i32> <i32 1, i32 6, i32 6, i32 6>
5220 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %10, <4 x i32> <i3 2 0, i32 1, i32 4, i32 4>
5221 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
5222 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %7, <4 x i32> %6, <4 x i32> <i32 1, i32 5, i32 5, i32 5>
5223 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
5224 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
5225 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %7, <4 x i32> %10, <4 x i32> <i32 3, i32 7, i32 1, i32 1>
5226 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %19, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
5227 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %4, <4 x i32> %8, <4 x i32> <i32 0, i32 4, i32 4, i32 4>
5228 ; CHECK-NEXT: %22 = shufflevector <4 x i32> %21, <4 x i32> %11, <4 x i32> <i3 2 0, i32 1, i32 6, i32 6>
5229 ; CHECK-NEXT: %23 = shufflevector <4 x i32> %22, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
5230 ; CHECK-NEXT: %24 = shufflevector <4 x i32> %11, <4 x i32> %8, <4 x i32> <i32 1, i32 4, i32 4, i32 4>
5231 ; CHECK-NEXT: %25 = shufflevector <4 x i32> %24, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
5232 ; CHECK-NEXT: %26 = shufflevector <4 x i32> %25, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
5233 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %0, align 16
5234 ; CHECK-NEXT: store <4 x i32> %20, <4 x i32>* %1, align 16
5235 ; CHECK-NEXT: store <4 x i32> %23, <4 x i32>* %2, align 16
5236 ; CHECK-NEXT: store <4 x i32> %26, <4 x i32>* %3, align 16
5237 ; CHECK-NEXT: ret <4 x i32> %15
5238
5239 define <20 x i32> @shuffle_16xi32_to_20xi32_5(<16 x i32>, <16 x i32>) {
5240 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <20 x i32> <i32 2, i32 2, i32 1, i32 14, i32 20, i32 0, i32 15, i32 30, i32 19, i32 19, i32 18, i32 20, i32 2 0, i32 13, i32 21, i32 15, i32 7, i32 11, i32 29, i32 4>
5241 ret <20 x i32> %3
5242 }
5243 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_20xi32_5(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5244 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %4, <4 x i32> %7, <4 x i32> <i32 2, i32 2, i32 1, i32 6>
5245 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %9, <4 x i32> %4, <4 x i32> <i32 0, i32 4, i32 4, i32 4>
5246 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
5247 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %11, <4 x i32> <i3 2 0, i32 1, i32 2, i32 6>
5248 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %8, <4 x i32> %9, <4 x i32> <i32 3, i32 3, i32 2, i32 4>
5249 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %9, <4 x i32> %7, <4 x i32> <i32 0, i32 5, i32 1, i32 7>
5250 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %5, <4 x i32> %6, <4 x i32> <i32 3, i32 7, i32 7, i32 7>
5251 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %19, <4 x i32> %11, <4 x i32> <i3 2 0, i32 1, i32 5, i32 5>
5252 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %20, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
5253 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
5254 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16
5255 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16
5256 ; CHECK-NEXT: store <4 x i32> %21, <4 x i32>* %3, align 16
5257 ; CHECK-NEXT: ret <4 x i32> %13
5258
5259 define <20 x i32> @shuffle_16xi32_to_20xi32_6(<16 x i32>, <16 x i32>) {
5260 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <20 x i32> <i32 24, i32 13, i 32 9, i32 13, i32 25, i32 20, i32 8, i32 29, i32 10, i32 3, i32 14, i32 29, i32 3, i32 29, i32 14, i32 14, i32 7, i32 9, i32 9, i32 19>
5261 ret <20 x i32> %3
5262 }
5263 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_20xi32_6(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5264 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %10, <4 x i32> %7, <4 x i32> <i32 0, i32 5, i32 5, i32 5>
5265 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
5266 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
5267 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %10, <4 x i32> %9, <4 x i32> <i32 1, i32 4, i32 4, i32 4>
5268 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
5269 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %11, <4 x i32> <i3 2 0, i32 1, i32 2, i32 5>
5270 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %6, <4 x i32> %4, <4 x i32> <i32 2, i32 7, i32 7, i32 7>
5271 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %19, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
5272 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %20, <4 x i32> %11, <4 x i32> <i3 2 0, i32 1, i32 2, i32 5>
5273 ; CHECK-NEXT: %22 = shufflevector <4 x i32> %4, <4 x i32> %11, <4 x i32> <i32 3, i32 5, i32 5, i32 5>
5274 ; CHECK-NEXT: %23 = shufflevector <4 x i32> %22, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
5275 ; CHECK-NEXT: %24 = shufflevector <4 x i32> %5, <4 x i32> %6, <4 x i32> <i32 3, i32 5, i32 5, i32 5>
5276 ; CHECK-NEXT: %25 = shufflevector <4 x i32> %24, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
5277 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %0, align 16
5278 ; CHECK-NEXT: store <4 x i32> %21, <4 x i32>* %1, align 16
5279 ; CHECK-NEXT: store <4 x i32> %23, <4 x i32>* %2, align 16
5280 ; CHECK-NEXT: store <4 x i32> %25, <4 x i32>* %3, align 16
5281 ; CHECK-NEXT: ret <4 x i32> %15
5282
5283 define <20 x i32> @shuffle_16xi32_to_20xi32_7(<16 x i32>, <16 x i32>) {
5284 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <20 x i32> <i32 15, i32 9, i3 2 28, i32 26, i32 15, i32 23, i32 5, i32 1, i32 18, i32 12, i32 12, i32 13, i32 26, i32 15, i32 25, i32 19, i32 7, i32 28, i32 2, i32 12>
5285 ret <20 x i32> %3
5286 }
5287 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_20xi32_7(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5288 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %7, <4 x i32> %6, <4 x i32> <i32 3, i32 5, i32 5, i32 5>
5289 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %11, <4 x i32> <i3 2 0, i32 1, i32 4, i32 4>
5290 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %10, <4 x i32> <i3 2 0, i32 1, i32 2, i32 6>
5291 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %7, <4 x i32> %9, <4 x i32> <i32 3, i32 7, i32 7, i32 7>
5292 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
5293 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
5294 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %8, <4 x i32> %7, <4 x i32> <i32 2, i32 4, i32 4, i32 5>
5295 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %10, <4 x i32> %7, <4 x i32> <i32 2, i32 7, i32 1, i32 1>
5296 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %20, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
5297 ; CHECK-NEXT: %22 = shufflevector <4 x i32> %5, <4 x i32> %11, <4 x i32> <i32 3, i32 4, i32 4, i32 4>
5298 ; CHECK-NEXT: %23 = shufflevector <4 x i32> %22, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
5299 ; CHECK-NEXT: %24 = shufflevector <4 x i32> %23, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
5300 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %0, align 16
5301 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %1, align 16
5302 ; CHECK-NEXT: store <4 x i32> %21, <4 x i32>* %2, align 16
5303 ; CHECK-NEXT: store <4 x i32> %24, <4 x i32>* %3, align 16
5304 ; CHECK-NEXT: ret <4 x i32> %15
5305
5306 define <20 x i32> @shuffle_16xi32_to_20xi32_8(<16 x i32>, <16 x i32>) {
5307 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <20 x i32> <i32 28, i32 9, i3 2 16, i32 26, i32 8, i32 21, i32 5, i32 10, i32 11, i32 20, i32 14, i32 16, i32 16, i32 11, i32 29, i32 2, i32 23, i32 16, i32 8, i32 21>
5308 ret <20 x i32> %3
5309 }
5310 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_20xi32_8(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5311 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %11, <4 x i32> %6, <4 x i32> <i32 0, i32 5, i32 5, i32 5>
5312 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
5313 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %10, <4 x i32> <i3 2 0, i32 1, i32 2, i32 6>
5314 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %6, <4 x i32> %9, <4 x i32> <i32 0, i32 5, i32 5, i32 5>
5315 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
5316 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
5317 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %6, <4 x i32> %9, <4 x i32> <i32 3, i32 4, i32 4, i32 4>
5318 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %19, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
5319 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %20, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
5320 ; CHECK-NEXT: %22 = shufflevector <4 x i32> %8, <4 x i32> %6, <4 x i32> <i32 0, i32 7, i32 7, i32 7>
5321 ; CHECK-NEXT: %23 = shufflevector <4 x i32> %22, <4 x i32> %11, <4 x i32> <i3 2 0, i32 1, i32 5, i32 5>
5322 ; CHECK-NEXT: %24 = shufflevector <4 x i32> %23, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
5323 ; CHECK-NEXT: %25 = shufflevector <4 x i32> %9, <4 x i32> %8, <4 x i32> <i32 3, i32 4, i32 4, i32 4>
5324 ; CHECK-NEXT: %26 = shufflevector <4 x i32> %25, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
5325 ; CHECK-NEXT: %27 = shufflevector <4 x i32> %26, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
5326 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %0, align 16
5327 ; CHECK-NEXT: store <4 x i32> %21, <4 x i32>* %1, align 16
5328 ; CHECK-NEXT: store <4 x i32> %24, <4 x i32>* %2, align 16
5329 ; CHECK-NEXT: store <4 x i32> %27, <4 x i32>* %3, align 16
5330 ; CHECK-NEXT: ret <4 x i32> %15
5331
5332 define <20 x i32> @shuffle_16xi32_to_20xi32_9(<16 x i32>, <16 x i32>) {
5333 %3 = shufflevector <16 x i32> %0, <16 x i32> %1, <20 x i32> <i32 5, i32 7, i32 24, i32 3, i32 0, i32 11, i32 19, i32 10, i32 26, i32 3, i32 25, i32 16, i32 27 , i32 23, i32 9, i32 26, i32 27, i32 7, i32 29, i32 23>
5334 ret <20 x i32> %3
5335 }
5336 ; CHECK-LABEL: define <4 x i32> @shuffle_16xi32_to_20xi32_9(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5337 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %5, <4 x i32> %10, <4 x i32> <i32 1, i32 3, i32 4, i32 4>
5338 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
5339 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %4, <4 x i32> %6, <4 x i32> <i32 0, i32 7, i32 7, i32 7>
5340 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
5341 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
5342 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %10, <4 x i32> %4, <4 x i32> <i32 2, i32 7, i32 1, i32 1>
5343 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
5344 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %10, <4 x i32> %9, <4 x i32> <i32 3, i32 7, i32 7, i32 7>
5345 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %20, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
5346 ; CHECK-NEXT: %22 = shufflevector <4 x i32> %21, <4 x i32> %10, <4 x i32> <i3 2 0, i32 1, i32 2, i32 6>
5347 ; CHECK-NEXT: %23 = shufflevector <4 x i32> %10, <4 x i32> %5, <4 x i32> <i32 3, i32 7, i32 7, i32 7>
5348 ; CHECK-NEXT: %24 = shufflevector <4 x i32> %23, <4 x i32> %11, <4 x i32> <i3 2 0, i32 1, i32 5, i32 5>
5349 ; CHECK-NEXT: %25 = shufflevector <4 x i32> %24, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
5350 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %0, align 16
5351 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %1, align 16
5352 ; CHECK-NEXT: store <4 x i32> %22, <4 x i32>* %2, align 16
5353 ; CHECK-NEXT: store <4 x i32> %25, <4 x i32>* %3, align 16
5354 ; CHECK-NEXT: ret <4 x i32> %14
5355
5356 define <2 x i32> @shuffle_20xi32_to_2xi32_0(<20 x i32>, <20 x i32>) {
5357 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <2 x i32> <i32 4, i32 2>
5358 ret <2 x i32> %3
5359 }
5360 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_2xi32_0(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5361 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %1, <4 x i32> %0, <4 x i32> <i32 0, i32 6, i32 6, i32 6>
5362 ; CHECK-NEXT: ret <4 x i32> %11
5363
5364 define <2 x i32> @shuffle_20xi32_to_2xi32_1(<20 x i32>, <20 x i32>) {
5365 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <2 x i32> <i32 2, i32 4>
5366 ret <2 x i32> %3
5367 }
5368 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_2xi32_1(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5369 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %0, <4 x i32> %1, <4 x i32> <i32 2, i32 4, i32 4, i32 4>
5370 ; CHECK-NEXT: ret <4 x i32> %11
5371
5372 define <2 x i32> @shuffle_20xi32_to_2xi32_2(<20 x i32>, <20 x i32>) {
5373 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <2 x i32> <i32 34, i32 16>
5374 ret <2 x i32> %3
5375 }
5376 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_2xi32_2(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5377 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %8, <4 x i32> %4, <4 x i32> <i32 2, i32 4, i32 4, i32 4>
5378 ; CHECK-NEXT: ret <4 x i32> %11
5379
5380 define <2 x i32> @shuffle_20xi32_to_2xi32_3(<20 x i32>, <20 x i32>) {
5381 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <2 x i32> <i32 27, i32 25>
5382 ret <2 x i32> %3
5383 }
5384 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_2xi32_3(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5385 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %6, <4 x i32> undef, <4 x i32> <i 32 3, i32 1, i32 1, i32 1>
5386 ; CHECK-NEXT: ret <4 x i32> %11
5387
5388 define <2 x i32> @shuffle_20xi32_to_2xi32_4(<20 x i32>, <20 x i32>) {
5389 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <2 x i32> <i32 2, i32 29>
5390 ret <2 x i32> %3
5391 }
5392 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_2xi32_4(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5393 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %0, <4 x i32> %7, <4 x i32> <i32 2, i32 5, i32 5, i32 5>
5394 ; CHECK-NEXT: ret <4 x i32> %11
5395
5396 define <2 x i32> @shuffle_20xi32_to_2xi32_5(<20 x i32>, <20 x i32>) {
5397 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <2 x i32> <i32 18, i32 0>
5398 ret <2 x i32> %3
5399 }
5400 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_2xi32_5(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5401 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %4, <4 x i32> %0, <4 x i32> <i32 2, i32 4, i32 4, i32 4>
5402 ; CHECK-NEXT: ret <4 x i32> %11
5403
5404 define <2 x i32> @shuffle_20xi32_to_2xi32_6(<20 x i32>, <20 x i32>) {
5405 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <2 x i32> <i32 37, i32 3>
5406 ret <2 x i32> %3
5407 }
5408 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_2xi32_6(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5409 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %9, <4 x i32> %0, <4 x i32> <i32 1, i32 7, i32 7, i32 7>
5410 ; CHECK-NEXT: ret <4 x i32> %11
5411
5412 define <2 x i32> @shuffle_20xi32_to_2xi32_7(<20 x i32>, <20 x i32>) {
5413 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <2 x i32> <i32 3, i32 33>
5414 ret <2 x i32> %3
5415 }
5416 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_2xi32_7(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5417 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %0, <4 x i32> %8, <4 x i32> <i32 3, i32 5, i32 5, i32 5>
5418 ; CHECK-NEXT: ret <4 x i32> %11
5419
5420 define <2 x i32> @shuffle_20xi32_to_2xi32_8(<20 x i32>, <20 x i32>) {
5421 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <2 x i32> <i32 28, i32 17>
5422 ret <2 x i32> %3
5423 }
5424 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_2xi32_8(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5425 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %7, <4 x i32> %4, <4 x i32> <i32 0, i32 5, i32 5, i32 5>
5426 ; CHECK-NEXT: ret <4 x i32> %11
5427
5428 define <2 x i32> @shuffle_20xi32_to_2xi32_9(<20 x i32>, <20 x i32>) {
5429 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <2 x i32> <i32 16, i32 35>
5430 ret <2 x i32> %3
5431 }
5432 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_2xi32_9(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5433 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %4, <4 x i32> %8, <4 x i32> <i32 0, i32 7, i32 7, i32 7>
5434 ; CHECK-NEXT: ret <4 x i32> %11
5435
5436 define <4 x i32> @shuffle_20xi32_to_4xi32_0(<20 x i32>, <20 x i32>) {
5437 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <4 x i32> <i32 38, i32 30, i3 2 38, i32 13>
5438 ret <4 x i32> %3
5439 }
5440 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_4xi32_0(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5441 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %9, <4 x i32> %7, <4 x i32> <i32 2, i32 6, i32 2, i32 2>
5442 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
5443 ; CHECK-NEXT: ret <4 x i32> %12
5444
5445 define <4 x i32> @shuffle_20xi32_to_4xi32_1(<20 x i32>, <20 x i32>) {
5446 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <4 x i32> <i32 38, i32 14, i3 2 25, i32 14>
5447 ret <4 x i32> %3
5448 }
5449 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_4xi32_1(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5450 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %9, <4 x i32> %3, <4 x i32> <i32 2, i32 6, i32 6, i32 6>
5451 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
5452 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
5453 ; CHECK-NEXT: ret <4 x i32> %13
5454
5455 define <4 x i32> @shuffle_20xi32_to_4xi32_2(<20 x i32>, <20 x i32>) {
5456 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <4 x i32> <i32 24, i32 7, i32 3, i32 32>
5457 ret <4 x i32> %3
5458 }
5459 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_4xi32_2(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5460 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %6, <4 x i32> %1, <4 x i32> <i32 0, i32 7, i32 7, i32 7>
5461 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %0, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
5462 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
5463 ; CHECK-NEXT: ret <4 x i32> %13
5464
5465 define <4 x i32> @shuffle_20xi32_to_4xi32_3(<20 x i32>, <20 x i32>) {
5466 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <4 x i32> <i32 18, i32 20, i3 2 35, i32 34>
5467 ret <4 x i32> %3
5468 }
5469 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_4xi32_3(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5470 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 2, i32 4, i32 4, i32 4>
5471 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 7, i32 6>
5472 ; CHECK-NEXT: ret <4 x i32> %12
5473
5474 define <4 x i32> @shuffle_20xi32_to_4xi32_4(<20 x i32>, <20 x i32>) {
5475 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <4 x i32> <i32 22, i32 26, i3 2 4, i32 9>
5476 ret <4 x i32> %3
5477 }
5478 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_4xi32_4(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5479 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %5, <4 x i32> %6, <4 x i32> <i32 2, i32 6, i32 6, i32 6>
5480 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %1, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
5481 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
5482 ; CHECK-NEXT: ret <4 x i32> %13
5483
5484 define <4 x i32> @shuffle_20xi32_to_4xi32_5(<20 x i32>, <20 x i32>) {
5485 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <4 x i32> <i32 29, i32 6, i32 31, i32 34>
5486 ret <4 x i32> %3
5487 }
5488 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_4xi32_5(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5489 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %7, <4 x i32> %1, <4 x i32> <i32 1, i32 6, i32 3, i32 3>
5490 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
5491 ; CHECK-NEXT: ret <4 x i32> %12
5492
5493 define <4 x i32> @shuffle_20xi32_to_4xi32_6(<20 x i32>, <20 x i32>) {
5494 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <4 x i32> <i32 9, i32 18, i32 15, i32 8>
5495 ret <4 x i32> %3
5496 }
5497 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_4xi32_6(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5498 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %2, <4 x i32> %4, <4 x i32> <i32 1, i32 6, i32 6, i32 6>
5499 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
5500 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
5501 ; CHECK-NEXT: ret <4 x i32> %13
5502
5503 define <4 x i32> @shuffle_20xi32_to_4xi32_7(<20 x i32>, <20 x i32>) {
5504 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <4 x i32> <i32 6, i32 38, i32 10, i32 8>
5505 ret <4 x i32> %3
5506 }
5507 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_4xi32_7(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5508 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %1, <4 x i32> %9, <4 x i32> <i32 2, i32 6, i32 6, i32 6>
5509 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 6, i32 4>
5510 ; CHECK-NEXT: ret <4 x i32> %12
5511
5512 define <4 x i32> @shuffle_20xi32_to_4xi32_8(<20 x i32>, <20 x i32>) {
5513 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <4 x i32> <i32 35, i32 2, i32 15, i32 21>
5514 ret <4 x i32> %3
5515 }
5516 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_4xi32_8(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5517 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %8, <4 x i32> %0, <4 x i32> <i32 3, i32 6, i32 6, i32 6>
5518 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
5519 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
5520 ; CHECK-NEXT: ret <4 x i32> %13
5521
5522 define <4 x i32> @shuffle_20xi32_to_4xi32_9(<20 x i32>, <20 x i32>) {
5523 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <4 x i32> <i32 21, i32 19, i3 2 27, i32 37>
5524 ret <4 x i32> %3
5525 }
5526 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_4xi32_9(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5527 ; CHECK-NEXT: %11 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 1, i32 7, i32 7, i32 7>
5528 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %11, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
5529 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
5530 ; CHECK-NEXT: ret <4 x i32> %13
5531
5532 define <6 x i32> @shuffle_20xi32_to_6xi32_0(<20 x i32>, <20 x i32>) {
5533 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <6 x i32> <i32 11, i32 6, i32 8, i32 2, i32 24, i32 3>
5534 ret <6 x i32> %3
5535 }
5536 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_6xi32_0(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5537 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 3, i32 6, i32 0, i32 0>
5538 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %1, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
5539 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %7, <4 x i32> %1, <4 x i32> <i32 0, i32 7, i32 7, i32 7>
5540 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %0, align 16
5541 ; CHECK-NEXT: ret <4 x i32> %13
5542
5543 define <6 x i32> @shuffle_20xi32_to_6xi32_1(<20 x i32>, <20 x i32>) {
5544 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <6 x i32> <i32 33, i32 24, i3 2 30, i32 20, i32 37, i32 31>
5545 ret <6 x i32> %3
5546 }
5547 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_6xi32_1(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5548 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %9, <4 x i32> %7, <4 x i32> <i32 1, i32 4, i32 4, i32 4>
5549 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
5550 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
5551 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %10, <4 x i32> %8, <4 x i32> <i32 1, i32 7, i32 7, i32 7>
5552 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %0, align 16
5553 ; CHECK-NEXT: ret <4 x i32> %14
5554
5555 define <6 x i32> @shuffle_20xi32_to_6xi32_2(<20 x i32>, <20 x i32>) {
5556 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <6 x i32> <i32 35, i32 38, i3 2 32, i32 2, i32 2, i32 2>
5557 ret <6 x i32> %3
5558 }
5559 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_6xi32_2(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5560 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %9, <4 x i32> %10, <4 x i32> <i32 3, i32 6, i32 0, i32 0>
5561 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %1, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
5562 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i 32 2, i32 2, i32 2, i32 2>
5563 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %0, align 16
5564 ; CHECK-NEXT: ret <4 x i32> %13
5565
5566 define <6 x i32> @shuffle_20xi32_to_6xi32_3(<20 x i32>, <20 x i32>) {
5567 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <6 x i32> <i32 34, i32 21, i3 2 21, i32 24, i32 8, i32 4>
5568 ret <6 x i32> %3
5569 }
5570 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_6xi32_3(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5571 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %9, <4 x i32> %6, <4 x i32> <i32 2, i32 5, i32 5, i32 5>
5572 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
5573 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 0, i32 4, i32 4, i32 4>
5574 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %0, align 16
5575 ; CHECK-NEXT: ret <4 x i32> %13
5576
5577 define <6 x i32> @shuffle_20xi32_to_6xi32_4(<20 x i32>, <20 x i32>) {
5578 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <6 x i32> <i32 18, i32 0, i32 33, i32 30, i32 22, i32 25>
5579 ret <6 x i32> %3
5580 }
5581 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_6xi32_4(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5582 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %5, <4 x i32> %1, <4 x i32> <i32 2, i32 4, i32 4, i32 4>
5583 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
5584 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
5585 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %6, <4 x i32> %7, <4 x i32> <i32 2, i32 5, i32 5, i32 5>
5586 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %0, align 16
5587 ; CHECK-NEXT: ret <4 x i32> %14
5588
5589 define <6 x i32> @shuffle_20xi32_to_6xi32_5(<20 x i32>, <20 x i32>) {
5590 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <6 x i32> <i32 1, i32 31, i32 14, i32 4, i32 25, i32 36>
5591 ret <6 x i32> %3
5592 }
5593 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_6xi32_5(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5594 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %1, <4 x i32> %8, <4 x i32> <i32 1, i32 7, i32 7, i32 7>
5595 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
5596 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
5597 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %7, <4 x i32> %10, <4 x i32> <i32 1, i32 4, i32 4, i32 4>
5598 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %0, align 16
5599 ; CHECK-NEXT: ret <4 x i32> %14
5600
5601 define <6 x i32> @shuffle_20xi32_to_6xi32_6(<20 x i32>, <20 x i32>) {
5602 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <6 x i32> <i32 9, i32 17, i32 0, i32 27, i32 9, i32 35>
5603 ret <6 x i32> %3
5604 }
5605 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_6xi32_6(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5606 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %3, <4 x i32> %5, <4 x i32> <i32 1, i32 5, i32 5, i32 5>
5607 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %1, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
5608 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
5609 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %3, <4 x i32> %9, <4 x i32> <i32 1, i32 7, i32 7, i32 7>
5610 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %0, align 16
5611 ; CHECK-NEXT: ret <4 x i32> %14
5612
5613 define <6 x i32> @shuffle_20xi32_to_6xi32_7(<20 x i32>, <20 x i32>) {
5614 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <6 x i32> <i32 28, i32 26, i3 2 24, i32 19, i32 9, i32 6>
5615 ret <6 x i32> %3
5616 }
5617 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_6xi32_7(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5618 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %8, <4 x i32> %7, <4 x i32> <i32 0, i32 6, i32 4, i32 4>
5619 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
5620 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 1, i32 6, i32 6, i32 6>
5621 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %0, align 16
5622 ; CHECK-NEXT: ret <4 x i32> %13
5623
5624 define <6 x i32> @shuffle_20xi32_to_6xi32_8(<20 x i32>, <20 x i32>) {
5625 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <6 x i32> <i32 38, i32 9, i32 19, i32 6, i32 0, i32 13>
5626 ret <6 x i32> %3
5627 }
5628 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_6xi32_8(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5629 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %10, <4 x i32> %3, <4 x i32> <i32 2, i32 5, i32 5, i32 5>
5630 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
5631 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
5632 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %1, <4 x i32> %4, <4 x i32> <i32 0, i32 5, i32 5, i32 5>
5633 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %0, align 16
5634 ; CHECK-NEXT: ret <4 x i32> %14
5635
5636 define <6 x i32> @shuffle_20xi32_to_6xi32_9(<20 x i32>, <20 x i32>) {
5637 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <6 x i32> <i32 30, i32 8, i32 19, i32 23, i32 28, i32 32>
5638 ret <6 x i32> %3
5639 }
5640 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_6xi32_9(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5641 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %8, <4 x i32> %3, <4 x i32> <i32 2, i32 4, i32 4, i32 4>
5642 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
5643 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
5644 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %8, <4 x i32> %9, <4 x i32> <i32 0, i32 4, i32 4, i32 4>
5645 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %0, align 16
5646 ; CHECK-NEXT: ret <4 x i32> %14
5647
5648 define <8 x i32> @shuffle_20xi32_to_8xi32_0(<20 x i32>, <20 x i32>) {
5649 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <8 x i32> <i32 9, i32 3, i32 37, i32 8, i32 15, i32 2, i32 19, i32 28>
5650 ret <8 x i32> %3
5651 }
5652 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_8xi32_0(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5653 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %3, <4 x i32> %1, <4 x i32> <i32 1, i32 7, i32 7, i32 7>
5654 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %10, <4 x i32> <i3 2 0, i32 1, i32 5, i32 5>
5655 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
5656 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %4, <4 x i32> %1, <4 x i32> <i32 3, i32 6, i32 6, i32 6>
5657 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
5658 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
5659 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %0, align 16
5660 ; CHECK-NEXT: ret <4 x i32> %14
5661
5662 define <8 x i32> @shuffle_20xi32_to_8xi32_1(<20 x i32>, <20 x i32>) {
5663 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <8 x i32> <i32 24, i32 28, i3 2 10, i32 37, i32 30, i32 5, i32 13, i32 11>
5664 ret <8 x i32> %3
5665 }
5666 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_8xi32_1(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5667 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %7, <4 x i32> %8, <4 x i32> <i32 0, i32 4, i32 4, i32 4>
5668 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
5669 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %10, <4 x i32> <i3 2 0, i32 1, i32 2, i32 5>
5670 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %8, <4 x i32> %2, <4 x i32> <i32 2, i32 5, i32 5, i32 5>
5671 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
5672 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
5673 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %0, align 16
5674 ; CHECK-NEXT: ret <4 x i32> %14
5675
5676 define <8 x i32> @shuffle_20xi32_to_8xi32_2(<20 x i32>, <20 x i32>) {
5677 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <8 x i32> <i32 12, i32 27, i3 2 35, i32 3, i32 10, i32 12, i32 38, i32 30>
5678 ret <8 x i32> %3
5679 }
5680 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_8xi32_2(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5681 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %4, <4 x i32> %7, <4 x i32> <i32 0, i32 7, i32 7, i32 7>
5682 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
5683 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %1, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
5684 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %3, <4 x i32> %4, <4 x i32> <i32 2, i32 4, i32 4, i32 4>
5685 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %10, <4 x i32> <i3 2 0, i32 1, i32 6, i32 6>
5686 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
5687 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %0, align 16
5688 ; CHECK-NEXT: ret <4 x i32> %14
5689
5690 define <8 x i32> @shuffle_20xi32_to_8xi32_3(<20 x i32>, <20 x i32>) {
5691 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <8 x i32> <i32 9, i32 9, i32 30, i32 13, i32 4, i32 17, i32 18, i32 27>
5692 ret <8 x i32> %3
5693 }
5694 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_8xi32_3(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5695 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %3, <4 x i32> %8, <4 x i32> <i32 1, i32 1, i32 6, i32 6>
5696 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
5697 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %2, <4 x i32> %5, <4 x i32> <i32 0, i32 5, i32 6, i32 6>
5698 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
5699 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %0, align 16
5700 ; CHECK-NEXT: ret <4 x i32> %13
5701
5702 define <8 x i32> @shuffle_20xi32_to_8xi32_4(<20 x i32>, <20 x i32>) {
5703 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <8 x i32> <i32 17, i32 35, i3 2 22, i32 26, i32 16, i32 2, i32 5, i32 15>
5704 ret <8 x i32> %3
5705 }
5706 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_8xi32_4(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5707 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %5, <4 x i32> %9, <4 x i32> <i32 1, i32 7, i32 7, i32 7>
5708 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
5709 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
5710 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %5, <4 x i32> %1, <4 x i32> <i32 0, i32 6, i32 6, i32 6>
5711 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
5712 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
5713 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %0, align 16
5714 ; CHECK-NEXT: ret <4 x i32> %14
5715
5716 define <8 x i32> @shuffle_20xi32_to_8xi32_5(<20 x i32>, <20 x i32>) {
5717 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <8 x i32> <i32 21, i32 22, i3 2 18, i32 11, i32 28, i32 36, i32 5, i32 35>
5718 ret <8 x i32> %3
5719 }
5720 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_8xi32_5(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5721 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %6, <4 x i32> %5, <4 x i32> <i32 1, i32 2, i32 6, i32 6>
5722 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
5723 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %8, <4 x i32> %10, <4 x i32> <i32 0, i32 4, i32 4, i32 4>
5724 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
5725 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
5726 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
5727 ; CHECK-NEXT: ret <4 x i32> %13
5728
5729 define <8 x i32> @shuffle_20xi32_to_8xi32_6(<20 x i32>, <20 x i32>) {
5730 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <8 x i32> <i32 4, i32 24, i32 15, i32 21, i32 34, i32 2, i32 5, i32 7>
5731 ret <8 x i32> %3
5732 }
5733 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_8xi32_6(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5734 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %2, <4 x i32> %7, <4 x i32> <i32 0, i32 4, i32 4, i32 4>
5735 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
5736 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
5737 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %9, <4 x i32> %1, <4 x i32> <i32 2, i32 6, i32 6, i32 6>
5738 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 5, i32 7>
5739 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
5740 ; CHECK-NEXT: ret <4 x i32> %14
5741
5742 define <8 x i32> @shuffle_20xi32_to_8xi32_7(<20 x i32>, <20 x i32>) {
5743 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <8 x i32> <i32 30, i32 2, i32 30, i32 11, i32 21, i32 9, i32 9, i32 34>
5744 ret <8 x i32> %3
5745 }
5746 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_8xi32_7(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5747 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %8, <4 x i32> %1, <4 x i32> <i32 2, i32 6, i32 2, i32 2>
5748 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
5749 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %6, <4 x i32> %3, <4 x i32> <i32 1, i32 5, i32 5, i32 5>
5750 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
5751 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %0, align 16
5752 ; CHECK-NEXT: ret <4 x i32> %13
5753
5754 define <8 x i32> @shuffle_20xi32_to_8xi32_8(<20 x i32>, <20 x i32>) {
5755 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <8 x i32> <i32 3, i32 9, i32 24, i32 37, i32 26, i32 38, i32 31, i32 27>
5756 ret <8 x i32> %3
5757 }
5758 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_8xi32_8(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5759 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %1, <4 x i32> %3, <4 x i32> <i32 3, i32 5, i32 5, i32 5>
5760 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
5761 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %10, <4 x i32> <i3 2 0, i32 1, i32 2, i32 5>
5762 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %7, <4 x i32> %10, <4 x i32> <i32 2, i32 6, i32 6, i32 6>
5763 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
5764 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
5765 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %0, align 16
5766 ; CHECK-NEXT: ret <4 x i32> %14
5767
5768 define <8 x i32> @shuffle_20xi32_to_8xi32_9(<20 x i32>, <20 x i32>) {
5769 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <8 x i32> <i32 4, i32 7, i32 2, i32 34, i32 21, i32 0, i32 29, i32 13>
5770 ret <8 x i32> %3
5771 }
5772 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_8xi32_9(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5773 ; CHECK-NEXT: %12 = shufflevector <4 x i32> %2, <4 x i32> %1, <4 x i32> <i32 0, i32 3, i32 6, i32 6>
5774 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %12, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
5775 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %6, <4 x i32> %1, <4 x i32> <i32 1, i32 4, i32 4, i32 4>
5776 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
5777 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
5778 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
5779 ; CHECK-NEXT: ret <4 x i32> %13
5780
5781 define <12 x i32> @shuffle_20xi32_to_12xi32_0(<20 x i32>, <20 x i32>) {
5782 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <12 x i32> <i32 34, i32 35, i 32 2, i32 2, i32 3, i32 18, i32 33, i32 2, i32 23, i32 13, i32 3, i32 22>
5783 ret <12 x i32> %3
5784 }
5785 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_12xi32_0(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5786 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %10, <4 x i32> %2, <4 x i32> <i32 2, i32 3, i32 6, i32 6>
5787 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %2, <4 x i32> %6, <4 x i32> <i32 3, i32 6, i32 6, i32 6>
5788 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %10, <4 x i32> <i3 2 0, i32 1, i32 5, i32 5>
5789 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
5790 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %7, <4 x i32> %5, <4 x i32> <i32 3, i32 5, i32 5, i32 5>
5791 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
5792 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
5793 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
5794 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %1, align 16
5795 ; CHECK-NEXT: ret <4 x i32> %13
5796
5797 define <12 x i32> @shuffle_20xi32_to_12xi32_1(<20 x i32>, <20 x i32>) {
5798 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <12 x i32> <i32 15, i32 25, i 32 21, i32 38, i32 35, i32 2, i32 30, i32 36, i32 30, i32 23, i32 29, i32 18>
5799 ret <12 x i32> %3
5800 }
5801 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_12xi32_1(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5802 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %5, <4 x i32> %8, <4 x i32> <i32 3, i32 5, i32 5, i32 5>
5803 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
5804 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %11, <4 x i32> <i3 2 0, i32 1, i32 2, i32 6>
5805 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %10, <4 x i32> %2, <4 x i32> <i32 3, i32 6, i32 6, i32 6>
5806 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
5807 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %11, <4 x i32> <i3 2 0, i32 1, i32 2, i32 4>
5808 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %9, <4 x i32> %7, <4 x i32> <i32 2, i32 7, i32 1, i32 1>
5809 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %19, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
5810 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %0, align 16
5811 ; CHECK-NEXT: store <4 x i32> %20, <4 x i32>* %1, align 16
5812 ; CHECK-NEXT: ret <4 x i32> %15
5813
5814 define <12 x i32> @shuffle_20xi32_to_12xi32_2(<20 x i32>, <20 x i32>) {
5815 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <12 x i32> <i32 6, i32 0, i32 30, i32 25, i32 3, i32 28, i32 33, i32 4, i32 2, i32 25, i32 16, i32 25>
5816 ret <12 x i32> %3
5817 }
5818 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_12xi32_2(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5819 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %3, <4 x i32> %2, <4 x i32> <i32 2, i32 4, i32 4, i32 4>
5820 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
5821 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
5822 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %2, <4 x i32> %9, <4 x i32> <i32 3, i32 4, i32 4, i32 4>
5823 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %10, <4 x i32> <i3 2 0, i32 1, i32 5, i32 5>
5824 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
5825 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %2, <4 x i32> %8, <4 x i32> <i32 2, i32 5, i32 5, i32 5>
5826 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %19, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
5827 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %20, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
5828 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %0, align 16
5829 ; CHECK-NEXT: store <4 x i32> %21, <4 x i32>* %1, align 16
5830 ; CHECK-NEXT: ret <4 x i32> %15
5831
5832 define <12 x i32> @shuffle_20xi32_to_12xi32_3(<20 x i32>, <20 x i32>) {
5833 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <12 x i32> <i32 11, i32 18, i 32 22, i32 16, i32 21, i32 36, i32 7, i32 16, i32 38, i32 31, i32 23, i32 38>
5834 ret <12 x i32> %3
5835 }
5836 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_12xi32_3(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5837 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %4, <4 x i32> %6, <4 x i32> <i32 3, i32 6, i32 6, i32 6>
5838 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
5839 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
5840 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %7, <4 x i32> %11, <4 x i32> <i32 1, i32 4, i32 4, i32 4>
5841 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
5842 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
5843 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %11, <4 x i32> %9, <4 x i32> <i32 2, i32 7, i32 7, i32 7>
5844 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %19, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
5845 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %20, <4 x i32> %11, <4 x i32> <i3 2 0, i32 1, i32 2, i32 6>
5846 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %0, align 16
5847 ; CHECK-NEXT: store <4 x i32> %21, <4 x i32>* %1, align 16
5848 ; CHECK-NEXT: ret <4 x i32> %15
5849
5850 define <12 x i32> @shuffle_20xi32_to_12xi32_4(<20 x i32>, <20 x i32>) {
5851 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <12 x i32> <i32 10, i32 19, i 32 38, i32 13, i32 21, i32 25, i32 13, i32 9, i32 0, i32 19, i32 17, i32 4>
5852 ret <12 x i32> %3
5853 }
5854 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_12xi32_4(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5855 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %4, <4 x i32> %6, <4 x i32> <i32 2, i32 7, i32 7, i32 7>
5856 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %11, <4 x i32> <i3 2 0, i32 1, i32 6, i32 6>
5857 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
5858 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %7, <4 x i32> %8, <4 x i32> <i32 1, i32 5, i32 5, i32 5>
5859 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
5860 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
5861 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %2, <4 x i32> %6, <4 x i32> <i32 0, i32 7, i32 5, i32 5>
5862 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %19, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
5863 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %0, align 16
5864 ; CHECK-NEXT: store <4 x i32> %20, <4 x i32>* %1, align 16
5865 ; CHECK-NEXT: ret <4 x i32> %15
5866
5867 define <12 x i32> @shuffle_20xi32_to_12xi32_5(<20 x i32>, <20 x i32>) {
5868 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <12 x i32> <i32 24, i32 38, i 32 8, i32 29, i32 2, i32 26, i32 0, i32 19, i32 17, i32 5, i32 24, i32 38>
5869 ret <12 x i32> %3
5870 }
5871 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_12xi32_5(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5872 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %8, <4 x i32> %11, <4 x i32> <i32 0, i32 6, i32 6, i32 6>
5873 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
5874 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
5875 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %2, <4 x i32> %8, <4 x i32> <i32 2, i32 6, i32 0, i32 0>
5876 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
5877 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %6, <4 x i32> %3, <4 x i32> <i32 1, i32 5, i32 5, i32 5>
5878 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
5879 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %19, <4 x i32> %11, <4 x i32> <i3 2 0, i32 1, i32 2, i32 6>
5880 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %0, align 16
5881 ; CHECK-NEXT: store <4 x i32> %20, <4 x i32>* %1, align 16
5882 ; CHECK-NEXT: ret <4 x i32> %15
5883
5884 define <12 x i32> @shuffle_20xi32_to_12xi32_6(<20 x i32>, <20 x i32>) {
5885 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <12 x i32> <i32 36, i32 20, i 32 2, i32 22, i32 26, i32 24, i32 24, i32 14, i32 10, i32 15, i32 32, i32 9>
5886 ret <12 x i32> %3
5887 }
5888 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_12xi32_6(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5889 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %11, <4 x i32> %7, <4 x i32> <i32 0, i32 4, i32 4, i32 4>
5890 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
5891 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
5892 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %8, <4 x i32> %5, <4 x i32> <i32 2, i32 0, i32 0, i32 6>
5893 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 2, i32 7, i32 7, i32 7>
5894 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %10, <4 x i32> <i3 2 0, i32 1, i32 4, i32 4>
5895 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
5896 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16
5897 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %1, align 16
5898 ; CHECK-NEXT: ret <4 x i32> %15
5899
5900 define <12 x i32> @shuffle_20xi32_to_12xi32_7(<20 x i32>, <20 x i32>) {
5901 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <12 x i32> <i32 1, i32 32, i3 2 3, i32 38, i32 8, i32 19, i32 35, i32 31, i32 7, i32 6, i32 25, i32 30>
5902 ret <12 x i32> %3
5903 }
5904 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_12xi32_7(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5905 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %2, <4 x i32> %10, <4 x i32> <i32 1, i32 4, i32 3, i32 3>
5906 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %11, <4 x i32> <i3 2 0, i32 1, i32 2, i32 6>
5907 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %4, <4 x i32> %6, <4 x i32> <i32 0, i32 7, i32 7, i32 7>
5908 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %10, <4 x i32> <i3 2 0, i32 1, i32 7, i32 7>
5909 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
5910 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %3, <4 x i32> %8, <4 x i32> <i32 3, i32 2, i32 5, i32 5>
5911 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
5912 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %0, align 16
5913 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %1, align 16
5914 ; CHECK-NEXT: ret <4 x i32> %14
5915
5916 define <12 x i32> @shuffle_20xi32_to_12xi32_8(<20 x i32>, <20 x i32>) {
5917 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <12 x i32> <i32 25, i32 27, i 32 9, i32 4, i32 28, i32 7, i32 32, i32 28, i32 22, i32 14, i32 25, i32 20>
5918 ret <12 x i32> %3
5919 }
5920 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_12xi32_8(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5921 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %8, <4 x i32> %4, <4 x i32> <i32 1, i32 3, i32 5, i32 5>
5922 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
5923 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %9, <4 x i32> %3, <4 x i32> <i32 0, i32 7, i32 7, i32 7>
5924 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %10, <4 x i32> <i3 2 0, i32 1, i32 4, i32 4>
5925 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
5926 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %7, <4 x i32> %5, <4 x i32> <i32 2, i32 6, i32 6, i32 6>
5927 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
5928 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %19, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
5929 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %0, align 16
5930 ; CHECK-NEXT: store <4 x i32> %20, <4 x i32>* %1, align 16
5931 ; CHECK-NEXT: ret <4 x i32> %14
5932
5933 define <12 x i32> @shuffle_20xi32_to_12xi32_9(<20 x i32>, <20 x i32>) {
5934 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <12 x i32> <i32 8, i32 3, i32 21, i32 12, i32 25, i32 28, i32 37, i32 36, i32 15, i32 15, i32 2, i32 2>
5935 ret <12 x i32> %3
5936 }
5937 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_12xi32_9(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5938 ; CHECK-NEXT: %13 = shufflevector <4 x i32> %4, <4 x i32> %2, <4 x i32> <i32 0, i32 7, i32 7, i32 7>
5939 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %13, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
5940 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
5941 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %8, <4 x i32> %9, <4 x i32> <i32 1, i32 4, i32 4, i32 4>
5942 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %11, <4 x i32> <i3 2 0, i32 1, i32 5, i32 4>
5943 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %5, <4 x i32> %2, <4 x i32> <i32 3, i32 3, i32 6, i32 6>
5944 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %0, align 16
5945 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %1, align 16
5946 ; CHECK-NEXT: ret <4 x i32> %15
5947
5948 define <16 x i32> @shuffle_20xi32_to_16xi32_0(<20 x i32>, <20 x i32>) {
5949 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <16 x i32> <i32 23, i32 33, i 32 2, i32 18, i32 9, i32 7, i32 36, i32 23, i32 23, i32 7, i32 10, i32 10, i32 5 , i32 23, i32 7, i32 21>
5950 ret <16 x i32> %3
5951 }
5952 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_16xi32_0(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5953 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %8, <4 x i32> %11, <4 x i32> <i32 3, i32 5, i32 5, i32 5>
5954 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
5955 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
5956 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 1, i32 7, i32 7, i32 7>
5957 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %12, <4 x i32> <i3 2 0, i32 1, i32 4, i32 4>
5958 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
5959 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %8, <4 x i32> %4, <4 x i32> <i32 3, i32 7, i32 7, i32 7>
5960 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %20, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
5961 ; CHECK-NEXT: %22 = shufflevector <4 x i32> %4, <4 x i32> %8, <4 x i32> <i32 1, i32 7, i32 3, i32 5>
5962 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %0, align 16
5963 ; CHECK-NEXT: store <4 x i32> %21, <4 x i32>* %1, align 16
5964 ; CHECK-NEXT: store <4 x i32> %22, <4 x i32>* %2, align 16
5965 ; CHECK-NEXT: ret <4 x i32> %16
5966
5967 define <16 x i32> @shuffle_20xi32_to_16xi32_1(<20 x i32>, <20 x i32>) {
5968 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <16 x i32> <i32 7, i32 21, i3 2 5, i32 10, i32 13, i32 28, i32 32, i32 22, i32 3, i32 21, i32 37, i32 38, i32 36, i32 6, i32 7, i32 7>
5969 ret <16 x i32> %3
5970 }
5971 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_16xi32_1(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5972 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %4, <4 x i32> %8, <4 x i32> <i32 3, i32 5, i32 1, i32 1>
5973 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
5974 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %6, <4 x i32> %10, <4 x i32> <i32 1, i32 4, i32 4, i32 4>
5975 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %11, <4 x i32> <i3 2 0, i32 1, i32 4, i32 4>
5976 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
5977 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %3, <4 x i32> %8, <4 x i32> <i32 3, i32 5, i32 5, i32 5>
5978 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %19, <4 x i32> %12, <4 x i32> <i3 2 0, i32 1, i32 5, i32 6>
5979 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %12, <4 x i32> %4, <4 x i32> <i32 0, i32 6, i32 7, i32 7>
5980 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %0, align 16
5981 ; CHECK-NEXT: store <4 x i32> %20, <4 x i32>* %1, align 16
5982 ; CHECK-NEXT: store <4 x i32> %21, <4 x i32>* %2, align 16
5983 ; CHECK-NEXT: ret <4 x i32> %15
5984
5985 define <16 x i32> @shuffle_20xi32_to_16xi32_2(<20 x i32>, <20 x i32>) {
5986 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <16 x i32> <i32 26, i32 1, i3 2 9, i32 38, i32 37, i32 4, i32 1, i32 20, i32 1, i32 19, i32 20, i32 12, i32 1, i32 32, i32 12, i32 3>
5987 ret <16 x i32> %3
5988 }
5989 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_16xi32_2(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
5990 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %9, <4 x i32> %3, <4 x i32> <i32 2, i32 5, i32 5, i32 5>
5991 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
5992 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %12, <4 x i32> <i3 2 0, i32 1, i32 2, i32 6>
5993 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %12, <4 x i32> %4, <4 x i32> <i32 1, i32 4, i32 4, i32 4>
5994 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
5995 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
5996 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %3, <4 x i32> %7, <4 x i32> <i32 1, i32 7, i32 7, i32 7>
5997 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %20, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
5998 ; CHECK-NEXT: %22 = shufflevector <4 x i32> %21, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
5999 ; CHECK-NEXT: %23 = shufflevector <4 x i32> %3, <4 x i32> %11, <4 x i32> <i32 1, i32 4, i32 4, i32 4>
6000 ; CHECK-NEXT: %24 = shufflevector <4 x i32> %23, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
6001 ; CHECK-NEXT: %25 = shufflevector <4 x i32> %24, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
6002 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %0, align 16
6003 ; CHECK-NEXT: store <4 x i32> %22, <4 x i32>* %1, align 16
6004 ; CHECK-NEXT: store <4 x i32> %25, <4 x i32>* %2, align 16
6005 ; CHECK-NEXT: ret <4 x i32> %16
6006
6007 define <16 x i32> @shuffle_20xi32_to_16xi32_3(<20 x i32>, <20 x i32>) {
6008 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <16 x i32> <i32 1, i32 11, i3 2 24, i32 21, i32 24, i32 8, i32 10, i32 36, i32 38, i32 31, i32 37, i32 12, i32 10, i32 28, i32 36, i32 25>
6009 ret <16 x i32> %3
6010 }
6011 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_16xi32_3(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
6012 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %3, <4 x i32> %5, <4 x i32> <i32 1, i32 7, i32 7, i32 7>
6013 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
6014 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
6015 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %9, <4 x i32> %5, <4 x i32> <i32 0, i32 4, i32 6, i32 6>
6016 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %12, <4 x i32> <i3 2 0, i32 1, i32 2, i32 4>
6017 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %12, <4 x i32> %10, <4 x i32> <i3 2 2, i32 7, i32 1, i32 1>
6018 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %19, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
6019 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %5, <4 x i32> %10, <4 x i32> <i32 2, i32 4, i32 4, i32 4>
6020 ; CHECK-NEXT: %22 = shufflevector <4 x i32> %21, <4 x i32> %12, <4 x i32> <i3 2 0, i32 1, i32 4, i32 4>
6021 ; CHECK-NEXT: %23 = shufflevector <4 x i32> %22, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
6022 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %0, align 16
6023 ; CHECK-NEXT: store <4 x i32> %20, <4 x i32>* %1, align 16
6024 ; CHECK-NEXT: store <4 x i32> %23, <4 x i32>* %2, align 16
6025 ; CHECK-NEXT: ret <4 x i32> %16
6026
6027 define <16 x i32> @shuffle_20xi32_to_16xi32_4(<20 x i32>, <20 x i32>) {
6028 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <16 x i32> <i32 29, i32 10, i 32 26, i32 20, i32 38, i32 16, i32 37, i32 25, i32 34, i32 2, i32 0, i32 38, i32 19, i32 4, i32 31, i32 28>
6029 ret <16 x i32> %3
6030 }
6031 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_16xi32_4(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
6032 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %10, <4 x i32> %5, <4 x i32> <i32 1, i32 6, i32 6, i32 6>
6033 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
6034 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
6035 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %12, <4 x i32> %7, <4 x i32> <i32 2, i32 4, i32 1, i32 1>
6036 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
6037 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %11, <4 x i32> %3, <4 x i32> <i32 2, i32 6, i32 4, i32 4>
6038 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %19, <4 x i32> %12, <4 x i32> <i3 2 0, i32 1, i32 2, i32 6>
6039 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %7, <4 x i32> %4, <4 x i32> <i32 3, i32 4, i32 4, i32 4>
6040 ; CHECK-NEXT: %22 = shufflevector <4 x i32> %21, <4 x i32> %10, <4 x i32> <i3 2 0, i32 1, i32 7, i32 4>
6041 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %0, align 16
6042 ; CHECK-NEXT: store <4 x i32> %20, <4 x i32>* %1, align 16
6043 ; CHECK-NEXT: store <4 x i32> %22, <4 x i32>* %2, align 16
6044 ; CHECK-NEXT: ret <4 x i32> %16
6045
6046 define <16 x i32> @shuffle_20xi32_to_16xi32_5(<20 x i32>, <20 x i32>) {
6047 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <16 x i32> <i32 36, i32 30, i 32 26, i32 8, i32 25, i32 2, i32 28, i32 37, i32 17, i32 8, i32 29, i32 16, i32 12, i32 12, i32 8, i32 35>
6048 ret <16 x i32> %3
6049 }
6050 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_16xi32_5(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
6051 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %12, <4 x i32> %10, <4 x i32> <i3 2 0, i32 6, i32 6, i32 6>
6052 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
6053 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
6054 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %9, <4 x i32> %3, <4 x i32> <i32 1, i32 6, i32 6, i32 6>
6055 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %10, <4 x i32> <i3 2 0, i32 1, i32 4, i32 4>
6056 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %12, <4 x i32> <i3 2 0, i32 1, i32 2, i32 5>
6057 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %7, <4 x i32> %5, <4 x i32> <i32 1, i32 4, i32 4, i32 4>
6058 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %20, <4 x i32> %10, <4 x i32> <i3 2 0, i32 1, i32 5, i32 5>
6059 ; CHECK-NEXT: %22 = shufflevector <4 x i32> %21, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
6060 ; CHECK-NEXT: %23 = shufflevector <4 x i32> %6, <4 x i32> %5, <4 x i32> <i32 0, i32 0, i32 4, i32 4>
6061 ; CHECK-NEXT: %24 = shufflevector <4 x i32> %23, <4 x i32> %11, <4 x i32> <i3 2 0, i32 1, i32 2, i32 7>
6062 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %0, align 16
6063 ; CHECK-NEXT: store <4 x i32> %22, <4 x i32>* %1, align 16
6064 ; CHECK-NEXT: store <4 x i32> %24, <4 x i32>* %2, align 16
6065 ; CHECK-NEXT: ret <4 x i32> %16
6066
6067 define <16 x i32> @shuffle_20xi32_to_16xi32_6(<20 x i32>, <20 x i32>) {
6068 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <16 x i32> <i32 15, i32 11, i 32 15, i32 15, i32 11, i32 15, i32 5, i32 1, i32 27, i32 2, i32 29, i32 32, i32 24, i32 35, i32 35, i32 13>
6069 ret <16 x i32> %3
6070 }
6071 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_16xi32_6(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
6072 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %6, <4 x i32> %5, <4 x i32> <i32 3, i32 7, i32 3, i32 3>
6073 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %5, <4 x i32> %6, <4 x i32> <i32 3, i32 7, i32 7, i32 7>
6074 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
6075 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
6076 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %9, <4 x i32> %3, <4 x i32> <i32 3, i32 6, i32 6, i32 6>
6077 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %10, <4 x i32> <i3 2 0, i32 1, i32 5, i32 5>
6078 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %19, <4 x i32> %11, <4 x i32> <i3 2 0, i32 1, i32 2, i32 4>
6079 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %9, <4 x i32> %11, <4 x i32> <i32 0, i32 7, i32 7, i32 7>
6080 ; CHECK-NEXT: %22 = shufflevector <4 x i32> %21, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
6081 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %0, align 16
6082 ; CHECK-NEXT: store <4 x i32> %20, <4 x i32>* %1, align 16
6083 ; CHECK-NEXT: store <4 x i32> %22, <4 x i32>* %2, align 16
6084 ; CHECK-NEXT: ret <4 x i32> %14
6085
6086 define <16 x i32> @shuffle_20xi32_to_16xi32_7(<20 x i32>, <20 x i32>) {
6087 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <16 x i32> <i32 28, i32 10, i 32 9, i32 29, i32 3, i32 11, i32 37, i32 6, i32 34, i32 6, i32 9, i32 9, i32 32, i32 12, i32 20, i32 27>
6088 ret <16 x i32> %3
6089 }
6090 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_16xi32_7(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
6091 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %10, <4 x i32> %5, <4 x i32> <i32 0, i32 6, i32 5, i32 1>
6092 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %3, <4 x i32> %5, <4 x i32> <i32 3, i32 7, i32 7, i32 7>
6093 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %12, <4 x i32> <i3 2 0, i32 1, i32 5, i32 5>
6094 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
6095 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %11, <4 x i32> %4, <4 x i32> <i32 2, i32 6, i32 6, i32 6>
6096 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
6097 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %11, <4 x i32> %6, <4 x i32> <i32 0, i32 4, i32 4, i32 4>
6098 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %20, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
6099 ; CHECK-NEXT: %22 = shufflevector <4 x i32> %21, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
6100 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %0, align 16
6101 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %1, align 16
6102 ; CHECK-NEXT: store <4 x i32> %22, <4 x i32>* %2, align 16
6103 ; CHECK-NEXT: ret <4 x i32> %14
6104
6105 define <16 x i32> @shuffle_20xi32_to_16xi32_8(<20 x i32>, <20 x i32>) {
6106 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <16 x i32> <i32 38, i32 9, i3 2 26, i32 34, i32 15, i32 20, i32 21, i32 37, i32 13, i32 30, i32 23, i32 37, i3 2 2, i32 38, i32 5, i32 15>
6107 ret <16 x i32> %3
6108 }
6109 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_16xi32_8(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
6110 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %12, <4 x i32> %5, <4 x i32> <i32 2, i32 5, i32 5, i32 5>
6111 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
6112 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %11, <4 x i32> <i3 2 0, i32 1, i32 2, i32 6>
6113 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %6, <4 x i32> %8, <4 x i32> <i32 3, i32 4, i32 5, i32 5>
6114 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %12, <4 x i32> <i3 2 0, i32 1, i32 2, i32 5>
6115 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %6, <4 x i32> %10, <4 x i32> <i32 1, i32 6, i32 6, i32 6>
6116 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %19, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
6117 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %20, <4 x i32> %12, <4 x i32> <i3 2 0, i32 1, i32 2, i32 5>
6118 ; CHECK-NEXT: %22 = shufflevector <4 x i32> %3, <4 x i32> %12, <4 x i32> <i32 2, i32 6, i32 6, i32 6>
6119 ; CHECK-NEXT: %23 = shufflevector <4 x i32> %22, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
6120 ; CHECK-NEXT: %24 = shufflevector <4 x i32> %23, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
6121 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %0, align 16
6122 ; CHECK-NEXT: store <4 x i32> %21, <4 x i32>* %1, align 16
6123 ; CHECK-NEXT: store <4 x i32> %24, <4 x i32>* %2, align 16
6124 ; CHECK-NEXT: ret <4 x i32> %16
6125
6126 define <16 x i32> @shuffle_20xi32_to_16xi32_9(<20 x i32>, <20 x i32>) {
6127 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <16 x i32> <i32 16, i32 0, i3 2 7, i32 4, i32 26, i32 18, i32 22, i32 14, i32 15, i32 6, i32 23, i32 6, i32 24 , i32 7, i32 16, i32 1>
6128 ret <16 x i32> %3
6129 }
6130 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_16xi32_9(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
6131 ; CHECK-NEXT: %14 = shufflevector <4 x i32> %7, <4 x i32> %3, <4 x i32> <i32 0, i32 4, i32 4, i32 4>
6132 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %14, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 7, i32 4>
6133 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %9, <4 x i32> %7, <4 x i32> <i32 2, i32 6, i32 6, i32 6>
6134 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
6135 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
6136 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %6, <4 x i32> %4, <4 x i32> <i32 3, i32 6, i32 6, i32 6>
6137 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %19, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
6138 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %20, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
6139 ; CHECK-NEXT: %22 = shufflevector <4 x i32> %9, <4 x i32> %4, <4 x i32> <i32 0, i32 7, i32 7, i32 7>
6140 ; CHECK-NEXT: %23 = shufflevector <4 x i32> %22, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
6141 ; CHECK-NEXT: %24 = shufflevector <4 x i32> %23, <4 x i32> %3, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
6142 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %0, align 16
6143 ; CHECK-NEXT: store <4 x i32> %21, <4 x i32>* %1, align 16
6144 ; CHECK-NEXT: store <4 x i32> %24, <4 x i32>* %2, align 16
6145 ; CHECK-NEXT: ret <4 x i32> %15
6146
6147 define <20 x i32> @shuffle_20xi32_to_20xi32_0(<20 x i32>, <20 x i32>) {
6148 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <20 x i32> <i32 33, i32 9, i3 2 31, i32 14, i32 24, i32 15, i32 38, i32 7, i32 35, i32 32, i32 2, i32 29, i32 16, i32 6, i32 34, i32 2, i32 12, i32 32, i32 30, i32 16>
6149 ret <20 x i32> %3
6150 }
6151 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_20xi32_0(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
6152 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %12, <4 x i32> %6, <4 x i32> <i32 1, i32 5, i32 5, i32 5>
6153 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %11, <4 x i32> <i3 2 0, i32 1, i32 7, i32 7>
6154 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
6155 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %10, <4 x i32> %7, <4 x i32> <i32 0, i32 7, i32 7, i32 7>
6156 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %13, <4 x i32> <i3 2 0, i32 1, i32 6, i32 6>
6157 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %19, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
6158 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %12, <4 x i32> %4, <4 x i32> <i32 3, i32 0, i32 6, i32 6>
6159 ; CHECK-NEXT: %22 = shufflevector <4 x i32> %21, <4 x i32> %11, <4 x i32> <i3 2 0, i32 1, i32 2, i32 5>
6160 ; CHECK-NEXT: %23 = shufflevector <4 x i32> %8, <4 x i32> %5, <4 x i32> <i32 0, i32 6, i32 6, i32 6>
6161 ; CHECK-NEXT: %24 = shufflevector <4 x i32> %23, <4 x i32> %12, <4 x i32> <i3 2 0, i32 1, i32 6, i32 6>
6162 ; CHECK-NEXT: %25 = shufflevector <4 x i32> %24, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
6163 ; CHECK-NEXT: %26 = shufflevector <4 x i32> %7, <4 x i32> %12, <4 x i32> <i32 0, i32 4, i32 4, i32 4>
6164 ; CHECK-NEXT: %27 = shufflevector <4 x i32> %26, <4 x i32> %11, <4 x i32> <i3 2 0, i32 1, i32 6, i32 6>
6165 ; CHECK-NEXT: %28 = shufflevector <4 x i32> %27, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
6166 ; CHECK-NEXT: store <4 x i32> %20, <4 x i32>* %0, align 16
6167 ; CHECK-NEXT: store <4 x i32> %22, <4 x i32>* %1, align 16
6168 ; CHECK-NEXT: store <4 x i32> %25, <4 x i32>* %2, align 16
6169 ; CHECK-NEXT: store <4 x i32> %28, <4 x i32>* %3, align 16
6170 ; CHECK-NEXT: ret <4 x i32> %17
6171
6172 define <20 x i32> @shuffle_20xi32_to_20xi32_1(<20 x i32>, <20 x i32>) {
6173 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <20 x i32> <i32 27, i32 11, i 32 23, i32 33, i32 29, i32 28, i32 6, i32 17, i32 26, i32 23, i32 9, i32 5, i32 14, i32 28, i32 18, i32 14, i32 14, i32 7, i32 36, i32 11>
6174 ret <20 x i32> %3
6175 }
6176 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_20xi32_1(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
6177 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %10, <4 x i32> %6, <4 x i32> <i32 3, i32 7, i32 7, i32 7>
6178 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
6179 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %12, <4 x i32> <i3 2 0, i32 1, i32 2, i32 5>
6180 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %11, <4 x i32> %5, <4 x i32> <i32 1, i32 0, i32 6, i32 6>
6181 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
6182 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %10, <4 x i32> %9, <4 x i32> <i32 2, i32 7, i32 7, i32 7>
6183 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %20, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
6184 ; CHECK-NEXT: %22 = shufflevector <4 x i32> %21, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
6185 ; CHECK-NEXT: %23 = shufflevector <4 x i32> %7, <4 x i32> %11, <4 x i32> <i32 2, i32 4, i32 4, i32 4>
6186 ; CHECK-NEXT: %24 = shufflevector <4 x i32> %23, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
6187 ; CHECK-NEXT: %25 = shufflevector <4 x i32> %24, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
6188 ; CHECK-NEXT: %26 = shufflevector <4 x i32> %7, <4 x i32> %5, <4 x i32> <i32 2, i32 7, i32 7, i32 7>
6189 ; CHECK-NEXT: %27 = shufflevector <4 x i32> %26, <4 x i32> %13, <4 x i32> <i3 2 0, i32 1, i32 4, i32 4>
6190 ; CHECK-NEXT: %28 = shufflevector <4 x i32> %27, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
6191 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %0, align 16
6192 ; CHECK-NEXT: store <4 x i32> %22, <4 x i32>* %1, align 16
6193 ; CHECK-NEXT: store <4 x i32> %25, <4 x i32>* %2, align 16
6194 ; CHECK-NEXT: store <4 x i32> %28, <4 x i32>* %3, align 16
6195 ; CHECK-NEXT: ret <4 x i32> %17
6196
6197 define <20 x i32> @shuffle_20xi32_to_20xi32_2(<20 x i32>, <20 x i32>) {
6198 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <20 x i32> <i32 19, i32 19, i 32 25, i32 17, i32 14, i32 16, i32 0, i32 12, i32 29, i32 17, i32 34, i32 18, i3 2 17, i32 10, i32 27, i32 7, i32 8, i32 20, i32 13, i32 18>
6199 ret <20 x i32> %3
6200 }
6201 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_20xi32_2(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
6202 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %8, <4 x i32> %10, <4 x i32> <i32 3, i32 3, i32 5, i32 1>
6203 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %7, <4 x i32> %8, <4 x i32> <i32 2, i32 4, i32 4, i32 4>
6204 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
6205 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
6206 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %11, <4 x i32> %8, <4 x i32> <i32 1, i32 5, i32 5, i32 5>
6207 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %19, <4 x i32> %12, <4 x i32> <i3 2 0, i32 1, i32 6, i32 6>
6208 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %20, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
6209 ; CHECK-NEXT: %22 = shufflevector <4 x i32> %8, <4 x i32> %6, <4 x i32> <i32 1, i32 6, i32 6, i32 6>
6210 ; CHECK-NEXT: %23 = shufflevector <4 x i32> %22, <4 x i32> %10, <4 x i32> <i3 2 0, i32 1, i32 7, i32 7>
6211 ; CHECK-NEXT: %24 = shufflevector <4 x i32> %23, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
6212 ; CHECK-NEXT: %25 = shufflevector <4 x i32> %6, <4 x i32> %9, <4 x i32> <i32 0, i32 4, i32 4, i32 4>
6213 ; CHECK-NEXT: %26 = shufflevector <4 x i32> %25, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
6214 ; CHECK-NEXT: %27 = shufflevector <4 x i32> %26, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
6215 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %0, align 16
6216 ; CHECK-NEXT: store <4 x i32> %21, <4 x i32>* %1, align 16
6217 ; CHECK-NEXT: store <4 x i32> %24, <4 x i32>* %2, align 16
6218 ; CHECK-NEXT: store <4 x i32> %27, <4 x i32>* %3, align 16
6219 ; CHECK-NEXT: ret <4 x i32> %15
6220
6221 define <20 x i32> @shuffle_20xi32_to_20xi32_3(<20 x i32>, <20 x i32>) {
6222 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <20 x i32> <i32 7, i32 0, i32 35, i32 30, i32 11, i32 32, i32 10, i32 0, i32 27, i32 10, i32 30, i32 32, i32 2, i32 26, i32 16, i32 2, i32 38, i32 16, i32 21, i32 21>
6223 ret <20 x i32> %3
6224 }
6225 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_20xi32_3(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
6226 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 3, i32 4, i32 4, i32 4>
6227 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %12, <4 x i32> <i3 2 0, i32 1, i32 7, i32 7>
6228 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %11, <4 x i32> <i3 2 0, i32 1, i32 2, i32 6>
6229 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %6, <4 x i32> %12, <4 x i32> <i32 3, i32 4, i32 2, i32 2>
6230 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
6231 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %10, <4 x i32> %6, <4 x i32> <i32 3, i32 6, i32 6, i32 6>
6232 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %20, <4 x i32> %11, <4 x i32> <i3 2 0, i32 1, i32 6, i32 6>
6233 ; CHECK-NEXT: %22 = shufflevector <4 x i32> %21, <4 x i32> %12, <4 x i32> <i3 2 0, i32 1, i32 2, i32 4>
6234 ; CHECK-NEXT: %23 = shufflevector <4 x i32> %4, <4 x i32> %10, <4 x i32> <i32 2, i32 6, i32 6, i32 6>
6235 ; CHECK-NEXT: %24 = shufflevector <4 x i32> %23, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
6236 ; CHECK-NEXT: %25 = shufflevector <4 x i32> %24, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
6237 ; CHECK-NEXT: %26 = shufflevector <4 x i32> %13, <4 x i32> %8, <4 x i32> <i32 2, i32 4, i32 4, i32 4>
6238 ; CHECK-NEXT: %27 = shufflevector <4 x i32> %26, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
6239 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %0, align 16
6240 ; CHECK-NEXT: store <4 x i32> %22, <4 x i32>* %1, align 16
6241 ; CHECK-NEXT: store <4 x i32> %25, <4 x i32>* %2, align 16
6242 ; CHECK-NEXT: store <4 x i32> %27, <4 x i32>* %3, align 16
6243 ; CHECK-NEXT: ret <4 x i32> %17
6244
6245 define <20 x i32> @shuffle_20xi32_to_20xi32_4(<20 x i32>, <20 x i32>) {
6246 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <20 x i32> <i32 6, i32 10, i3 2 14, i32 28, i32 21, i32 3, i32 16, i32 4, i32 22, i32 38, i32 4, i32 29, i32 2 0, i32 27, i32 32, i32 16, i32 8, i32 20, i32 9, i32 29>
6247 ret <20 x i32> %3
6248 }
6249 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_20xi32_4(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
6250 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %5, <4 x i32> %6, <4 x i32> <i32 2, i32 6, i32 6, i32 6>
6251 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
6252 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %11, <4 x i32> <i3 2 0, i32 1, i32 2, i32 4>
6253 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %9, <4 x i32> %4, <4 x i32> <i32 1, i32 7, i32 7, i32 7>
6254 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
6255 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %19, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
6256 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %9, <4 x i32> %13, <4 x i32> <i32 2, i32 6, i32 6, i32 6>
6257 ; CHECK-NEXT: %22 = shufflevector <4 x i32> %21, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
6258 ; CHECK-NEXT: %23 = shufflevector <4 x i32> %22, <4 x i32> %11, <4 x i32> <i3 2 0, i32 1, i32 2, i32 5>
6259 ; CHECK-NEXT: %24 = shufflevector <4 x i32> %9, <4 x i32> %10, <4 x i32> <i32 0, i32 7, i32 7, i32 7>
6260 ; CHECK-NEXT: %25 = shufflevector <4 x i32> %24, <4 x i32> %12, <4 x i32> <i3 2 0, i32 1, i32 4, i32 4>
6261 ; CHECK-NEXT: %26 = shufflevector <4 x i32> %25, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
6262 ; CHECK-NEXT: %27 = shufflevector <4 x i32> %6, <4 x i32> %9, <4 x i32> <i32 0, i32 4, i32 1, i32 1>
6263 ; CHECK-NEXT: %28 = shufflevector <4 x i32> %27, <4 x i32> %11, <4 x i32> <i3 2 0, i32 1, i32 2, i32 5>
6264 ; CHECK-NEXT: store <4 x i32> %20, <4 x i32>* %0, align 16
6265 ; CHECK-NEXT: store <4 x i32> %23, <4 x i32>* %1, align 16
6266 ; CHECK-NEXT: store <4 x i32> %26, <4 x i32>* %2, align 16
6267 ; CHECK-NEXT: store <4 x i32> %28, <4 x i32>* %3, align 16
6268 ; CHECK-NEXT: ret <4 x i32> %17
6269
6270 define <20 x i32> @shuffle_20xi32_to_20xi32_5(<20 x i32>, <20 x i32>) {
6271 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <20 x i32> <i32 6, i32 18, i3 2 22, i32 15, i32 7, i32 2, i32 14, i32 32, i32 10, i32 36, i32 7, i32 38, i32 2 1, i32 33, i32 19, i32 23, i32 30, i32 15, i32 2, i32 6>
6272 ret <20 x i32> %3
6273 }
6274 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_20xi32_5(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
6275 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %5, <4 x i32> %8, <4 x i32> <i32 2, i32 6, i32 6, i32 6>
6276 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
6277 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
6278 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 3, i32 6, i32 6, i32 6>
6279 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
6280 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %19, <4 x i32> %12, <4 x i32> <i3 2 0, i32 1, i32 2, i32 4>
6281 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %6, <4 x i32> %13, <4 x i32> <i32 2, i32 4, i32 4, i32 4>
6282 ; CHECK-NEXT: %22 = shufflevector <4 x i32> %21, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
6283 ; CHECK-NEXT: %23 = shufflevector <4 x i32> %22, <4 x i32> %13, <4 x i32> <i3 2 0, i32 1, i32 2, i32 6>
6284 ; CHECK-NEXT: %24 = shufflevector <4 x i32> %9, <4 x i32> %12, <4 x i32> <i32 1, i32 5, i32 5, i32 5>
6285 ; CHECK-NEXT: %25 = shufflevector <4 x i32> %24, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
6286 ; CHECK-NEXT: %26 = shufflevector <4 x i32> %25, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
6287 ; CHECK-NEXT: %27 = shufflevector <4 x i32> %11, <4 x i32> %7, <4 x i32> <i32 2, i32 7, i32 7, i32 7>
6288 ; CHECK-NEXT: %28 = shufflevector <4 x i32> %27, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
6289 ; CHECK-NEXT: %29 = shufflevector <4 x i32> %28, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
6290 ; CHECK-NEXT: store <4 x i32> %20, <4 x i32>* %0, align 16
6291 ; CHECK-NEXT: store <4 x i32> %23, <4 x i32>* %1, align 16
6292 ; CHECK-NEXT: store <4 x i32> %26, <4 x i32>* %2, align 16
6293 ; CHECK-NEXT: store <4 x i32> %29, <4 x i32>* %3, align 16
6294 ; CHECK-NEXT: ret <4 x i32> %17
6295
6296 define <20 x i32> @shuffle_20xi32_to_20xi32_6(<20 x i32>, <20 x i32>) {
6297 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <20 x i32> <i32 8, i32 27, i3 2 21, i32 37, i32 5, i32 23, i32 38, i32 23, i32 4, i32 25, i32 12, i32 29, i32 30, i32 9, i32 21, i32 4, i32 10, i32 16, i32 18, i32 25>
6298 ret <20 x i32> %3
6299 }
6300 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_20xi32_6(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
6301 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %6, <4 x i32> %10, <4 x i32> <i32 0, i32 7, i32 7, i32 7>
6302 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
6303 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %13, <4 x i32> <i3 2 0, i32 1, i32 2, i32 5>
6304 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %5, <4 x i32> %9, <4 x i32> <i32 1, i32 7, i32 7, i32 7>
6305 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %13, <4 x i32> <i3 2 0, i32 1, i32 6, i32 6>
6306 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %19, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
6307 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %5, <4 x i32> %10, <4 x i32> <i32 0, i32 5, i32 5, i32 5>
6308 ; CHECK-NEXT: %22 = shufflevector <4 x i32> %21, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
6309 ; CHECK-NEXT: %23 = shufflevector <4 x i32> %22, <4 x i32> %11, <4 x i32> <i3 2 0, i32 1, i32 2, i32 5>
6310 ; CHECK-NEXT: %24 = shufflevector <4 x i32> %11, <4 x i32> %6, <4 x i32> <i32 2, i32 5, i32 5, i32 5>
6311 ; CHECK-NEXT: %25 = shufflevector <4 x i32> %24, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 5, i32 5>
6312 ; CHECK-NEXT: %26 = shufflevector <4 x i32> %25, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
6313 ; CHECK-NEXT: %27 = shufflevector <4 x i32> %6, <4 x i32> %8, <4 x i32> <i32 2, i32 4, i32 6, i32 6>
6314 ; CHECK-NEXT: %28 = shufflevector <4 x i32> %27, <4 x i32> %10, <4 x i32> <i3 2 0, i32 1, i32 2, i32 5>
6315 ; CHECK-NEXT: store <4 x i32> %20, <4 x i32>* %0, align 16
6316 ; CHECK-NEXT: store <4 x i32> %23, <4 x i32>* %1, align 16
6317 ; CHECK-NEXT: store <4 x i32> %26, <4 x i32>* %2, align 16
6318 ; CHECK-NEXT: store <4 x i32> %28, <4 x i32>* %3, align 16
6319 ; CHECK-NEXT: ret <4 x i32> %17
6320
6321 define <20 x i32> @shuffle_20xi32_to_20xi32_7(<20 x i32>, <20 x i32>) {
6322 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <20 x i32> <i32 12, i32 37, i 32 23, i32 16, i32 7, i32 6, i32 8, i32 21, i32 36, i32 19, i32 6, i32 2, i32 32 , i32 10, i32 18, i32 15, i32 7, i32 5, i32 6, i32 21>
6323 ret <20 x i32> %3
6324 }
6325 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_20xi32_7(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
6326 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %7, <4 x i32> %13, <4 x i32> <i32 0, i32 5, i32 5, i32 5>
6327 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
6328 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
6329 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %5, <4 x i32> %6, <4 x i32> <i32 3, i32 2, i32 4, i32 4>
6330 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
6331 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %13, <4 x i32> %8, <4 x i32> <i32 0, i32 7, i32 7, i32 7>
6332 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %20, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
6333 ; CHECK-NEXT: %22 = shufflevector <4 x i32> %21, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
6334 ; CHECK-NEXT: %23 = shufflevector <4 x i32> %12, <4 x i32> %6, <4 x i32> <i32 0, i32 6, i32 6, i32 6>
6335 ; CHECK-NEXT: %24 = shufflevector <4 x i32> %23, <4 x i32> %8, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
6336 ; CHECK-NEXT: %25 = shufflevector <4 x i32> %24, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
6337 ; CHECK-NEXT: %26 = shufflevector <4 x i32> %5, <4 x i32> %9, <4 x i32> <i32 3, i32 1, i32 2, i32 5>
6338 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %0, align 16
6339 ; CHECK-NEXT: store <4 x i32> %22, <4 x i32>* %1, align 16
6340 ; CHECK-NEXT: store <4 x i32> %25, <4 x i32>* %2, align 16
6341 ; CHECK-NEXT: store <4 x i32> %26, <4 x i32>* %3, align 16
6342 ; CHECK-NEXT: ret <4 x i32> %17
6343
6344 define <20 x i32> @shuffle_20xi32_to_20xi32_8(<20 x i32>, <20 x i32>) {
6345 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <20 x i32> <i32 14, i32 11, i 32 7, i32 3, i32 24, i32 36, i32 11, i32 28, i32 14, i32 11, i32 11, i32 7, i32 26, i32 15, i32 20, i32 36, i32 6, i32 3, i32 12, i32 26>
6346 ret <20 x i32> %3
6347 }
6348 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_20xi32_8(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
6349 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %7, <4 x i32> %6, <4 x i32> <i32 2, i32 7, i32 7, i32 7>
6350 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
6351 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %16, <4 x i32> %4, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
6352 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %10, <4 x i32> %13, <4 x i32> <i3 2 0, i32 4, i32 4, i32 4>
6353 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %18, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 7, i32 7>
6354 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %19, <4 x i32> %11, <4 x i32> <i3 2 0, i32 1, i32 2, i32 4>
6355 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %7, <4 x i32> %6, <4 x i32> <i32 2, i32 7, i32 7, i32 7>
6356 ; CHECK-NEXT: %22 = shufflevector <4 x i32> %21, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
6357 ; CHECK-NEXT: %23 = shufflevector <4 x i32> %10, <4 x i32> %7, <4 x i32> <i32 2, i32 7, i32 7, i32 7>
6358 ; CHECK-NEXT: %24 = shufflevector <4 x i32> %23, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
6359 ; CHECK-NEXT: %25 = shufflevector <4 x i32> %24, <4 x i32> %13, <4 x i32> <i3 2 0, i32 1, i32 2, i32 4>
6360 ; CHECK-NEXT: %26 = shufflevector <4 x i32> %5, <4 x i32> %4, <4 x i32> <i32 2, i32 7, i32 7, i32 7>
6361 ; CHECK-NEXT: %27 = shufflevector <4 x i32> %26, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 4, i32 4>
6362 ; CHECK-NEXT: %28 = shufflevector <4 x i32> %27, <4 x i32> %10, <4 x i32> <i3 2 0, i32 1, i32 2, i32 6>
6363 ; CHECK-NEXT: store <4 x i32> %20, <4 x i32>* %0, align 16
6364 ; CHECK-NEXT: store <4 x i32> %22, <4 x i32>* %1, align 16
6365 ; CHECK-NEXT: store <4 x i32> %25, <4 x i32>* %2, align 16
6366 ; CHECK-NEXT: store <4 x i32> %28, <4 x i32>* %3, align 16
6367 ; CHECK-NEXT: ret <4 x i32> %17
6368
6369 define <20 x i32> @shuffle_20xi32_to_20xi32_9(<20 x i32>, <20 x i32>) {
6370 %3 = shufflevector <20 x i32> %0, <20 x i32> %1, <20 x i32> <i32 4, i32 11, i3 2 35, i32 32, i32 6, i32 24, i32 11, i32 9, i32 16, i32 7, i32 28, i32 10, i32 1 9, i32 22, i32 17, i32 23, i32 13, i32 30, i32 22, i32 38>
6371 ret <20 x i32> %3
6372 }
6373 ; CHECK-LABEL: define <4 x i32> @shuffle_20xi32_to_20xi32_9(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)
6374 ; CHECK-NEXT: %15 = shufflevector <4 x i32> %5, <4 x i32> %6, <4 x i32> <i32 0, i32 7, i32 7, i32 7>
6375 ; CHECK-NEXT: %16 = shufflevector <4 x i32> %15, <4 x i32> %12, <4 x i32> <i3 2 0, i32 1, i32 7, i32 4>
6376 ; CHECK-NEXT: %17 = shufflevector <4 x i32> %5, <4 x i32> %10, <4 x i32> <i32 2, i32 4, i32 4, i32 4>
6377 ; CHECK-NEXT: %18 = shufflevector <4 x i32> %17, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 7, i32 5>
6378 ; CHECK-NEXT: %19 = shufflevector <4 x i32> %8, <4 x i32> %5, <4 x i32> <i32 0, i32 7, i32 7, i32 7>
6379 ; CHECK-NEXT: %20 = shufflevector <4 x i32> %19, <4 x i32> %11, <4 x i32> <i3 2 0, i32 1, i32 4, i32 4>
6380 ; CHECK-NEXT: %21 = shufflevector <4 x i32> %20, <4 x i32> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
6381 ; CHECK-NEXT: %22 = shufflevector <4 x i32> %8, <4 x i32> %9, <4 x i32> <i32 3, i32 6, i32 1, i32 7>
6382 ; CHECK-NEXT: %23 = shufflevector <4 x i32> %7, <4 x i32> %11, <4 x i32> <i32 1, i32 6, i32 6, i32 6>
6383 ; CHECK-NEXT: %24 = shufflevector <4 x i32> %23, <4 x i32> %9, <4 x i32> <i32 0, i32 1, i32 6, i32 6>
6384 ; CHECK-NEXT: %25 = shufflevector <4 x i32> %24, <4 x i32> %13, <4 x i32> <i3 2 0, i32 1, i32 2, i32 6>
6385 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %0, align 16
6386 ; CHECK-NEXT: store <4 x i32> %21, <4 x i32>* %1, align 16
6387 ; CHECK-NEXT: store <4 x i32> %22, <4 x i32>* %2, align 16
6388 ; CHECK-NEXT: store <4 x i32> %25, <4 x i32>* %3, align 16
6389 ; CHECK-NEXT: ret <4 x i32> %16
6390
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